PD-94236C RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-) IRHN5725SE 2V, N-CHANNEL 5 TECHNOLOGY Product Summary Part Number Radiation Level RDS(on) ID IRHN5725SE K Rads (Si).6Ω 3A SMD- International Rectifier s R5 TM technology provides high performance power MOSFETs for space applications. These devices have been characterized for Single Event Effects (SEE) with useful performance up to an LET of 8 (MeV/(mg/cm 2 )). The combination of low RDS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters. Features: n Single Event Effect (SEE) Hardened n Ultra Low RDS(on) n Low Total Gate Charge n Proton Tolerant n Simple Drive Requirements n Ease of Paralleling n Hermetically Sealed n Surface Mount n Ceramic Package n Light Weight Absolute Maximum Ratings Parameter ID @ VGS = 2V, TC = 25 C Continuous Drain Current 3 ID @ VGS = 2V, TC = C Continuous Drain Current 9 IDM Pulsed Drain Current À 24 Units PD @ TC = 25 C Max. Power Dissipation 5 W Linear Derating Factor.2 W/ C VGS Gate-to-Source Voltage ±2 V EAS Single Pulse Avalanche Energy Á 3 mj IAR Avalanche Current À 3 A EAR Repetitive Avalanche Energy À 5 mj dv/dt Peak Diode Recovery dv/dt  7. V/ns TJ Operating Junction -55 to 5 TSTG Storage Temperature Range C Pckg. Mounting Surface Temp. 3 (for 5s) Weight 2.6 (Typical) g A For footnotes refer to the last page www.irf.com 2/2/
IRHN5725SE Electrical Characteristics @ Tj = 25 C (Unless Otherwise Specified) Parameter Min Typ Max Units Test Conditions BVDSS Drain-to-Source Breakdown Voltage 2 V VGS = V, ID =.ma BVDSS/ TJ Temperature Coefficient of Breakdown.23 V/ C Reference to 25 C, ID =.ma Voltage RDS(on) Static Drain-to-Source On-State.6 Ω VGS = 2V, ID = 9A Resistance à VGS(th) Gate Threshold Voltage 2.5 4.5 V VDS = VGS, ID =.ma gfs Forward Transconductance 8 S VDS > 5V, IDS = 9A à IDSS Zero Gate Voltage Drain Current VDS= 6V,VGS=V µa 25 VDS = 6V, VGS = V, TJ = 25 C IGSS Gate-to-Source Leakage Forward VGS = 2V na IGSS Gate-to-Source Leakage Reverse - VGS = -2V Qg Total Gate Charge 32 VGS =2V, ID = 3A Qgs Gate-to-Source Charge 45 nc VDS = V Qgd Gate-to-Drain ( Miller ) Charge 6 td(on) Turn-On Delay Time 35 VDD = V, ID = 3A, tr Rise Time 25 VGS =2V, RG = 2.35 Ω ns td(off) Turn-Off Delay Time 8 tf Fall Time 8 LS + LD Total Inductance 4. nh Measured from the center of drain pad to center of source pad Ciss Input Capacitance 386 VGS = V, VDS = 25V Coss Output Capacitance 628 pf f =.MHz Crss Reverse Transfer Capacitance 3 Source-Drain Diode Ratings and Characteristics Parameter Min Typ Max Units Test Conditions IS Continuous Source Current (Body Diode) 3 ISM Pulse Source Current (Body Diode) À 24 A VSD Diode Forward Voltage.2 V Tj = 25 C, IS = 3A, VGS = V à trr Reverse Recovery Time 45 ns Tj = 25 C, IF = 3A, di/dt A/µs QRR Reverse Recovery Charge 6. µc VDD 25V à ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. Thermal Resistance Parameter Min Typ Max Units Test Conditions RthJC Junction-to-Case.83 C/W RthJ-PCB Junction-to-PC board 6.6 soldered to a 2 square copper-clad board Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page 2 www.irf.com
Radiation Characteristics IRHN5725SE International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics @ Tj = 25 C, Post Total Dose Irradiation ÄÅ Parameter K Rads (Si) Units Test Conditions Min Max BV DSS Drain-to-Source Breakdown Voltage 2 V V GS = V, I D =.ma VGS(th) Gate Threshold Voltage 2. 4.5 VGS = V DS, I D =.ma I GSS Gate-to-Source Leakage Forward na V GS = 2V I GSS Gate-to-Source Leakage Reverse - V GS = -2V I DSS Zero Gate Voltage Drain Current µa V DS =6V, V GS =V R DS(on) Static Drain-to-Source On-State Resistance (TO-3).6 Ω VGS = 2V, I D = 9A R DS(on) Static Drain-to-Source On-State Resistance (SMD-).6 Ω VGS = 2V, I D = 9A V SD Diode Forward Voltage.2 V VGS = V, I D = 3A International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area LET Energy Range VDS (V) (MeV/(mg/cm 2 )) (MeV) (µm) @VGS = @VGS = @VGS = @VGS = @VGS = V -5V -V -5V -2V 38 ± 5% 3 ± 7.5% 38 ± 7.5% 2 2 2 2 2 6 ± 5% 33 ± 7.5% 3 ± % 2 2 2 85 2 84 ± 5% 35 ± % 28 ± 7.5% 2 2 5 5 25 25 Bias VDS (V) 2 5 5 LET=38 ± 5% LET=6 ± 5% LET=84 ± 5% -5 - Bias VGS (V) -5-2 For footnotes refer to the last page Fig a. Single Event Effect, Safe Operating Area www.irf.com 3
IRHN5725SE I D, Drain-to-Source Current (A) VGS TOP 5V 2V V 9.V 8.V 7.V 6.V BOTTOM 5.V 5.V I D, Drain-to-Source Current (A) VGS TOP 5V 2V V 9.V 8.V 7.V 6.V BOTTOM 5.V 5.V 2µs PULSE WIDTH T J = 25 C.. V DS, Drain-to-Source Voltage (V) 2µs PULSE WIDTH T J = 5 C.. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) T J = 5 C T J = 25 C V DS= 5 5V 2µs PULSE WIDTH 5. 6. 7. 8. 9. V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.5 I D = 3A 2..5..5 V GS = 2V. -6-4 -2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 4 www.irf.com
I D, Drain-to-Source Current (A) IRHN5725SE C, Capacitance (pf) 7 VGS = V, f = MHz Ciss = Cgs + Cgd, C ds SHORTED 6 Crss = Cgd Coss = Cds + Cgd 5 C iss C oss 4 3 2 C rss V DS, Drain-to-Source Voltage (V) V GS, Gate-to-Source Voltage (V) 2 6 2 8 4 I = D 3A V DS = 6V V DS = V V DS = 4V FOR TEST CIRCUIT SEE FIGURE 3 4 8 2 6 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage I SD, Reverse Drain Current (A) T J = 5 C T J = 25 C V GS = V..2.6..4 V SD,Source-to-Drain Voltage (V). OPERATION IN THIS AREA LIMITED BY R DS (on) Tc = 25 C Tj = 5 C Single Pulse µs ms ms DC V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area www.irf.com 5
IRHN5725SE 35 V DS R D I D, Drain Current (A) 3 25 2 5 5 Fig a. Switching Time Test Circuit V DS 9% R G V GS V GS Pulse Width µs Duty Factor. % D.U.T. + - V DD 25 5 75 25 5 T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms D =.5 Thermal Response (Z thjc )...2..5.2. SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J= P DM x Z thjc + TC...... t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 6 www.irf.com
IRHN5725SE R G V DS 2V V GS tp I AS Fig 2a. Unclamped Inductive Test Circuit tp L D.U.T..Ω 5V DRIVER V (BR)DSS + - V DD A E AS, Single Pulse Avalanche Energy (mj) 7 6 5 4 3 2 I D TOP 4A 9.6A BOTTOM 3A 25 5 75 25 5 Starting T, Junction Temperature ( J C) Fig 2c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 2b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 5KΩ Q G 2V.2µF.3µF 2 V Q GS Q GD D.U.T. + V - DS V G V GS 3mA Charge I G I D Current Sampling Resistors Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit www.irf.com 7
IRHN5725SE Footnotes: À Repetitive Rating; Pulse width limited by maximum junction temperature. Á VDD = 5V, starting TJ = 25 C, L=.62 mh Peak IL = 3A, VGS = 2V Â ISD 3A, di/dt 46A/µs, VDD 2V, TJ 5 C Ã Pulse width 3 µs; Duty Cycle 2% Ä Total Dose Irradiation with VGS Bias. 2 volt VGS applied and VDS = during irradiation per MIL-STD-75, method 9, condition A. Å Total Dose Irradiation with VDS Bias. 6 volt VDS applied and VGS = during irradiation per MlL-STD-75, method 9, condition A. Case Outline and Dimensions SMD- PAD ASSIGNMENTS = DRAIN 2 = GATE 3 = SOURCE IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 252-75 IR LEOMINSTER : 25 Crawford St., Leominster, Massachusetts 453, USA Tel: (978) 534-5776 TAC Fax: (3) 252-793 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 2/2 8 www.irf.com