Applications of 3D Electromagnetic Modeling in Magnetic Recording: ESD and Signal Integrity CST NORTH AMERICAN USERS FORUM John Contreras 1 and Al Wallash 2 Hitachi Global Storage Technologies 1. San Jose Research Division, Recording Physics and Instrumentation, john.contreras@hitachigst.com ; 408-717-5107 2. Hard Disk Drive Design, Advanced Technology, albert.wallash@hitachigst.com; 408-717-8342 February 4 th, 2008 Santa Clara, CA
Outline ESD Immunity of a hard disk drive Signal Integrity EMI analysis of enclosure Cross talk in a disk drive Signal transfer
ESD Testing of Hard Disk Drives ESD Gun ESD Current Connector Simplified Hard Disk Drive Metal Enclosure Preamp PCB Insulator Top ESD sensitive recording head Printed Circuit Board (PCB) System ESD Immunity testing: IEC 61000-4-2 standard ESD gun Use 3D EM modeling and measurements to understand Common-mode current flow on outside Conducted current flow inside and through recording head Orientation: PCB down (fails at 8kV) vs. PCB up (passes to >30kV) Design changes that could improve ESD immunity
Preamplifier Types ESD Current Single-ended preamplifier ESD Current Differential preamplifier Single-ended Preamp ESD sensitive head Differential Preamp ESD sensitive head PCB PCB Impedance imbalance Single-ended preamp One input to head is connected to inside of enclosure Results in impedance imbalance across current-sensitive recording head Differential preamp Higher common-mode rejection Balanced impedance across head Common-mode ESD current converted to harmful differential-mode current at impedance imbalance across head
Metal Enclosure with Device Inside ESD Current Representing preamp Cross-sectional input with viewlumped elements Single-ended preamp: R=0 Device Metal plates or traces Metal box Internal RC coupling Insulator Insulator External RC coupling Sources of impedance imbalance External metal plate capacitance Internal R, L and C Current input to match ESD gun Box Ground plane CSM 3D Model Port R left Device R right Left plate Right plate Port and lumped elements
3D EM Model: E-field and Surface Current Electric Field in a cut plane at 3.2 ns Animation of surface current on box Surface current largest on larger left plate Strongest between box and ground plane Surface current 3D EM model helps to visualize fields and current flow strongest E- and H-fields between bottom of box and ground plane PCB down: strong fields induce current flow on exterior plates and then into box PCB up: PCB not exposed to strong fields Animation of surface current on plates and inside
Comparison: Measurement, SPICE and CST Metal box with one plate Surface mount components inside ESD Current CT-6 current probes Device 51Ω U U Metal box Ri_right 32pF 24pF 15pF 7pF CT#1 CT#2 C box C e_box 51Ω to 1kΩ 51Ω Device Ri_right C e_gnd Plate Insulator Ground plane Excellent agreement between measurement, SPICE and CST Device Current (ma) 600 400 200 0 1kV contact: 3A pk Outside: 32pF plate Inside: 51ohm +51ohm Experiment Measurement SPICE MWS CST 0 20 40 60 80 100 Device Current (ma) 250 200 150 100 50 0 Ri_right = 1 kω 1 kv contact 0 10 20 30 Plate Capacitance (pf) Measurement Data SPICE SPICE MWS CST Time (ns)
Conclusions Lessons Learned ESD current flows to enclosure surface closest to ground plane path of least impedance Strongest E-field between enclosure side facing ground plane Fields couple to traces on external PCB, resulting in current flow inside enclosure Critical design parameters Impedance between device and inside/outside enclosure Impedance imbalance across ESD sensitive device Amplifier type: single-ended vs. differential Root cause of ESD immunity problem: single-ended preamplifier» ESD failure level increased from 7kV to 30 kv by changing to a differential preamp [1] A. Wallash, A study of ESD damage to a device inside a metal enclosure, Proc. 2005 EOS/ESD Symposium
Preserving Signal Quality in the Front-end System Read/Write IC Disk Electronics (DE) Card Suspension Interconnect Cable Connector Channel Interconnect Interconnect and R/W Transducer Far-Field Interference Disk Enclosure (DE) & Board Electronic Package Σ Near-Field Interference ex.de Board Electronic Write Vs Channel Read Channel Interconnect Flex and Card Cin Rin Cout Rout Cout Rout Rin Read Amp Write Driver Cin Suspension Interconnect Write Read/Write Transducers Read { Data Signal Media Noise Magnetic Noise Thermal Noise Input Referred Amplifier Noise Signal Transfer Through electrical interconnects By proper termination By proper design for SNR Analysis Maintain Combating Interference Write-to-read crosstalk Near field interference Far field interference
EMI Modeling of Disk Drive Enclosure Modeling Signal source is a polarized plane wave Inputs Mechanical 3D graphics data E and H field probe locations E, H, and current at different frequencies Objectives Detailed model used to replicate problem Diagnose interference path/coupling Conductive-tape proposals: width, location, and number Simple model used to replicate problem and solutions Shielding Effectiveness (SE) used as measure E 0 : Reference signal when enclosure is not present E 1 : Signal when enclosure is present SE Plane Wave Disk drive Probes located inside E 0 = 20log E1
Detailed Model Results and Observations Top cover screw (1 of 6) Slot Surface Current at 800MHz Cover off Slots Slots Inside view of enclosure (simulation results with cover) Phase cycles do not imply asymmetric current distribution Slot Phase at 220 o
Disk Drive Enclosures Best case Induced surface current Fully closed enclosures Faraday cage Good electrical contact on all seams No interior current flow Imperfections Slots Restrict current flow Create internal currents Mechanical/electrical connections Frequency dependent Material Dimensions: enclosure resonances Internal structure Hot spots: location H out of slot Z 0 l / 2 l / 2 External currents not inside Electric Current H into slot tan / 2 Z0l jz0 βl j ω 2v 2π β = λ v at λ = 2 l, f0 = 2l
Fully Closed Enclosure Using results to explain the problem Surface current flow depends on wave propagation direction and E/H polarization Slots parallel to H field cause current crowding create internal currents Slots parallel to wave propagation cause less impact on shielding for that polarization Edge parallel to H Edge parallel to P
Differences with and without Cu Tape Cu tape over slot Internal surface current at 800 MHz Without Cu Tape Internal surface current at 800 MHz With Cu Tape
Shielding Effectiveness With Different Cu Tape Options Cu Tape 70 60 50 40 SE E 0 = 20log E1 top SE (db) 30 20 bottom 10 0-10 -20 No Cu Tape 2 x Cu Tape - 5mm 2 x Cu Tape - 10mm 4 x Cu Tape - 5mm 2 x Cu Tape Top & Bottom 2 x Cu Tape Top & Sides 2 x Cu Tape Top, Bottom & Sides 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Frequency (GHz)
Utilizing EM Simulations with Measurements EMI Scanning Physical Part Pathfinder 2 DE Board Scan -50-55 y H x Before Fix Amplitude (dbm) -60-65 -70-75 -80-85 40 MHz 83.4 MHz 167MHz 180MHz With 4700 pf -90-95 -100 90 MHz 0 25 50 75 100 125 150 175 200 225 250 275 300 Frequency (MHz) 180 MHz EMI Simulation Reveals Coupling to Read Output Read Lines DE Connection Decoupling Capacitors After Fix Read Lines Narrow Spacing 300 µm 180 MHz Preamp output Single ground post
3D View of Write to Read Crosstalk Head Use 3D simulation to analyze crosstalk Flex Head Flex Suspension Interconnect Write-read crosstalk view with Flex (Surface Current Density)
Verifying Crosstalk Dense signal path concern is crosstalk Review write signal propagation along line and coupling to adjacent lines Most coupling in hinge region Crosstalk (db) 0-10 -20-30 -40-50 Read Pair Write µ-actuator Pair Pair Write-to-Read Crosstlk Write-to-Read Crosstalk -60 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Frequency (GHz) TFC Pair Voltage Transfer (db) Imbalanced layout in this region Signal Transfer 0-3 -6-9 -12-15 10 100 1,000 10,000 Frequency (MHz)
Summary 3D analysis tools utilized for signal integrity analysis EMI enclosure analysis Verifying discontinuities around the enclosure Viewing signal-interference paths Determining and viewing enclosure resonances Understanding the internal structure effects Crosstalk analysis Determining crosstalk levels Viewing crosstalk paths Signal transfers Determining signal transfers Generating s-parameter models Reference [1] J. T. Contreras Modeling of a Disk Drive s Front-End Channel Path, IEEE Trans. Magn., vol. 42, no. 10, pp. 2600-2602, Oct. 2006
Extra Slides
Device current vs. Enclosure/PCB Orientation 3 ESD Current pf 32pF Device PCB up Metal box PCB Up Metal plate 51 Ω U U PCB facing UP 51Ω Insulator Ground plane Current (ma) 600 400 200 0-200 Measured peak current through device PCB down 0 50 100 150 Time (ns) Reduces external plate capacitance so it more closely follows box voltage External plate is low E-field region, so induced voltage is reduced Current through device is reduced by factor of 25! Orientation has large effect of ESD immunity due to non uniform E- and H-fields