Application and soldering information for the PCA2129 and PCF2129 TCXO RTC Rev. 3 18 December 2014 Application note Document information Info Keywords Abstract Content PCA2129, PCF2129, application, timekeeping, timestamp, soldering This application note gives additional information about soldering and application configuration of the PCA2129 and PCF2129 TCXO RTCs
Revision history Rev Date Description v.3 20141218 revised version v.2 20130208 revised version v.1 20120608 new application note, initial release Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 2 of 25
1. Introduction This application note provides additional information on the PCA2129 and PCF2129 TCXO RTCs. The accuracy of time given by an RTC is mostly depending on the accuracy of the crystal used. For example, a tuning fork crystal resonates at room temperature at its nominal frequency but slows down when the temperature deviates (see graph no. 2 in Figure 1 and Figure 2). The PCA2129 and PCF2129 are CMOS Real Time Clock (RTC) and calendar ICs. They have an integrated Temperature Compensated Crystal (Xtal) Oscillator (TCXO) based on an integrated 32.768 khz tuning fork quartz crystal. The PCA2129 and PCF2129 are optimized for very high accuracy and very low power consumption. They compensate automatically for temperature-dependent frequency deviations (see Figure 1 and Figure 2). For further information (e.g. pinning diagram and register organization), refer to the appropriate data sheets Ref. 5 PCA2129 and Ref. 6 PCF2129. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 3 of 25
2. Frequency stability and time accuracy Figure 1 and Figure 2 show the typical frequency stability of the PCA2129 and PCF2129 with respect to the temperature in comparison to an uncompensated tuning fork crystal. V DD or V BAT =3.3V. (1) Typical temperature compensated frequency response. (2) Uncompensated typical tuning-fork crystal frequency. Fig 1. Typical characteristic of frequency with respect to temperature of PCF2129AT V DD or V BAT =3.3V. (1) Typical temperature compensated frequency response. (2) Uncompensated typical tuning-fork crystal. Fig 2. Typical characteristic of frequency with respect to temperature of PCA2129T and PCF2129T All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 4 of 25
Remark: 3. Frequency measurement For V DD or V BAT other than 3.3 V, a frequency shift of 1 ppm/v has to be expected. For information about frequency correction, see Section 4.4. The frequency stability can be evaluated by measuring the frequency of the square wave signal available at the output pin CLKOUT. The frequency signal at pin CLKOUT is controlled by the COF[2:0] control bits in register CLKOUT_ctl (0Fh) according to Table 1. Table 1. CLKOUT frequency selection COF[2:0] CLKOUT frequency (Hz) Typical duty cycle [1] 000 32768 60 : 40 to 40 : 60 001 16384 50 : 50 010 8192 50 : 50 011 4096 50 : 50 100 2048 50 : 50 101 1024 50 : 50 110 1 50 : 50 111 CLKOUT = high-z - [1] Duty cycle definition: % HIGH-level time : % LOW-level time. The selection of f CLKOUT = 32.768 khz (COF[2:0] = 000, default value) leads to lower accuracy. It is therefore recommended to select a frequency other than the default value of 32.768 khz for accurate frequency measurements. The most accurate frequency measurement occurs when 1 Hz is selected. In order to be able to adjust the clock with accuracy better than 1 ppm, the frequency counter used to check the output at CLKOUT should have at least an 8-digit reading. Furthermore, for accurate evaluation of the frequency stability over temperature, it is important that the frequency measurement is executed when the temperature is stable and the PCA2129 and PCF2129 performed the temperature measurement. The PCA2129 and PCF2129 measure the temperature immediately after power-on and then periodically with a period set by the temperature conversion rate bits TCR[1:0] in register CLKOUT_ctl (0Fh): Table 2. Temperature measurement interval TCR[1:0] Temperature measurement interval 00 [1] 4min 01 2 min 10 1 min 11 30 seconds [1] Default value. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 5 of 25
Once the temperature is set and is stable, it is necessary to wait until the PCA2129 and PCF2129 have performed the temperature measurement, then the frequency can be measured at the CLKOUT pin. To perform quicker measurements, it is recommended to select the temperature measurement period of 30 seconds (TCR[1:0] = 11). In summary, for an accurate evaluation of the frequency stability the following operating flow is recommended: Power-on with V DD =3.3V Wait until the 32.768 khz signal is available at the CLKOUT pin Program a COF[2:0] value other than the default, for example COF[2:0] = 110, which corresponds to f CLKOUT =1Hz Program TCR[1:0] = 11, which corresponds to a temperature measurement period equal to 30 seconds Set the target temperature Wait until temperature is stable Wait until the temperature measurement is executed (~30 seconds after the temperature is stable) Measure the frequency at the CLKOUT pin. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 6 of 25
4. Reflow soldering 4.1 Introduction to reflow soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs) to form electrical circuits. The soldered joint provides both, the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one Printed-Circuit Board (PCB); however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. The PCA2129 and PCF2129 are intended for use in a reflow soldering process. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in reflow soldering are: Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures than a SnPb process, thus reducing the process window Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board Reflow temperature profile (see Figure 3); this profile includes preheat (T s ), reflow (in which the board is heated to the peak temperature (T p )) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. For further information on reflow soldering IC, refer to Ref. 1 AN10365. 4.2 Reflow soldering of PCA2129 and PCF2129 The PCA2129 and PCF2129 are intended for use in a lead-free reflow soldering process, classified in accordance with the Ref. 3 IPC/JEDEC J-STD-020. Figure 3 shows the reflow soldering temperature profile according to Ref. 3 IPC/JEDEC J-STD-020 used for the qualification of the PCA2129 and PCF2129. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 7 of 25
Fig 3. Figure not drawn to scale. The appropriate values for this graph are shown in Table 3. Remark: The reflow profile in this document is for classification/preconditioning and not meant to specify board assembly profiles. Actual board assembly profiles should be developed based on specific process needs and board designs, but must not exceed the parameters shown in Table 3. Reflow temperature profile Table 3. Values of reflow temperature profile All temperatures refer to the center of the package, measured on the package body surface that is facing up during the reflow soldering process. Symbol Value Unit T p 260 C T L 217 C T C 255 C T s(max) 200 C T s(min) 150 C t p 30 s t L 60 to 150 s t s 60 to 120 s t dur max 480 s Recommendations: 1. The reflow soldering profile shown in Figure 3 is recommended. A full convection reflow system, capable of maintaining the reflow profile of Figure 3, is recommended. 2. The peak temperature (T p ) of the reflow soldering process must not exceed 260 C. If the temperature exceeds 260 C, the characteristics of the crystal oscillator is degraded or the device may even be damaged. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 8 of 25
3. The time, while the PCA2129 and PCF2129 are heated above T C = 255 C, must not exceed 30 s (t p ), otherwise the characteristics of the crystal oscillator is degraded or the device may even be damaged. 4.3 Effect of reflow soldering on the frequency characteristics The reflow soldering process is typically generating a negative frequency shift. After one-time reflow soldering, processed in accordance with the recommended temperature profile shown in Figure 3 and Table 3, a frequency shift of 2 ppm is typical. Any other reflow temperature profile or multiple soldering may cause a different frequency shift after soldering. The frequency shift after soldering can be reduced by lowering the peak temperature T p and shortening the time t p of the soldering process (see Figure 3 and Table 3). 4.4 Frequency correction after reflow soldering In order to compensate for a shift in frequency due to reflow soldering, a frequency offset can be programmed through bits AO[3:0] of register address 19h. In the typical case and under consideration of the temperature profile as given in Figure 3, an offset of +2 ppm is considered to be most suitable. However, this may vary on a per case basis and in dependence of the actual soldering profile used. Remark: 1. The typical frequency shift of 2 ppm, that occurs after a one-time reflow soldering processed in accordance with the recommended temperature profile shown in Figure 3 and Table 3, can be corrected by programming AO[3:0] = 0110. 2. A frequency measurement (see Section 3) should be performed after the final assembly of the board if the soldering was processed multiple times, the soldering was not made according to the recommended temperature profile, the best result in accuracy should be achieved. Then the offset with the appropriate value given in Table 4 should be programmed into AO[3:0]. Deviations caused by assembly steps or due to production tolerances can be compensated with it. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 9 of 25
Table 4. Typical frequency correction at 25C AO[3:0] ppm Decimal Binary 0 0000 +8 1 0001 +7 2 0010 +6 3 0011 +5 4 0100 +4 5 0101 +3 6 0110 +2 7 0111 +1 8 1000 [1] 0 9 1001 1 10 1010 2 11 1011 3 12 1100 4 13 1101 5 14 1110 6 15 1111 7 [1] Default value. 4.5 Optimization at room temperature Many applications operate in a temperature range of 15 C to 35 C most of the time. Therefore it is preferred to optimize the accuracy for this range. There is a simple way to do this fine-tuning: 1. Measure the frequency at about 25 C. 2. Calculate the offset to the nominal frequency of 32768.000 Hz. 3. Program the correction value into AO[3:0]. With this method, it is possible to fine-tune the RTC in steps of 1 ppm and ensure an accuracy of 1 ppm at room temperature. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 10 of 25
5. Application information 5.1 Assembly recommendations It is recommended to take precautions when using the PCA2129 and PCF2129 with general-purpose mounting equipment in order to avoid excessive shocks that could damage the integrated quartz crystal avoid ultrasonic cleaning that could damage the integrated quartz crystal avoid in the board layout running signal traces under the package unless a ground plane is placed between the package and the signal line. 5.2 General application information In general, it can be said that the integration of the quartz crystal in the same package as the RTC has the following advantages: elimination of crystal procurement issues elimination of concerns regarding the crystal parameters matching those of the RTC no more crystal PCB layout issues the IFS pin must be connected to ground (V SS ) to select the SPI-bus the IFS pin must be connected to the BBS pin to select the I 2 C-bus a backup battery can be attached to the V BAT pin to enable the battery switch-over when the main power V DD fails. If V BAT is not used, it has to be connected to ground. If V BAT is used, one of the supplies (V BAT or V DD ) has to be turned on before the other the battery backed voltage V BBS can be used to supply an external RAM to retain RAM data in battery backup mode. A low leakage decoupling capacitor should be connected from BBS to V SS : suggested value is 1 nf, max 100 nf. If BBS is not used to supply an external IC, the decoupling capacitor between the BBS and V SS pins must always be connected CLKOUT and INT are open-drain, active LOW outputs which require external pull-up resistors: maximum pull-up voltage is 5.5 V the timestamp input pin TS can be connected to a push button for tamper detection (see Section 5.4). 5.2.1 Current consumption Current consumption is reduced if the power management functions are disabled (PWRMNG[2:0] = 111). In that case, the battery switch-over function is disabled battery low detection is disabled only one power supply (V DD ) is used. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 11 of 25
5.3 Battery switch-over applications The functionality of the battery switch-over is limited by the fact that the power supply V DD is monitored every 1 ms in order to save power consumption. Considering that the battery switch-over threshold value (V th(sw)bat ) is typically 2.5 V, the power management operating limit (V DD(min) ) is 1.8 V and that V DD is monitored every 1 ms, the battery switch-over works properly in all cases where V DD falls with a rate lower than 0.7 V/ms, as shown in Figure 4: Fig 4. Supply voltage with respect to sampling and comparing rate In an application, where during power-down, the current consumption on pin V DD is in the range of a few A a capacitor of 100 nf on pin V DD is enough to allow a slow power-down and the proper functionality of the battery switch-over 1 in the range of a few hundreds of A, the value of the capacitor on pin V DD must be increased to force a falling gradient of less than 0.7 V/ms on pin V DD to assure the proper functionality of the battery switch-over 2 higher than some ma it is recommended to add an RC network on the V DD pin, as shown in Figure 5. A series resistor of 330 and a capacitor of 6.8 F assure the proper functionality of the battery switch-over even with very fast V DD slope. Note that: it is not suggested to assemble a series resistor higher than 1 k because it would cause a large voltage drop lower values of capacitors are possible, depending on the V DD slope in the application. 1. Like in the case of no interface activity and/or early power fail detection functions that allow the microcontroller to perform early backup operations and to set power-down modes. 2. Like in the case of interface activity. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 12 of 25
Fig 5. RC network on pin V DD 5.4 Timestamp applications The most common application of the timestamp function is a tamper detection: date and time are stored when the cover of the equipment is opened. A push button is attached to the cover in such a way, that when the cover is opened, the button is pushed (mechanical connection); the button is connected to the timestamp input pin so that when the button is pushed, the timestamp circuit detects the event, sets a flag and stores the date and time in internal registers. The timestamp function integrated in the PCA2129 and PCF2129 allows double tamper detection in an application, although with a single timestamp input pin. Two push-buttons can be connected to the timestamp input pin. Time and date are stored when one of the push-buttons is pushed. A typical application is an electrical meter, where one cover protects the terminal (terminal case) and another cover protects the electronics (electronic case) and an opening of each of them should be registered. Figure 6 shows the double tamper detection application. (1) When using switches or push-buttons, it is recommended to connect a 1 nf capacitance to the TS pin to ensure proper switching. Fig 6. Tamper detection circuit with two push-buttons All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 13 of 25
When cover 1 is opened, the push button 1 is closed and the TS pin is driven to the R2 intermediate level V TS_n =. For proper functionality R1 ------------------- + R2 V --------- V DD DD 2 R2 = 220 k with a maximum variation of 5 %, and a low resistive push button must be used. Event 1: TSF1 is set, date and time is registered. When cover 2 is opened, the push button 2 is closed and the TS pin is driven to ground. Event 2: TSF1 and TSF2 are both set, date and time is registered. 5.5 Timekeeping applications For using the time keeping functions of the PCA2129 and PCF2129, see Figure 7: CLKOUT is disabled (COF[2:0] = 111) The power management functions are disabled (PWRMNG[2:0] = 111) and pin V BAT is tied to ground The timestamp detection is disabled (TSOFF = 1) Timekeeping is very accurate due to the temperature compensation. The power consumption is minimized. Fig 7. Application diagram: timekeeping If CLKOUT is enabled during time keeping as described in Section 5.6 to Section 5.10, the best accuracy is achieved if a CLKOUT frequency other than the default value of 32.768 khz is selected. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 14 of 25
5.6 Timekeeping and CLKOUT Figure 8 shows the PCA2129 and PCF2129 used for timekeeping and CLKOUT functions: CLKOUT is connected to V DD using a pull-up resistor CLKOUT is enabled at 32.768 khz by default after start-up (COF[2:0] = 000) The power management functions are disabled (PWRMNG[2:0] = 111) and pin V BAT is tied to ground The timestamp detection is disabled (TSOFF = 1) Fig 8. Application diagram: timekeeping and CLKOUT All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 15 of 25
5.7 Timekeeping, CLKOUT and power management For using the timekeeping and power management functions of the PCA2129 and PCF2129, see Figure 9: CLKOUT is connected to V DD using a pull-up resistor CLKOUT is enabled at 32.768 khz by default after start-up (COF[2:0] = 000) A battery is attached to the V BAT pin The battery switch-over and the battery low detection functions are enabled by default (PWRMNG[2:0] = 000) The timestamp detection is disabled (TSOFF = 1) Fig 9. Application diagram: timekeeping, CLKOUT and power management All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 16 of 25
5.8 Timekeeping, CLKOUT and timestamp Figure 10 shows the PCA2129 and PCF2129 used for timekeeping, CLKOUT and timestamp functions: CLKOUT is connected to V DD using a pull-up resistor CLKOUT is enabled at 32.768 khz by default after start-up (COF[2:0] = 000) The power management functions are disabled (PWRMNG[2:0] = 111) and pin V BAT is tied to ground The timestamp detection is enabled by default (TSOFF = 0), see Figure 6 Fig 10. Application diagram: timekeeping, CLKOUT and timestamp All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 17 of 25
5.9 Timekeeping, CLKOUT, power management and timestamp For using the timekeeping, power management, CLKOUT and timestamp functions of the PCA2129 and PCF2129, see Figure 11: CLKOUT is connected to V DD using a pull-up resistor CLKOUT is enabled at 32.768 khz by default after start-up (COF[2:0] = 000) A battery is attached to the V BAT pin, see Section 5.3 The battery switch-over and the battery low detection functions are enabled by default (PWRMNG[2:0] = 000) The timestamp detection is enabled by default (TSOFF = 0), see Figure 6 Fig 11. Application diagram: timekeeping, CLKOUT, power management and timestamp All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 18 of 25
5.10 Timekeeping, CLKOUT, power management, timestamp, battery connected and supply of an external device Figure 12 shows the PCA2129 and PCF2129 used for timekeeping, power management, CLKOUT with a battery connected and supplying an external device: CLKOUT is connected to V DD using a pull-up resistor CLKOUT is enabled at 32.768 khz by default after start-up (COF[2:0] = 000) A battery is attached to the V BAT pin The battery switch-over and the battery low detection functions are enabled by default (PWRMNG[2:0] = 000), see Section 5.3 The timestamp detection is enabled by default (TSOFF = 0), see Figure 6 BBS supplies an external device (SRAM) Fig 12. Application diagram: timekeeping, CLKOUT, power management, timestamp, battery connected and supply of an external device For using the PCA2129 and PCF2129 for timekeeping, power management, CLKOUT with a battery connected and supplying a microcontroller, see Figure 13: CLKOUT is connected to V DD using a pull-up resistor CLKOUT is enabled at 32.768 khz by default after start-up (COF[2:0] = 000) A battery is attached to the V BAT pin The battery switch-over and the battery low detection functions are enabled by default (PWRMNG[2:0] = 000) The timestamp detection is enabled by default (TSOFF = 0) BBS supplies a microcontroller (see Figure 13) All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 19 of 25
Fig 13. Application diagram: timekeeping, CLKOUT, power management, timestamp, battery connected and supply of a microcontroller 6. Abbreviations Table 5. Acronym CMOS I 2 C IC MCU PCB PPM RAM RTC SMD SPI SRAM TCXO Xtal Abbreviations Description Complementary Metal Oxide Semiconductor Inter-Integrated Circuit Integrated Circuit Microcontroller Unit Printed-Circuit Board Parts Per Million Random Access Memory Real-Time Clock Surface Mount Device Serial Peripheral Interface Static Random Access Memory Temperature Compensated Xtal Oscillator crystal All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 20 of 25
7. References [1] AN10365 Surface mount reflow soldering description [2] IEC 61340-5 Protection of electronic devices from electrostatic phenomena [3] IPC/JEDEC J-STD-020 Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices [4] JESD625-A Requirements for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices [5] PCA2129 Automotive accurate RTC with integrated quartz crystal, Data Sheet [6] PCF2129 Accurate RTC with integrated quartz crystal for industrial applications, Data Sheet [7] UM10204 I 2 C-bus specification and user manual [8] UM10301 User Manual for NXP Real-Time Clocks PCF85x3, PCA8565 and PCF2123, PCA2125 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 21 of 25
8. Legal information 8.1 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 8.2 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. Translations A non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 8.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 22 of 25
9. Tables Table 1. CLKOUT frequency selection...............5 Table 2. Temperature measurement interval..........5 Table 3. Values of reflow temperature profile.........8 Table 4. Typical frequency correction at 25 C.......10 Table 5. Abbreviations..........................20 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 23 of 25
10. Figures Fig 1. Typical characteristic of frequency with respect to temperature of PCF2129AT..................4 Fig 2. Typical characteristic of frequency with respect to temperature of PCA2129T and PCF2129T......4 Fig 3. Reflow temperature profile...................8 Fig 4. Supply voltage with respect to sampling and comparing rate...........................12 Fig 5. RC network on pin V DD....................13 Fig 6. Tamper detection circuit with two push-buttons..13 Fig 7. Application diagram: timekeeping............14 Fig 8. Application diagram: timekeeping and CLKOUT.15 Fig 9. Application diagram: timekeeping, CLKOUT and power management.......................16 Fig 10. Application diagram: timekeeping, CLKOUT and timestamp..............................17 Fig 11. Application diagram: timekeeping, CLKOUT, power management and timestamp................18 Fig 12. Application diagram: timekeeping, CLKOUT, power management, timestamp, battery connected and supply of an external device................19 Fig 13. Application diagram: timekeeping, CLKOUT, power management, timestamp, battery connected and supply of a microcontroller..................20 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Application note Rev. 3 18 December 2014 24 of 25
11. Contents 1 Introduction............................ 3 2 Frequency stability and time accuracy...... 4 3 Frequency measurement................. 5 4 Reflow soldering........................ 7 4.1 Introduction to reflow soldering............. 7 4.2 Reflow soldering of PCA2129 and PCF2129.. 7 4.3 Effect of reflow soldering on the frequency characteristics.......................... 9 4.4 Frequency correction after reflow soldering... 9 4.5 Optimization at room temperature......... 10 5 Application information.................. 11 5.1 Assembly recommendations.............. 11 5.2 General application information........... 11 5.2.1 Current consumption................... 11 5.3 Battery switch-over applications........... 12 5.4 Timestamp applications................. 13 5.5 Timekeeping applications................ 14 5.6 Timekeeping and CLKOUT............... 15 5.7 Timekeeping, CLKOUT and power management. 16 5.8 Timekeeping, CLKOUT and timestamp..... 17 5.9 Timekeeping, CLKOUT, power management and timestamp............................ 18 5.10 Timekeeping, CLKOUT, power management, timestamp, battery connected and supply of an external device........................ 19 6 Abbreviations.......................... 20 7 References............................ 21 8 Legal information....................... 22 8.1 Definitions............................ 22 8.2 Disclaimers........................... 22 8.3 Trademarks........................... 22 9 Tables................................ 23 10 Figures............................... 24 11 Contents.............................. 25 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 December 2014 Document identifier: