Applications High frequency DC-DC converters Plasma Display Panel Lead-Free l l l SMPS MOSFET Benefits l Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective C OSS to Simplify Design, (See App. Note AN01) l Fully Characterized Avalanche Voltage and Current PROVISIONAL TO-220AB IRFB38N20DPbF IRFB38N20DPbF IRFS38N20DPbF IRFSL38N20DPbF HEXFET Power MOSFET Key Parameters D 2 Pak IRFS38N20DPbF TO-262 IRFSL38N20DPbF Absolute Maximum Ratings Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V 38* I D @ T C = 0 C Continuous Drain Current, V GS @ V 27* A I DM Pulsed Drain Current 180 P D @T A = 25 C Power Dissipation 3.8 W P D @T C = 25 C Power Dissipation 230* Linear Derating Factor 1.5* W/ C V GS Gate-to-Source Voltage ± 30 V dv/dt Peak Diode Recovery dv/dt ƒ 9.5 V/ns T J Operating Junction and -55 to 175 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (1.6mm from case ) Mounting torqe, 6-32 or M3 screw lbf in (1.1N m) Thermal Resistance PD - 97001A V DS 200 V V DS (Avalanche) min. 260 V R DS(ON) max @ V 54 m: T J max 175 C Parameter Typ. Max. Units R θjc Junction-to-Case 0.47* R θcs Case-to-Sink, Flat, Greased Surface 0.50 C/W R θja Junction-to-Ambient 62 R θja Junction-to-Ambient 40 * R θjc (end of life) for D 2 Pak and TO-262 = 0.50 C/W. This is the maximum measured value after 00 temperature cycles from -55 to 150 C and is accounted for by the physical wearout of the die attach medium. Notes through are on page 11 www.irf.com 1 09/09/05
Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 200 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.22 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance 0.054 Ω V GS = V, I D = 26A V GS(th) Gate Threshold Voltage 3.0 5.0 V V DS = V GS, I D = 250µA I DSS Drain-to-Source Leakage Current 25 V µa DS = 200V, V GS = 0V 250 V DS = 160V, V GS = 0V, T J = 150 C I GSS Gate-to-Source Forward Leakage 0 V GS = 30V na Gate-to-Source Reverse Leakage -0 V GS = -30V Dynamic @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 17 S V DS = 50V, I D = 26A Q g Total Gate Charge 60 91 I D = 26A Q gs Gate-to-Source Charge 17 25 nc V DS = 0V Q gd Gate-to-Drain ("Miller") Charge 28 42 V GS = V, t d(on) Turn-On Delay Time 16 V DD = 0V t r Rise Time 95 ns I D = 26A t d(off) Turn-Off Delay Time 29 R G = 2.5Ω t f Fall Time 47 V GS = V C iss Input Capacitance 2900 V GS = 0V C oss Output Capacitance 450 V DS = 25V C rss Reverse Transfer Capacitance 73 pf ƒ = 1.0MHz C oss Output Capacitance 3550 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 180 V GS = 0V, V DS = 160V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 380 V GS = 0V, V DS = 0V to 160V Avalanche Characteristics Parameter Min. Typ. Max. Units E AS Single Pulse Avalanche Energydh 460 mj I AR Avalanche Currentc 26 A E AR Repetitive Avalanche Energy c 390 mj V DS (Avalanche) Repetitive Avalanche Voltage c 260 V Diode Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 44 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 180 (Body Diode) p-n junction diode. S V SD Diode Forward Voltage 1.5 V T J = 25 C, I S = 26A, V GS = 0V t rr Reverse Recovery Time 160 240 ns T J = 25 C, I F = 26A Q rr Reverse RecoveryCharge 1.3 2.0 µc di/dt = 0A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S L D ) 2 www.irf.com
I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) PROVISIONAL 00 0 VGS TOP 15V 12V V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 0 VGS TOP 15V 12V V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 5.0V 1 1 5.0V 0.1 300µs PULSE WIDTH Tj = 25 C 0.1 1 0 V DS, Drain-to-Source Voltage (V) 0.1 300µs PULSE WIDTH Tj = 175 C 0.1 1 0 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 00.00 3.5 I D = 44A 3.0 T J = 25 C 0.00 T J = 175 C.00 V DS = 15V 300µs PULSE WIDTH 1.00 5.0 7.0 9.0 11.0 13.0 15.0 V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.5 2.0 1.5 1.0 0.5 V GS = V 0.0-60 -40-20 0 20 40 60 80 0 120 140 160 180 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3
C, Capacitance(pF) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Voltage (V) PROVISIONAL 0000 000 V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss 12 8 I D = 26A V DS = 160V V DS = 0V 00 6 Coss 4 0 Crss 2 1 0 00 V DS, Drain-to-Source Voltage (V) 0 0 20 30 40 50 60 70 Q G Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 00.00 00 OPERATION IN THIS AREA LIMITED BY R DS (on) 0.00 T J = 175 C 0.00 0µsec T J = 25 C 1msec 1.00 V GS = 0V 0. 0.0 0.5 1.0 1.5 2.0 2.5 V SD, Source-toDrain Voltage (V) 1 0.1 Tc = 25 C Tj = 175 C Single Pulse msec 1 0 00 V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
50 V DS R D 40 R G V GS D.U.T. - V DD I D, Drain Current (A) 30 20 V Pulse Width 1 µs Duty Factor 0.1 % Fig a. Switching Time Test Circuit V DS 90% 0 25 50 75 0 125 150 175 T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms 1 Thermal Response (Z thjc ) 0.1 0.01 D = 0.50 0.20 0. 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t 1 t 2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc T C 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5
15V V DS L DRIVER R G D.U.T I AS - V DD A 20V tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V (BR)DSS tp E AS, Single Pulse Avalanche Energy (mj) 900 720 540 360 180 TOP BOTTOM 0 25 50 75 0 125 150 175 Starting Tj, Junction Temperature ( C) I D 11A 19A 26A I AS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. V Q GS Q G Q GD 12V.2µF 50KΩ.3µF D.U.T. V - DS V G V GS 3mA Charge Fig 13a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 www.irf.com
Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET Power MOSFETs www.irf.com 7
TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7,6,6$1,5),17(51$7,21$/ $66(0%/('21:: 5(&7,),(5,17($66(0%/</,1(& /2*2 1RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH $66(0%/< 3$57180%(5 '$7(&2'( <($5 :((. /,1(& 8 www.irf.com
D 2 Pak Package Outline Dimensions are shown in millimeters (inches) D 2 Pak Part Marking Information 7,6,6$1,5)6:,7,17(51$7,21$/ $66(0%/('21:: 5(&7,),(5,17($66(0%/</,1(/ /2*2 $66(0%/< )6 3$57180%(5 '$7(&2'( <($5 :((. /,1(/ 25,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( www.irf.com 9 )6
TO-262 Package Outline Dimensions are shown in millimeters (inches) IGBT 1- GATE TO-262 Part Marking Information (;$03/( 7,6,6$1,5// $66(0%/('21::,17($66(0%/</,1(&,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( <($5 :((. /,1(& 25,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( www.irf.com
D 2 Pak Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 4. (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065).90 (.429).70 (.421) 11.60 (.457) 11.40 (.449) 16. (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 1.3mH R G = 25Ω, I AS = 26A. ƒ I SD 26A, di/dt 390A/µs, V DD V (BR)DSS, T J 175 C. Pulse width 300µs; duty cycle 2%. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. TO-220 package is not recommended for Surface Mount Application. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. This is only applied to TO-220AB package. This is applied to D 2 Pak, when mounted on 1" square PCB (FR-4 or G- Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q1] (IRFB38N20DPbF), & Industrial (IRFS38N20DPbF/IRFSL38N20D) market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) 252-75 TAC Fax: (3) 252-7903 Visit us at www.irf.com for sales contact information.09/05 www.irf.com 11