CS61C L23 Representations of Combinatorial Logic Circuits (1) inst.eecs.berkeley.edu/~cs61c UC Berkeley CS61C : Machine Structures Lecture 23 Representations of Combinatorial Logic Circuits 2006-10-20 TA/Punner David Poll www.depoll.com IE7 Released This week, after more than 3 years since the last major update, Microsoft finally releases the next generation of their Internet Explorer web browser www.microsoft.com/ie Hello Helo,world! CS61C L23 Representations of Combinatorial Logic Circuits (2) Review State elements are used to: Build memories Control the flow of information between other state elements and combinational logic D-flip-flops used to build registers Clocks tell us when D-flip-flops change Setup and Hold times important We pipeline long-delay CL for faster clock Finite State Machines extremely useful Represent states and transitions Combinational Logic FSMs had states and transitions How to we get from one state to the next? Answer: Combinational Logic CS61C L23 Representations of Combinatorial Logic Circuits (3) CS61C L23 Representations of Combinatorial Logic Circuits (4) Truth Tables TT Example #1: 1 iff one (not both) a,b=1 0 a b y 0 0 0 0 1 1 1 0 1 1 1 0 CS61C L23 Representations of Combinatorial Logic Circuits (5) CS61C L23 Representations of Combinatorial Logic Circuits (6)
CS61C L23 Representations of Combinatorial Logic Circuits (7) TT Example #2: 2-bit adder TT Example #3: 32-bit unsigned adder How Many Rows? How Many Rows? CS61C L23 Representations of Combinatorial Logic Circuits (8) TT Example #3: 3-input majority circuit Logic Gates (1/2) CS61C L23 Representations of Combinatorial Logic Circuits (9) CS61C L23 Representations of Combinatorial Logic Circuits (10) And vs. Or review Dan smnemonic Logic Gates (2/2) A B Symbol AND AND Gate C Definition A B C 0 0 0 0 1 0 1 0 0 1 1 1 CS61C L23 Representations of Combinatorial Logic Circuits (11) CS61C L23 Representations of Combinatorial Logic Circuits (12)
CS61C L23 Representations of Combinatorial Logic Circuits (13) 2-input gates extend to n-inputs Truth Table Gates (e.g., majority circ.) N-input XOR is the onlyonewhichisn t so obvious It simple:xorisa 1 iff the # of 1s at its input is odd CS61C L23 Representations of Combinatorial Logic Circuits (14) Truth Table Gates (e.g., FSM circ.) Boolean Algebra PS Input NS Output 00 0 00 0 00 1 01 0 01 0 00 0 01 1 10 0 10 0 00 0 10 1 00 1 orequivalently George Boole, 19 th Century mathematician Developed a mathematical system (algebra) involving logic laterknownas BoleanAlgebra Primitive functions: AND, OR and NOT ThepowerofBAisthere saone-to-one correspondence between circuits made up of AND, OR and NOT gates and equations in BA +meansor, meansand,xmeansnot CS61C L23 Representations of Combinatorial Logic Circuits (15) CS61C L23 Representations of Combinatorial Logic Circuits (16) Boolean Algebra (e.g., for majority fun.) Boolean Algebra (e.g., for FSM) PS Input NS Output 00 0 00 0 00 1 01 0 01 0 00 0 01 1 10 0 10 0 00 0 10 1 00 1 orequivalently y=a b+a c+b c y = PS 1 PS 0 INPUT y = ab + ac + bc CS61C L23 Representations of Combinatorial Logic Circuits (17) CS61C L23 Representations of Combinatorial Logic Circuits (18)
CS61C L23 Representations of Combinatorial Logic Circuits (19) BA: Circuit & Algebraic Simplification Laws of Boolean Algebra BA also great for circuit verification Circ X = Circ Y? use BA to prove! CS61C L23 Representations of Combinatorial Logic Circuits (20) Boolean Algebraic Simplification Example Canonical forms (1/2) Sum-of-products (ORs of ANDs) CS61C L23 Representations of Combinatorial Logic Circuits (21) CS61C L23 Representations of Combinatorial Logic Circuits (22) Canonical forms (2/2) Peer Instruction CS61C L23 Representations of Combinatorial Logic Circuits (23) A. (a+b) (a+b)=b B. N-input gates can be thought of cascaded 2-input gates. I.e., where isoneofand,or,xor,nand C. You can use NOR(s) with clever wiring to simulate AND, OR, & NOT CS61C L23 Representations of Combinatorial Logic Circuits (24) ABC 1: FFF 2: FFT 3: FTF 4: FTT 5: TFF 6: TFT 7: TTF 8: TTT
CS61C L23 Representations of Combinatorial Logic Circuits (25) Peer Instruction Answer A. (a+b) (a+b)=a+ab+ba+b=0+b(a+a)+b=b+b=btrue B. (next slide) C. You can use NOR(s) with clever wiring to simulate AND, OR, & NOT. NOR(a,a)= a+a = aa = a Using this NOT, can we make a NOR an OR? An And? TRUE A. (a+b) (a+b)=b B. N-input gates can be thought of cascaded 2-input gates. I.e., where isoneofand,or,xor,nand C. You can use NOR(s) with clever wiring to simulate AND, OR, & NOT ABC 1: FFF 2: FFT 3: FTF 4: FTT 5: TFF 6: TFT 7: TTF 8: TTT A. Peer Instruction Answer (B) B. N-input gates can be thought of cascaded 2-input gates. I.e., where isoneofand,or,xor,nand FALSE Let sconfirm! CORRECT 3-input XYZ AND OR XOR NAND 000 00 0 0 00 11 001 00 1 1 11 11 010 00 1 1 11 11 011 00 1 1 00 11 100 00 1 1 11 10 101 00 1 1 00 10 110 00 1 1 00 10 111 11 1 1 11 01 CS61C L23 Representations of Combinatorial Logic Circuits (26) CORRECT 2-input YZ AND OR XOR NAND 00 0 0 0 1 01 0 1 1 1 10 0 1 1 1 11 1 1 0 0 AndInconclusion Pipeline big-delay CL for faster clock Finite State Machines extremely useful You lsethemagainin150,152&164 Use this table and techniques we learned to transform from 1 to another CS61C L23 Representations of Combinatorial Logic Circuits (27)