Paralleling of LLC Resonant Converters using Frequency Controlled Current Balancing

PESC8, Rhodes, Greece Paralleling of LLC Resonant Converters using Frequency Controlled Current Balancing H. Figge *, T. Grote *, N. Froehleke *, J. Boecker * and P. Ide ** * University of Paderborn, Power Electronics and Electric Drives, Germany ** DELTA Energy Systems GmbH, Soest, Germany Abstract Paralleling of two LLC resonant converters leads to a significant reduction of current stress in the output filter capacitor, provided that the driving signals of both converters are of equal frequency and with constant phase shift of 9. However, non influenceable tolerances of the circuit elements, especially those of the resonant tank circuit, cause unbalanced power distribution between the paralleled converters, resulting in suboptimal circuit design. Frequency controlled current balancing is proposed as remedy in this paper, and prototype measurements are presented to demonstrate the functional capability. nv o V / g I. INTRODUCTION The LLC series resonant converter (Fig. ) was largely overlooked and is recently considered suitable for isolated DC/DC conversion in high power SMPS, improving light load efficiency and the aspect of cost [][]. However, whereas the LLC resonant converter works fine for high voltage applications, its applicability for low voltage and high power applications, such as server or telecom power supplies, requires an enhancement of the first order capacitive output filter. Because the output of the LLC resonant circuit injects a sine wave of current into the rectifier and output filter capacitor, there will be a significant ac component at double switching frequency superimposed on the dc output voltage due to the p.d. at the ESR of the filter capacitor. As a common workaround, adding an additional second order filter to the output may eliminate the ac component of the output voltage but efficiency and power density will suffer. A more general approach for reducing the ac component of the converter output voltage is by phase shifted paralleling of multiple converter modules. Several publications have addressed this method in the past [6]. However, applying phase shifted paralleling to the LLC converter topology, a balanced power distribution between the single converter modules has to be ensured for proper Figure. LLC resonant converter drawn as half bridge topology Figure. Load dependency of LLC converter voltage gain for a worst case set of component values (A and B) power supply function. It is obvious, that unpredictable component tolerances of the circuit elements cause more or less unbalanced power distribution between the paralleled converter modules. In order to demonstrate the impact of component tolerances, the following assumptions are made for the component values: Resonant Inductance L s : ± 5% Resonant Capacitance C s : ± 5% Therefore the worst case of component combinations for two LLC resonant converters A and B can be described as L L ( + %) () sa = sb C C ( + %) () sa = sb The impact of above mentioned tolerances on the voltage gain of the LLC converter is shown in Fig.. The analysis of the voltage gain characteristic is based on the well known fundamental frequency method [8]. Commonly used definitions are: resonant frequency: f = /( L s C ) s characteristic impedance: Z = L s / Cs normalized load: Q = 8Z /( π n RL ) inductance ratio: h = L m / Ls normalized switching frequency: F = f s / f

It can be clearly seen that balanced power distribution of the LLC converters A and B can only be achieved for a single operating point. Considering e.g. Q =.5, only converter B is distributing power. Further differences of the voltage gain characteristic can result from tolerances of the inductance ratio h and the characteristic impedance Z. Although converter losses will reduce the effect of unbalanced power distribution, active current balancing seems to be essential for reliable operation of paralleled LLC converters. Active current balancing methods typically use the respective control variable of each converter to maintain load balance [6]. In case of resonant converters, the preferred control variable is the switching frequency f s, as for PWM control of resonant converters soft switching of the inverter semiconductors is lost. Since phase shifted paralleling of LLC resonant converters requires the switching frequency of each converter to be the same, an alternative current balancing method is proposed in this paper and a prototype is presented to verify the functional capability. II. PRINCIPLE OF OPERATION A. The Effect of Different Gain Characteristics Although the phase synchronization of two paralleled LLC converters impedes the use of common active current sharing methods, the dc gain characteristic of the LLC converter can be used to realize frequency controlled current balancing. Fig. 3 shows the typical gain characteristic of the LLC converter. The slope of the dc gain depends on the inductance ratio h assuming the normalized load Q being constant. nv o V / g 4 /db - 3 4 5 h =,3,4,5 Q =.5.4.6.8..4.6 Normalized Frequency (F) Figure 3. DC gain curves of the LLC resonant circuit vs. normalized switching frequency F for different values of the inductance ratio h and constant normalized load Q As the basic idea of this work, paralleling of two converters with different dc gain characteristics introduces well defined dependence between the switching frequency f s and the symmetry of output currents. B. Considering Part Tolerances The preferred operating region of the LLC converter is below but near the resonant frequency f. This is due to reduced voltage stress of the output rectifier diodes below resonance (discontinuous conduction mode) and the lower rms value of the resonant current near to the resonant frequency f []. In order to ensure operation below resonance the part tolerances of the resonant circuit elements have to be taken into account. The impact of the tolerances on the resulting operating region of the LLC converter is demonstrated in Fig. 4. The first graph shows equal resonant frequencies (f A = f B ), but different dc gain slope of converter A and B, realized by adjusting the inductance L m of each converter A and B to the values h A = 8 and h B = 4, thus nv o V / g - /db - - h B L ma > L mb and h A > h B. (3) At the intersection of the curves the point of balanced load sharing is obtained. It appears for F =, thus at the identical resonant frequency of both converters. For the second and third graph, two different cases are investigated: L sa = 5% L sb (second graph) L sb = 5% L sa (third graph) h B h B h A h A h A f A = f B f A < f B f A > f B point of balanced load sharing point of balanced load sharing point of balanced load sharing.7.8.9...3 Normalized Frequency (F) Figure 4. DC gain curves of LLC resonant circuit for different cases: operating point at resonance (f s = f A = f B ) operation point below resonance (f A < f B < f s ) operating point above resonance (f s > f A > f B ) Normalized frequency scaled to F = f s / f A Note, that the point of balanced load sharing moves either below resonance (f A < f B ), or above resonance (f A > f B ). For the preferred operation below resonance, the design of the values L s and C s must ensure that the point of balanced load sharing does not move beyond the resonant frequency of converter A. Considering the example of Fig. 3, second graph, operation below resonance can be ensured for L s = ± 7.5%, if the tolerance of C s is neglected. Of course for a real design, tolerance of C s has to be considered, too.

III. DESIGN PROCEDURE In the last years several discussions have been published in literature about the design of LLC resonant converters in the scope of front end dc-dc conversion [][][5]. However, because of the distinctive load characteristic of the LLC converter it is difficult to state a general approach for LLC circuit design. The essential design procedure can be summarized as follows: The specifications of input voltage, output voltage, switching frequency and maximal load must be treated to evaluate the maximal normalized load Q max, inductance ratio h and resonant frequency f of the final converter [5]. Based on these values, the circuit element values L s, C s and L m can be calculated. Nevertheless, there are still degrees of freedom in the design procedure, which can cover e.g. component stress or efficiency optimization. Yet another difficulty is the lack of an accurate analytical description of the transfer characteristic of the LLC converter. The fundamental frequency method can only be used for an approximative description of the transfer characteristic, and accurate methods, such as discrete time analysis, Extended Describing Functions [] or even Simulation, are complex and time consuming. Hence, for the design process of the proposed synchronized paralleling of two LLC converters a special simplification is proposed. Furthermore, the maximal allowed normalized load Q max versus resonant voltage amplitude v Csmax can be expressed as: Qmax ( F, h, vcs max ) v Cs max 4Fh + (4Fh + π ( F )) πh Vg / A special aspect in the design of resonant converters is over current protection. A convenient method is diode clamping of the resonant capacitance, when it is split into two capacitances C s / as shown in Fig. 6 []. In this configuration Diodes D 3 resp. D 4 become conducting if the resonant voltage v Cs reaches upper (=V g ) or lower (=V) voltage rail, resulting in freewheeling of resonant current and limited power transfer. (5) i const = Iˆ m m Figure 6. Half bridge LLC resonant converter modified for over current protection v ( T/ ) v Cs Csmax Figure 5. Calculated converter waveforms at nominal load The design is carried out at the point of nominal load. Fig.5 shows calculated converter waveforms at nominal load. Note, that the resonant voltage amplitude v Csmax is preliminary considered to be just lower than half of the input voltage V g in case of half bridge configuration. Therefore the resonant current i r can be assumed to be constant for t < t < T/ (T: switching period). Utilizing the described simplifications, the converter gain can be expressed analytically as: First step in the design process is to choose the magnetizing inductance L ma in order to set the peak value of the magnetizing current Î ma. Because Î m represents the turn-off current for the primary MOSFETs, the magnetizing current should be small to minimize reactive power loss but also large enough to discharge the MOSFET output capacitance C oss in order to achieve Zero Voltage Switching. The final design step is of an iterative nature. Choosing values for the ratio of the main inductances L ma /L mb the ratio of the resonant inductances L sa /L sb the ratio of the resonant capacitances C sa /C sb the aspired switching frequency f Z, the final design must fulfill the above mentioned design criteria s under worst case conditions of part tolerances. To proof the aspired switching frequency f Z, using (4), M(f Z,h A ) = M(f Z,h B ) can be solved to M ( F, h) = π + 4 ( ) h F. (4) f h f h B A A B Z = hb ha f. (6) To proof the maximum allowed resonant voltage amplitude v Csmax, (5) can be used by setting v Csmax to V g and plotting Q max versus h as demonstrated in Fig. 7.

TABLE I SPECIFICATION OF A SINGLE LLC CONVERTER V g V o 3 V 48 V n 3 P o I o f s kw.8 A khz TABLE II CIRCUIT PARAMETERS OBTAINED FROM THE DESIGN PROCESS Converter A Converter B f s 6 khz 3 khz L m 9 µh 5 µh Figure 7. Verifying circuit design in regard to overcurrent protection by means of Q-h diagram It is beyond the scope of this paper to give an accurate design procedure for the paralleling of LLC resonant converters, because an exact description of the LLC converter characteristic requires the use of improved afore mentioned analysis methods. IV. PROTOTYPE Synchronized Paralleling of LLC resonant converters reduces the ac component of the output voltage, but it restricts the applied switching frequency to the point of balanced load sharing. Besides other possible applications, a three stage power supply structure as investigated in [4] was chosen to evaluate the functional capability of the proposed method using a prototype sample. The isolating dc-dc stage of the three stage structure seems to be well suited to comprise the proposed synchronized paralleling of two LLC converters. As shown in Fig. 8, an additional non-isolating buck converter is used to control the output voltage V o and to comply with hold up requirements for front end power supplies. For a prototype design the specification given in Table I h.. L s 8. µh 7.7 µh C s 66 nf 66 nf was selected. The total output power of both converters is kw and the total output current 4.6 A at 48 V output voltage. Applying the design process described in section III and considering part tolerances of Lm: ± 4% Ls: ± 4% Cs: ± %, the parameters given in Table II result. However, for performance evaluation the exact circuit element values are used in the prototype sample. The measurement results shown in Fig. 9 demonstrate the static behavior of the current balancing functionality. The total input current splits into converter A and B depending on the actual switching frequency. At about khz, the input current of each converter is equal, and due to the same input voltage, the input power as well. d voltage control balanced load control + - i oa i ob Vo V g LLC A PFC 4 VDC 3 VDC Buck 48 VDC Load hold up V g LLC B Figure 8. Example of SMPS with paralleled LLC resonant converters

input current / A LLC Converter A LLC Converter B 4,5 4, 3,7 3,3,9,5 8 9 Fig. depicts the stationary behavior of the implemented current balancing control. The frequency variation ranges from about 3.5 khz to about 5 khz for the upper half of the output power spectrum and therefore is very small. The overall frequency range of about 7 khz is also acceptable. Note, that no measurement for the worst case of component tolerances was conducted, yet. The dynamic behavior of the current balancing control is demonstrated in Fig.. Furthermore stability of the control loop is achieved in the total operating range. Frequency / khz Figure 9. Measurement of input current split versus switching frequency at 5% of rated output power input current of LLC converters A and B (.54A/Div) W 5W 4W Amplitude / db Phase / degree 5-5 - -5 - -5-3 -45-9 -35-8 -5-7 Frequency / Hz Figure. Measurement of small signal characteristic between switching frequency (f s ) and current balance (i ob - i oa ) switching frequency (5kHz/Div, ac) t (ms/div) Figure. Step load measurement with levels of 5 W and W of output power The LLC resonant converter topology is broadly accepted to be a candidate for high efficient dc to dc power conversion. However, the three stage approach of a power supply structure [4] used in this work can not be a high efficiency design because the additional non isolating buck converter gives to much penalty to the overall efficiency. Nevertheless, the proper function of the proposed method was evaluated and can be adopted to other power supply structures. For the controller design of the current balancing control loop the small signal characteristic was measured by an impedance analyzer (see Fig. ). A PID-T type controller was chosen to regulate the current balance. switching frequency / khz 8 6 4 5 5 5 efficiency / % 98 96 94 9 9 5 5 output power / W Figure 3. Efficiency of the paralleled LLC converters; measurements for different MOSFET types output power / W Figure. Regulated switching frequency versus output power An efficiency measurement of the LLC stage is shown in Fig. 3. The measurement was conducted for two MOSFET types of different on state resistance R DSon. The

8 mω type MOSFET gives a % decrease at full load compared to the 9 mω type. The ac component of the output voltage at full load is approximately 4 mv, which is in the range of % of the dc output voltage (Fig. 4). The capacitive output filter with a total capacitance of 3 mf comprises three 63 V rated electrolytic capacitors with mf capacitance each. i ra u o (5mV/Div) Δu o 4mV i rb (A/Div) t (μs/div) Figure 4. AC component of output voltage at rated load V. CONCLUSION AND OUTLOOK Phase shifted paralleling of two LLC resonant converters reduces the current stress in the output filter capacitor. Reliable operation of two paralleled and phase shifted LLC resonant converters seems to be possible if frequency controlled current balancing is applied. Therefore, component tolerances of the resonant circuit elements have to be considered in the design procedure. To demonstrate the functional capability of the current balancing control, a power supply prototype consisting of a three stage converter structure has been presented. More applications can be investigated in the future. ACKNOWLEDGMENT The Author thanks various electrical engineers at Delta Energy Systems GmbH, Soest for their encouragement. REFERENCES [] B. Yang: Topology Investigation for Front End DC/DC Power Conversion for Distributed Power System, Dissertation Virginia Polytechnic Institute and State University, 3. [] B.Yang, F.C. Lee, A.J. Zhang, and G. Huang: LLC Resonant Converter for Front End DC/DC Conversion, APEC, vol., pp. 8-. [3] J.F. Lazar and R. Martinelli: Steady-State Analysis of the LLC Series Resonant Converter, APEC, vol., pp.78-735. [4] H. Wetzel, N. Fröhleke, J. Böcker, and P. Ide: High Efficient 3kW Three-Stage Power Supply, APEC 6, pp. 36-367. [5] B. Lu, W. Liu, Y. Liang, F.C. Lee, and J.D. van Wyk: Optimal Design Methodology for LLC Resonant Converter, APEC 6, pp. 533-538. [6] S. Luo, Z. Ye, R.L. Lin, and F.C. Lee: A classification and evaluation of paralleling methods for power supply modules, PESC 999, vol., pp. 9-98. [7] J. Ben Klaassens, W.L.F.H.A. Moize de Chateleux, and M.P.N. van Wesenbeeck: Phase-Staggering Control of a Series-Resonant DC-DC Converter with Paralleled Power Modules, IEEE Trans. Power Electron., vol. 3, pp. 64-73, April 988. [8] I. Batarseh: Resonant Converter Topologies with Three and Four Energy Storage Elements, IEEE Trans. Power Electron., vol. 9, pp. 64-73, Jan. 994.