CCD30 11 Back Illuminated High Performance CCD Sensor

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CCD30 11 Back Illuminated High Performance CCD Sensor FEATURES * 1024 by 256 Pixel Format * 26 mm Square Pixels * Image Area 26.6 x 6.7 mm * Wide Dynamic Range * Symmetrical Anti-static Gate Protection * Back Illuminated Format for Enhanced Quantum Efficiency * 3 Standard Anti-reflection Coatings * Advanced Inverted Mode Operation (AIMO) * Anti-blooming Readout Register * Zero Light Emitting Output Amplifier APPLICATIONS * Spectroscopy * Scientific Imaging * TDI Operation INTRODUCTION The back illuminated CCD30-11 is a high performance CCD sensor designed as an upgrade for the standard CCD30-11, for use in the scientific spectroscopy instrument market, where enhanced quantum efficiency is required. With an array of 1024 x 256 26 mm square pixels it has an imaging area to suit most spectrometer outputs of 26.6 x 6.7 mm (1.05 x 0.26 inch). The standard back illuminated CCD30-11 is available with antireflection (AR) coatings optimised for broadband and infrared operation; an uncoated option is also available. For use in ultraviolet systems, an option made with a QE enhanced process and an ultraviolet coating is also available. The readout register is organised along the long (1024 pixel) edge of the sensor and contains an anti-blooming drain to allow high speed binning operations of low level signals which may be adjacent to much stronger signals. The novel output amplifier design has no light emission. Standard three-phase clocking and buried channel charge transfer are employed and Advanced Inverted Mode Operation (AIMO) or MPP is included as standard. The back illuminated CCD30-11 is packaged in a 20-pin DIL ceramic package and is pin compatible (but not completely clock compatible) with the standard CCD30-11. Designers are advised to consult e2v technologies should they be considering using CCD sensors in abnormal environments or if they require customised packaging. TYPICAL PERFORMANCE Pixel readout frequency..... 20 5000 khz Output amplifier sensitivity....... 1.5 mv/e 7 Peak signal........... 500 ke 7 /pixel Dynamic range........ 83 000:1 Spectral range....... 200 1060 nm Readout noise (at 233 K, 20 khz).... 6 e 7 r.m.s. QE at 500 nm.......... 78 % Peak output voltage........ 750 mv GENERAL DATA Format Image area......... 26.6 x 6.7 mm Active pixels (H)........ 1024 (V)......... 255 (usable) Pixel size.......... 26 x26 mm Package Package size......... 32.89 x 20.07 mm Number of pins.............. 20 Inter-pin spacing........... 2.54mm Inter-row spacing........... 15.24 mm Window material..... quartz or removable glass e2v technologies (uk) limited, Waterhouse Lane, Chelmsford, Essex CM1 2QU, UK Telephone: +44 (0)1245 493493 Facsimile: +44 (0)1245 492492 e-mail: enquiries@e2v.com Internet: www.e2v.com Holding Company: e2v technologies plc e2v technologies inc. 4 Westchester Plaza, PO Box 1482, Elmsford, NY10523-1482 USA Telephone: (914) 592-6050 Facsimile: (914) 592-5148 e-mail: enquiries@e2vtechnologies-na.com # e2v technologies (uk) limited 2006 A1A-100005 Issue 7, March 2006 411/9572

PERFORMANCE Min Typical Max Peak charge storage (see note 1) 400k 500k e 7 /pixel Peak output voltage (unbinned) 750 mv Dark signal at 293 K (see note 2) 1000 2000 e 7 /pixel/s Charge transfer efficiency (see note 3): parallel 99.9999 % serial 99.9993 % Output amplifier sensitivity 1.3 1.8 2.3 mv/e 7 Readout noise at 233 K (see note 4) 6 8 rms e 7 /pixel Readout frequency (see note 5) 20 5000 khz Dark signal non-uniformity at 293 K (std. deviation) 250 500 e 7 /pixel/s Binned column dark signal non-uniformity at 293 K (std. deviation) 30 60 e 7 /pixel/s Output node capacity relative to image section 2.0 Spectral Response Minimum Response (QE) Response Wavelength (nm) UV Coated IR Coated Broadband Coated Uncoated Non-uniformity (1s) 300 45 not specified not specified not specified % 350 50 20 25 10 5 % 400 55 30 55 25 3 % 500 60 55 75 55 3 % 650 60 80 75 50 3 % 900 30 35 30 30 5 % ELECTRICAL INTERFACE CHARACTERISTICS Electrode capacitances (measured at mid-clock level): Min Typical Max I1/I1 interphase 2.0 nf R1/R1 interphase 70 pf I1/SS 11 nf R1/SS 185 pf Output impedance 300 O NOTES 1. Signal level at which resolution begins to degrade. 2. The typical average (background) dark signal at any temperature T (kelvin) between 230 and 300 K is given by: Q d /Q d0 = 1.14 x 10 6 T 3 e 79080/T where Q d0 is the dark current at 293 K. Note that this is typical performance and some variation may be seen between devices. Below 230 K additional dark current components with a weaker temperature dependence may become significant. 3. CCD characterisation measurements made using charge generated by X-ray photons of known energy. 4. Measured using a dual-slope integrator technique (i.e. correlated double sampling) with a 10 ms integration period. 5. Readout above 5000 khz can be achieved but performance to the parameters given cannot be guaranteed. 100005, page 2 # e2v technologies

BLEMISH SPECIFICATION Traps Pixels where charge is temporarily held. Traps are counted if they have a capacity greater than 200 e 7 at 233 K. Slipped columns Are counted if they have an amplitude greater than 200 e 7. Black spots Are counted when they have a responsivity of less than 80% of the local mean signal. White spots Are counted when they have a generation rate 100 times the specified maximum dark signal generation rate at 293 K (measured between 233 and 273 K). The typical temperature dependence of white spot blemishes is different from that of the average dark signal and is given by: Q d /Q d0 = 122T 3 e 76400/T White column Black column A column which contains at least 9 white defects. A column which contains at least 9 black defects. GRADE 0 1 2 Column defects: black or slipped 0 2 6 white 0 0 0 Black spots 12 25 120 Traps 4200 e 7 1 2 5 White spots 20 30 50 Minimum separation between adjacent black columns........ 50 pixels Note The effect of temperature on defects is that traps will be observed less at higher temperatures but more may appear below 233 K. The amplitude of white spots and columns will decrease rapidly with temperature. TYPICAL OUTPUT CIRCUIT NOISE (Measured using clamp and sample) 15 7411 NOISE EQUIVALENT SIGNAL (e r.m.s.) 10 5 0 10k 50k 100k 500k 1M 5M FREQUENCY (Hz) # e2v technologies 100005, page 3

TYPICAL SPECTRAL RESPONSE (At 720 8C, no window) 90 7410A 80 BROADBAND COATED IR COATED 70 UV COATED 60 UNCOATED 50 40 30 QUANTUM EFFICIENCY (%) 20 10 0 200 300 400 500 600 700 800 900 1000 1100 WAVELENGTH (nm) TYPICAL VARIATION OF DARK SIGNAL WITH SUBSTRATE VOLTAGE 10 5 7408A DARK SIGNAL AT 293 K (e 7 /pixel/s) 10 4 TYPICAL RANGE 10 3 10 2 0 1 2 3 4 5 6 7 8 9 10 SUBSTRATE VOLTAGE (V) 100005, page 4 # e2v technologies

TYPICAL VARIATION OF DARK SIGNAL WITH TEMPERATURE 10 4 7407A 10 3 10 2 10 DARK SIGNAL (e 7 /pixel/s) 1 10 71 10 72 740 720 0 20 40 PACKAGE TEMPERATURE (8C) DEVICE SCHEMATIC 7406 8 BLANK ELEMENTS SG DD SS RD OD OS OG 20 19 18 17 16 15 14 13 12 11 SUB 8 BLANK ELEMENTS READOUT REGISTER IMAGE SECTION 1024 x 256 ACTIVE ELEMENTS (255 USABLE ROWS) TOP VIEW 1 2 3 4 5 6 7 8 9 10 I13 I12 I11 SS 1R R13 R11 R12 # e2v technologies 100005, page 5

CONNECTIONS, TYPICAL VOLTAGES AND ABSOLUTE MAXIMUM RATINGS PULSE AMPLITUDE OR DC LEVEL (V) (see note 6) MAXIMUM RATINGS PIN REF DESCRIPTION Min Typical Max with respect to V SS 1 No connection 2 I13 Image section, phase 3 (clock pulse) 8 12 15 +20 V 3 I12 Image section, phase 2 (clock pulse) 8 12 15 +20 V 4 I11 Image section, phase 1 (clock pulse) 8 12 15 +20 V 5 SS Substrate 8 9.5 11 6 1R Output reset pulse 8 12 15 +20 V 7 R13 Readout register, phase 3 (clock pulse) 8 11 15 +20 V 8 R11 Readout register, phase 1 (clock pulse) 8 11 15 +20 V 9 R12 Readout register, phase 2 (clock pulse) 8 11 15 +20 V 10 No connection see note 7 11 No connection see note 7 12 OG Output gate 1 3 5 +20 V 13 OS Output transistor source see note 8 70.3 to +25 V 14 OD Output drain 27 29 32 70.3 to +25 V 15 RD Reset transistor drain 15 17 19 70.3 to +25 V 16 SS Substrate 8 9.5 11 17 No connection 18 DD Diode drain 22 24 25 70.3 to +25 V 19 SG Spare gates 0 0 V SS +19 +20 V 20 No connection If all voltages are set to the typical values, operation at or close to specification should be obtained. Some adjustment within the minimum maximum range specified may be required to optimise performance. Voltage between pairs of pins: OS to OD + 15 V. Maximum current through any source or drain pin: 10 ma. OUTPUT CIRCUIT 6923B RD 1R I13 (SEE NOTE 9) OD R13 OG OS OUTPUT EXTERNAL LOAD (SEE NOTE 8) SS SS 0 V NOTES 6. Readout register clock pulse low levels + 1 V; other clock low levels 0 + 0.5 V. 7. There are no temperature sensing diodes in the back-thinned version of the CCD30-11. 8. Not critical; can be a 1 5 ma constant current source, or 5 10 ko resistor. 9. The amplifier has a DC restoration circuit, which is activated internally whenever I13 is pulsed high. 100005, page 6 # e2v technologies

FRAME READOUT TIMING DIAGRAM I11 CHARGE COLLECTION PERIOD READOUT PERIOD 5256 CYCLES SEE DETAIL OF LINE TRANSFER 7131 I12 I13 R11 SEE DETAIL OF OUTPUT CLOCKING R12 R13 1R OUTPUT SWEEPOUT FIRST VALID DATA DETAIL OF LINE TRANSFER t wi 7132A I11 1 / 3 T i t oi t li I12 t oi t li I13 t dri T i t dir R11 R12 R13 1R # e2v technologies 100005, page 7

DETAIL OF OUTPUT CLOCKING 7133A R11 T r t or R12 R13 t wx t dx 1R OUTPUT VALID SIGNAL OUTPUT OS RESET FEEDTHROUGH LINE OUTPUT FORMAT 7130A 8 BLANK 8 BLANK 1024 ACTIVE OUTPUTS CLOCK TIMING REQUIREMENTS Symbol Description Min Typical Max T i Image clock period 15 30 see note 10 ms t wi Image clock pulse width 7 15 see note 10 ms t ri Image clock pulse rise time (10 to 90%) 0.5 2 0.5t oi ms t fi Image clock pulse fall time (10 to 90%) t ri 2 0.5t oi ms t oi Image clock pulse overlap 3 5 0.2T i ms t li Image clock pulse, two phase low 3 5 0.2T i ms t dir Delay time, I1 stop to R1 start 3 5 see note 10 ms t dri Delay time, R1 stop to I1 start 1 2 see note 10 ms T r Output register clock cycle period 200 see note 11 see note 10 ns t rr Clock pulse rise time (10 to 90%) 50 0.1T r 0.3T r ns t fr Clock pulse fall time (10 to 90%) t rr 0.1T r 0.3T r ns t or Clock pulse overlap 20 0.5t rr 0.1T r ns t wx Reset pulse width 30 0.1T r 0.2T r ns t rx,t fx Reset pulse rise and fall times 20 0.5t rr 0.2T r ns t dx Delay time, 1R low to R13 low 30 0.5T r 0.8T r ns NOTES 10. No maximum other than that necessary to achieve an acceptable dark signal at the longer readout times. 11. As set by the readout period. 100005, page 8 # e2v technologies

OUTLINE (All dimensions without limits are nominal) A 6911B M D 20 11 F C B E 1 10 IMAGING AREA COVERGLASS SEE NOTE L PIN 1 H J G Outline Note The device is normally supplied with a temporary glass window for protection purposes. It can also be supplied with a fixed, quartz or fibre-optic window where required. K Ref Millimetres A 32.89 + 0.38 B 20.07 + 0.25 C 6.7 D 3.30 + 0.33 E 15.24 + 0.25 F 0.254 + 0.051 7 0.025 G 5.2 H 0.46 + 0.05 J 2.54 + 0.13 K 22.86 + 0.13 L 1.65 + 0.56 M 26.6 # e2v technologies 100005, page 9

ORDERING INFORMATION Options include: * Temporary Quartz Window * Permanent Quartz Window * Temporary Glass Window For further information on the performance of these and other options, please contact e2v technologies. HANDLING CCD SENSORS CCD sensors, in common with most high performance MOS IC devices, are static sensitive. In certain cases a discharge of static electricity may destroy or irreversibly degrade the device. Accordingly, full antistatic handling precautions should be taken whenever using a CCD sensor or module. These include:- * Working at a fully grounded workbench * Operator wearing a grounded wrist strap * All receiving socket pins to be positively grounded * Unattended CCDs should not be left out of their conducting foam or socket. Evidence of incorrect handling will invalidate the warranty. All devices are provided with internal protection circuits to the gate electrodes (pins 2, 3, 4, 6, 7, 8, 9, 12, 19) but not to the other pins. HIGH ENERGY RADIATION Device characteristics will change when subject to ionising radiation. Users planning to operate CCDs in high radiation environments are advised to contact e2v technologies. TEMPERATURE LIMITS Min Typical Max Storage....... 73 373 K Operating...... 73 233 323 K Operation or storage in humid conditions may give rise to ice on the sensor surface on cooling, causing irreversible damage. Device heating/cooling....... 5 K/min max Whilst e2v technologies has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof and also reserves the right to change the specification of goods without notice. e2v technologies accepts no liability beyond that set out in its standard conditions of sale in respect of infringement of third party patents arising from the use of tubes or other devices in accordance with information contained herein. 100005, page 10 Printed in England # e2v technologies