Optimization of the THD in a Multi-Level Single-Phase Converter using Genetic Algorithms.

Similar documents
The Application of Genetic Algorithms in Electrical Drives to Optimize the PWM Modulation

THD Minimization in Single Phase Symmetrical Cascaded Multilevel Inverter Using Programmed PWM Technique

Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches

CHAPTER 5 PERFORMANCE EVALUATION OF SYMMETRIC H- BRIDGE MLI FED THREE PHASE INDUCTION MOTOR

Symmetrical Multilevel Inverter with Reduced Number of switches With Level Doubling Network

CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS

Reduction in Total Harmonic Distortion Using Multilevel Inverters

CHAPTER 3 SINGLE SOURCE MULTILEVEL INVERTER

DWINDLING OF HARMONICS IN CML INVERTER USING GENETIC ALGORITHM OPTIMIZATION

Simulation of Cascade H-Bridge Multilevel Inverter With Equal DC Voltage Source

Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor

Speed Control of Induction Motor using Multilevel Inverter

COMPARATIVE ANALYSIS OF SELECTIVE HARMONIC ELIMINATION OF MULTILEVEL INVERTER USING GENETIC ALGORITHM

Performance Improvement of Multilevel Inverter through Trapezoidal Triangular Carrier based PWM

Simulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink

The Selective Harmonic Elimination Technique for Harmonic Reduction of Multilevel Inverter Using PSO Algorithm

Hardware Implementation of SPWM Based Diode Clamped Multilevel Invertr

Performance Evaluation of a Cascaded Multilevel Inverter with a Single DC Source using ISCPWM

Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive

Total Harmonic Distortion Minimization of Multilevel Converters Using Genetic Algorithms

Harmonic Evaluation of Multicarrier Pwm Techniques for Cascaded Multilevel Inverter

Nine-Level Cascaded H-Bridge Multilevel Inverter Divya Subramanian, Rebiya Rasheed

Simulation of Single Phase Multilevel Inverters with Simple Control Strategy Using MATLAB

Modified Multilevel Inverter Topology for Driving a Single Phase Induction Motor

A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity

Three Phase 11-Level Single Switch Cascaded Multilevel Inverter

A Novel Cascaded Multilevel Inverter Using A Single DC Source

A Comparative Modelling Study of PWM Control Techniques for Multilevel Cascaded Inverter

New model multilevel inverter using Nearest Level Control Technique

A COMPARITIVE STUDY OF THREE LEVEL INVERTER USING VARIOUS TOPOLOGIES

PF and THD Measurement for Power Electronic Converter

A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications

Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor

Fifteen Level Hybrid Cascaded Inverter

COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION

Performance Evaluation of Multi Carrier Based PWM Techniques for Single Phase Five Level H-Bridge Type FCMLI

HIGH-LEVEL MULTI-STEP INVERTER OPTIMIZATION, USING A MINIMUM NUMBER OF POWER TRANSISTORS.

Power Quality Enhancement of Diode Clamped Multilevel Inverter Using Different Modulation Schemes

A Comparative Study of SPWM on A 5-Level H-NPC Inverter

Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive

An Implementation of 9-Level MLI using IPD-Topology for Harmonic Reduction

Speed Control of Multi Level Inverter Designed DC Series Motor with Neuro-Fuzzy Controllers

International Journal of Advance Engineering and Research Development

Design and Development of Multi Level Inverter

Study of five level inverter for harmonic elimination

Improving Passive Filter Compensation Performance With Active Techniques

NEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER

Reduced PWM Harmonic Distortion for a New Topology of Multilevel Inverters

CHAPTER 4 MODIFIED H- BRIDGE MULTILEVEL INVERTER USING MPD-SPWM TECHNIQUE

Keywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion.

Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive

Harmonic elimination control of a five-level DC- AC cascaded H-bridge hybrid inverter

A Fifteen Level Cascade H-Bridge Multilevel Inverter Fed Induction Motor Drive with Open End Stator Winding

Asymmetrical 63 level Inverter with reduced switches and its switching scheme

HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES USING GENETIC ALGORITHMS

SINGLE PHASE THIRTEEN LEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES USING DIFFERENT MODULATION TECHNIQUES

Analysis And Comparison Of Flying Capacitor And Modular Multilevel Converters Using SPWM

CHAPTER IV DESIGN AND ANALYSIS OF VARIOUS PWM TECHNIQUES FOR BUCK BOOST CONVERTER

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online):

IMPLEMENTATION OF A DOUBLE AC/DC/AC CONVERTER WITH POWER FACTOR CORRECTION (PFC) FOR NON-LINEAR LOAD APPLICATIONS

Comparison of GA and PSO Algorithms in Cascaded Multilevel Inverter Using Selective Harmonic Elimination PWM Technique

Cascaded Connection of Single-Phase & Three-Phase Multilevel Bridge Type Inverter

Harmonic Minimization for Cascade Multilevel Inverter based on Genetic Algorithm

INTERNATIONAL JOURNAL OF PURE AND APPLIED RESEARCH IN ENGINEERING AND TECHNOLOGY

COMPARATIVE STUDY OF PWM TECHNIQUES FOR DIODE- CLAMPED MULTILEVEL-INVERTER

ISSN: International Journal of Science, Engineering and Technology Research (IJSETR) Volume 1, Issue 5, November 2012

PERFORMANCE ENHANCEMENT OF EMBEDDED SYSTEM BASED MULTILEVEL INVERTER USING GENETIC ALGORITHM

Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.

Speed control of Induction Motor drive using five level Multilevel inverter

SWITCHING FREQUENCY HARMONIC SELECTION FOR SINGLE PHASE MULTILEVEL CASCADED H-BRIDGE INVERTERS

CHAPTER 5 MODIFIED SINUSOIDAL PULSE WIDTH MODULATION (SPWM) TECHNIQUE BASED CONTROLLER

SPECIFIC HARMONIC ELIMINATION SCHEME FOR NINELEVEL CASCADED H- BRIDGE INVERTER FED THREE PHASE INDUCTION MOTOR DRIVE

A Modified Apod Pulse Width Modulation Technique of Multilevel Cascaded Inverter Design

Hybrid 5-level inverter fed induction motor drive

Simulation of Multilevel Inverter Using PSIM

Single Phase Multi- Level Inverter using Single DC Source and Reduced Switches

CHAPTER 4 MULTI-LEVEL INVERTER BASED DVR SYSTEM

Reduction of THD in Thirteen-Level Hybrid PV Inverter with Less Number of Switches

CHAPTER 5 NOVEL CARRIER FUNCTION FOR FUNDAMENTAL FORTIFICATION IN VSI

Modeling and Analysis of Novel Multilevel Inverter Topology with Minimum Number of Switching Components

Analysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI

MODIFIED CASCADED MULTILEVEL INVERTER WITH GA TO REDUCE LINE TO LINE VOLTAGE THD

New Approaches for Harmonic Reduction Using Cascaded H- Bridge and Level Modules

Modified Transistor Clamped H-bridge-based Cascaded Multilevel inverter with high reliability.

Development of Multilevel Inverters for Control Applications

ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS

Analysis of Cascaded Multilevel Inverters with Series Connection of H- Bridge in PV Grid

Level Shifted Pulse Width Modulation in Three Phase Multilevel Inverter for Power Quality Improvement

Harmonic Analysis & Filter Design for a Novel Multilevel Inverter

COMPENSATION OF VOLTAGE SAG USING LEVEL SHIFTED CARRIER PULSE WIDTH MODULATED ASYMMETRIC CASCADED MLI BASED DVR SYSTEM G.Boobalan 1 and N.

Low Order Harmonic Reduction of Three Phase Multilevel Inverter

Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System

A NOVEL SWITCHING PATTERN OF CASCADED MULTILEVEL INVERTERS FED BLDC DRIVE USING DIFFERENT MODULATION SCHEMES

Grid Tied Solar Panel Interfacing using 2( Level Inverter with Single Carrier Sinusoidal Modulation; where N is the number of H-bridges

A Novel Multilevel Inverter Employing Additive and Subtractive Topology

IEEE Transactions On Circuits And Systems Ii: Express Briefs, 2007, v. 54 n. 12, p

Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor

Comparison of SPWM,THIPWM and PDPWM Technique Based Voltage Source Inverters for Application in Renewable Energy

THREE PHASE SEVENTEEN LEVEL SINGLE SWITCH CASCADED MULTILEVEL INVERTER FED INDUCTION MOTOR

THE problem of common-mode voltage generation in inverter-fed

Transcription:

Optimization of the THD in a Multi-Level Single-Phase Converter using Genetic Algorithms. JOSE ANTONIO ARAQUE, JORGE LUIS DÍAZ RODRÍGUEZ, ALDO PARDO GARCÍA Dept. Electrical and Computer Engineering. Faculty of Engineering and Architecture. University of Pamplona, Pamplona COLOMBIA tonyaraque@gmail.com, jdiazcu@gmail.com, apardo13@hotmail.com Abstract: - This paper presents the optimization of THD (Total harmonic distortion) in a DC-AC converter employing genetic algorithms. The selected topology for inverter circuit is the cascade multilevel converter with asymmetric DC supplies (4 stages). The aim is to reach a THD less than 5% and obtain an output waveform with a frequency of 6 Hz and an output voltage of 12 Vrms. The results were simulated in MATLAB and validated by implementing a prototype converter. Key-Words: - Multilevel converter, THD, genetic algorithm, Selective Harmonic Elimination, Genetic Algorithms, Digital Signal Processing. 1. Introduction. The multi-level inverters are an emerging technology that has arisen as an alternative to traditional dual level converters. These systems allow the conversion of electric energy provided by sources of direct current, such as batteries or solar panels, in an ideal sinusoidal alternating current, whose parameters (amplitude, frequency) can be fixed or variable. The general concept [1] involves a high number of switches based on power semiconductors that develop the conversion in small steps, achieving an output waveform with low harmonic content. The first work related to conversion in multiple steps or tension levels was patented in the year 1975 [2]. Previously, in the year 198 a variant of multilevel converter was patented [3] to which anchoring diodes were added. The topology of the multi-level converter anchored by a capacitor (clamped capacitor) was introduced in the mid-199s [4], [5]. This topology offers various advantages over the NPC (Neutral Point Clamped diode), as is clearly exhibited in [6]. The multi-level converter in succession with separate DC sources was patented in the year 1997 [7]. From the first works on multi-level converters, important advances that have allowed the development of this technology have been accomplished. Amongst the most relevant advances that, [6] and [7] can be cited, where there is a review of the state of art multi-level converters. What s more, [9] presents a very interesting work that addresses the issue of the simulation of multi-level converters. Another significant contribution has been made by Masters and PhD works focused on the multilevel converters, within those [1-13] are cited. In order to evaluate the quality of the electric energy generated by an inverter circuit the THD or total harmonic distortion, which is a measure of the harmonic content of the output waveform, are usually used. The lower the THD, the better the quality of the signal. Due to the fact that in the inverter circuits the output waveform is generated by means of switching semiconductor devices, it is necessary to find the appropriate trip times that allow the reduction of the THD. Therefore, this need can be seen as an optimization problem. On the other hand, heuristic optimization techniques have emerged as an alternative to the classic methods based on the statistics. The main reason is that it is inspired by natural processes resulting in them being less affected by the local maximum than the traditional techniques. Such is the case of genetic algorithms based on natural selection to find optimal solutions in a research space imitating biological processes such as crossing and mutation. The work is organized as follows: section 2 presents the basic concepts of the multi-level convertors. In section 3, the types of modulation employed in these types of convertors are studied. ISBN: 978-1-6184-189- 326

Section 4 presents the concepts related to genetic algorithms. In section 5 the optimization problem is outlined, meanwhile in section 6 the results of the simulation obtained are presented. Finally, section 7 shows the validation of the simulation results through the physical implementation of the inverter. 2.2 Multi-Level Inverter in Cascade This topology is based on the serial connection of single-phase inverters with independent power sources. Figure No 3, shows the power circuit for a single-phase inverter of three stages: 2. Multi-Level Inverters 2.1 Multi-Level Conversion Power multi-level conversion was introduced at the beginning of the 198s. The general concept involves the use of a high number of switching semiconductor devices to develop the conversion in small voltage steps. A schematic diagram of a single-phase inverter with different numbers of levels is shown in figure No 1: Fig.1. Single-Phase inverter of (a) Two levels, (b) Three levels, (c) m levels. As can be seen in figure No 2, in a multi-level converter seeks to synthesize a waveform much more similar to a sinusoidal signal, in which, depending on the number of available DC sources, the distortion will be much lower. Its main advantages include [6]: The disposition of the input voltage in multiple levels allows the working voltage of the convertor to be increased several times using the same switches as a conventional convertor. The power of the converters increases with the use of higher voltages, without the need to increase the current, therefore avoiding losses during conducting, and consequently improving the performance of the converter. Fig.3. Multi-level inverter in cascade. In the event that the power sources of all of the stages are the same, this converter is called the multi-level converter in symmetric succession. In the event that the power sources of the stages are distinct, this converter is called the multi-level converter in asymmetric succession. Generally in this type of converter, that DC sources between stages are related by a whole factor. The generation of the output waveform is obtained from the appropriate switching of each stage which allows you to add different levels of tension generated by the circuit, as seen in figure No 4: Fig.4. Synthesis of the output waveform of a multi-level inverter in symmetric cascade. Fig.2. Output voltage of the converter (a) 2 levels, (b) 3 levels, (c) 5 levels. 3. Modulation Strategies The main objectives of the of the strategy of switching DC/AC converters are, apart from regulation of amplitude and output frequency, the minimization of the harmonic content of the output voltage of the inverter and the balance of the instantaneous tensions of the converter s capacities. A classification scheme of multi-level converter switching techniques is presented in Figure No. 5. ISBN: 978-1-6184-189- 327

Fig.5. Switching strategies in multi-level converters. The most used technique in multi-level converters is staircase switching, which seeks to synthesize a staggered waveform very similar to a sinusoid with low harmonic content. This time of output can be seen in figure No 6 for 9 and 31 levels in the output of the converter. Fig.6. Staggering waveform of (a) 9 levels, (b) 31 levels. With the purpose of improving the harmonic content of the output signal of the converter, it is possible to implement a sinusoidal modulation of multiple carrier pulse width (SPWM). In this case, the sinusoidal reference signal is compared to several triangular carriers depending on the number of levels on the converter. The signals obtained are used to adequately shoot the switching devices. In figure No 7 you can see an example of this type of modulation. specific selection rules to a state that maximizes fitness or aptitude, i.e. minimizes the cost function [14]. Among the advantages of the GA the following stand out: It optimizes both with continuous and discreet variables. It allows a wide search in the solutions space to be carried out. It can handle a large number of variables. It is ideal for parallel computers. It optimizes variables with highly complex cost functions. It offers a list of ideal variables, not only a simple solution. Figure No. 8 shows the general execution scheme of the genetic algorithm. The process starts with the random generation of an initial sample, continued by the selection of the individuals who are going to be crossed. Then the descendants which are subjected to gene-altering mutation are generated. The new individuals are evaluated and inserted into the sample to finally assess the optimization criteria and verify if this is fulfilled or if it is necessary to iterate again. Fig.7. (a) SPWM Modulation of a multiple carrier, (b) Output waveform of inverter. In addition, there are other variations of the techniques mentioned such as the RPWM or random PWM, delta modulation and trapezoidal modulation, which seek, in every case, to improve the harmonic content of the output signal to minimize the THD. 4. Genetic Algorithms The genetic algorithm (GA) is a technique of search and optimization based on the principles of genetics and natural selection. An GA allows a population composed of many individuals to evolve under Fig.8. General scheme of implementation of genetic algorithm 5. Approach to the Optimization Problem As discussed in section 2.2, the multi-level converter output voltage consists of the sum of the individual levels of each converter stage, as shown in figure Nº 9. ISBN: 978-1-6184-189- 328

Therefore the genetic algorithm, takes as sample the angles. Then, in each interaction of the algorithm the operators of selection, crossover and mutation are applied to find the solution to the equation described by (4), finally the cost function is evaluated, which in this case is the THD. The algorithm stops when the stop conditions given by the number of iterations and/or the tolerance of the solution are satisfied. Fig.9. Construction of a phased signal from individual levels. The output voltage of this staggered waveform can therefore be expressed as [15]: [ ( )] ( ) (1) Where: n is the odd harmonic order (1, 3, 5, 7, 9 ) s is the number of stages of the converter. k is an integer > (1, 2, 3, 4, 5 s) is the k-th shot angle, which must satisfy: (2) From (1), the amplitude of the odd harmonics, including the fundamental component can be expressed as: ( ) (3) Expanding the previous equation you have: [ ( ) ( ) ( )] (4) Conduction angles can be selected in such a way that the entire harmonic voltage distortion is minimal. According to what is described, the problem of optimization can appear like this: Minimize: [( ) ( )] (5) Where: is the amplitude of the fundamental harmonic. is the amplitude of the n-th harmony, with odd n. Satisfying the equation (4), subject to the restrictions: (6) For n >1 odd n (7) (8) 6. Simulation Results The proposed optimization scheme was simulated in MATLAB for a 4 stage multi-level single-phase asymmetric converter (31 levels) to a desired amplitude of the fundamental component of 169.7 V (12 Vrms), an output frequency of 6 Hz and a THD <5%. For the calculation of THD the top 4 harmonics of output signal were considered. The initial sample was 2 individuals for the GA and the maximum number of iterations was 2. In figure No. 1 you can see the waveform of the output voltage of the converter as well as the harmonic spectrum in which the quality of the output signal can be seen. The optimization of the THD as the GA is running is shown in Figure No 11, where you can see that it reaches a value of 2.84%. In Figure No 12 you can observe the optimization of the shot angles represented by x k. Figure No 13 shows the evolution of the harmonics of the output signal, there you can see that as the GA runs, the fundamental harmonic is inclined to the desired value (169.7 V) while the other harmonics are inclined to zero, as it is to be expected. Amplitude (V) Magnitude (% of the fundamental) 2 1-1 -2.2.4.6.8.1.12.14.16 time (s) 1 5 5 1 15 2 25 3 35 4 45 5 Harmonic order Fig.1. Output waveform and specter of converter harmonics ISBN: 978-1-6184-189- 329

THD (% of the fundamental) 6 5.5 5 4.5 4 3.5 3 shows a diagram in blocks of the experiment. A system of data acquisition based on digital oscilloscope Agilent DSO322-A has been used to make the visualization and analysis of the waveform obtained. 2.5 2 5 1 15 2 25 3 35 Generation Fig.11. Optimization of the THD vs. Generation of the GA. Angle (degrees) 9 8 7 6 5 4 3 2 1 x1 x2 x3 x4 x5 x6 x7 x8 x9 x1 x11 x12 x13 x14 x15 Fig.14. Diagram in blocks of the system implemented. Figure Nº 15 shows the current output waveform, while in figure Nº 16 you can see the profile of harmonics. The similarity of the actual waveform and the simulated waveform should be noted. A comparison of the results obtained is shown in table Nº 1. 5 1 15 2 25 3 35 Generation Fig.12. Optimization of the shot angles vs. Generation of the GA. 2 18 16 Amplitude (V) 14 12 1 8 6 4 2 Fundamental 3th harmonic 5th harmonic 7th harmonic 9th harmonic 11th harmonic 13th harmonic 5 1 15 2 25 3 Generation Fig.13. Optimization of the harmonic components vs. Generation of the GA. Fig.15. Actual output waveform. Table 1: Comparison of results Simulation Actual values THD% 2.8 2.21 Frequency 6 6.8 (Hz) Vrms (V) 169.78 119.45 7. Implementation of the Prototype To validate the simulation results a prototype of the multi-level converter was implemented and the shot angles obtained in the control card based on a PIC18F455 were programmed. Figure No 14 ISBN: 978-1-6184-189- 33

Fig.16. Actual spectrum of harmonics. 8. Conclusions The results observed in figures Nº 9, 1, 11 and 12 show that the selected method to find the appropriate shot angles works in a satisfactory manner, allowing us to obtain a THD of just 2,84%. The physical implementation of the converter demonstrates that the shot angles found in the simulations are appropriate, allowing us to obtain a waveform and a profile of harmonics very similar to the simulations. The small difference that can be seen between the results of the simulation and the physical implementation are mainly due to shot delays that must be secured between switching devices from the same branch and small variations of DC sources. The use of genetic algorithms means that it is unnecessary to address the solution of a system of transcendental equations formally, since the GA explores within the search space from several solution points and it is not focused on finding exact solutions but the best solution to the problem. Since the GA is a meta-heuristic optimization method, each time that the GA is carried out it can reach a slightly different solution, but they satisfy the problem of minimization. References [1] Skvarenina, T. The Power Electronics Handbook. Florida: Ed. CRC Press, 22, pp. 283. [2] Baker, R. y Bennister, L. Electric power converter. U.S. Patent 3 867 643, 1975. [3] Baker, R. High-Voltage Converter Circuit. U.S. Patent 42 3 151, 198. [4] Lavieville, J. et al. Electronic circuit for converting electrical energy and power supply installation making use thereof. U.S. Patent 5668711, 1997. [5] Meynard, T. et al. Electronic circuit for converting electrical energy. U.S. Patent 5 76 188, 1998. [6] Rodriguez, J. et al. Multilevel inverters: A survey of topologies, controls and aplications. IEEE Transactions On Industrial Electronics, Vol. 49, No. 4, pp 724-738, 22. [7] Peng, F. y Lai, J. Multilevel cascade voltagesource inverter with separate DC sources. U.S. Patent 5 642 275, 1997. [8] Pandey, A. et al. A Review of Multilevel Power Converters. IE Journal-EL, 26. [9] Malinowski, M. y Styński, S. Simulation of single-phase cascade multilevel PWM converters. EUROCON 27, pp. 1524-1529. Varsovia, 27. [1] Rios, F. Diseño y construcción de un inversor trifásico multinivel. Tesis de maestría, Departamento de Ingeniería Eléctrica, Universidad Católica de Chile, Santiago de Chile, 23. [11] Negroni, J. Análisis y Diseño de Controladores para Inversores Multinivel en Sistemas Fotovoltaicos Conectados a Red. Tesis Doctoral, Barcelona, 27. [12] Lega, A. Multilevel Converters: Dual Two- Level Inverter Scheme. Tesis Doctoral, Dpt. de Ingeniería Eléctrica, Universidad de Bologna, Italia, 27. [13] Chavarría, J. Diseño e Implementación de un Inversor Multinivel para Sistemas Fotovoltaicos Conectados a Red. Tesis de Maestría, Departamento de Ingeniería Electrónica, Universidad Politécnica de Cataluña, Barcelona, 21. [14] Haupt, R. y Haupt, S. Practical genetic algorithms, Ed. Wiley-Interscience, Estados Unidos de América, 2º edición, 24. [15] Krikor, K. et al. Optimum Design of Single- Phase Cascade Multilevel Inverter Using OHESW Technique. Eng. & Tech., Vol.26, No.12, pp. 1492-157. 28. ISBN: 978-1-6184-189- 331