DESCRIPTION Both the and - Dual Monolithic timing circuits are highly stable controllers capable of producing accurate time delays or oscillation. The and - are a dual. Timing is provided by an external resistor and capacitor for each timing function. The two timers operate independently of each other, sharing only CC and ground. The circuits may be triggered and reset on falling waveforms. The output structures may sink or source ma. FEATURES Turn-off time less than µs (-) Maximum operating frequency >khz (-) Timing from microseconds to hours Replaces two timers Operates in both astable and monostable modes High output current Adjustable duty cycle TTL compatible Temperature stability of.%/ C SE- compliant to MIL-STD or JAN APPLICATIONS Precision timing Sequential timing Pulse shaping PIN CONFIGURATION GND Pulse generator Missing pulse detector Tone burst generator Pulse width modulation Time delay generator Frequency division Touch-Tone encoder Industrial controls Pulse position modulation Appliance timing Traffic light control D, F, N Packages 3 3 7 8 CC BLOCK DIAGRAM 3 CC 3 FLIP FLOP FLIP FLOP 8 GROUND 7 Touch-Tone is a registered trademark of AT&T August 3, 33 83-3 37
EQUIALENT SCHEMATIC (Shown for one circuit only) CC R R 33 R3 R K R7 K R.8K Q Q Q7 Q Q Q Q Q3 R K Q Q Q8 Q Q Q3 R8 K Q CB Q8 E Q R 3. K R Q Q7 Q Q R3 3.3K Q3 C B R Q Q GND Q R R K R K R ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # -Pin Plastic Small Outline (SO) Package to +7 C NED 7D -Pin Ceramic Dual In-Line Package (CERDIP) to +7 C NEF 8B -Pin Plastic Dual In-Line Package (DIP) to +7 C NEN B -Pin Ceramic Dual In-Line Package (CERDIP) to +7 C NE-F 8B -Pin Plastic Dual In-Line Package (DIP) to +7 C NE-N B -Pin Plastic Dual In-Line Package (DIP) - C to +8 C SAN B -Pin Ceramic Dual In-Line Package (CERDIP) - C to + C SEF 8B -Pin Plastic Dual In-Line Package (DIP) - C to + C SEN B ABSOLUTE MAXIMUM RATINGS CC SYMBOL PARAMETER RATING UNIT Supply voltage NE/SA, NE- + SE +8 P D Maximum allowable power dissipation 8 mw T A Operating temperature range NE-, NE to +7 C SA - to +8 C SE - to + C T STG Storage temperature range - to + C T SOLD Lead soldering temperature (sec max) +3 C NOTES:. The junction temperature must be kept below C for the D package and below C for the N and F packages. At ambient temperatures above C, where this limit would be exceeded, the Maximum Allowable Power Dissipation must be derated by the following: D package C/W N package 8 C/W F package C/W August 3, 3
I CC Supply current (low state) CC=, R L = 3 ma TH CC=.7 3.33.. 3.33. TRIG CC=..7...7. Philips Semiconductors Linear Products ELECTRICAL CHARACTERISTICS T A = C, CC =+ to +, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS SE NE/SA NE- Min Typ Max Min Typ Max CC Supply voltage. 8. UNIT CC =, R L = ma Timing error (monostable) R A =kω to kω t M Initial accuracy C=.µF...7 3. % t M / T Drift with temperature T=. RC 3 ppm/ C t M / S Drift with supply voltage.... %/ Timing error (astable) R A, R B =kω to kω t A Initial accuracy C=.µF 3 % t A / T Drift with temperature CC = ppm/ C t A / S Drift with supply voltage...3 %/ C Control voltage level CC =...... CC =. 3.33 3.8. 3.33. Threshold voltage CC =... 8.8.. I TH Threshold current 3 CC =, TH =. 3 3 na Trigger voltage CC =.8..... I TRIG Trigger current TRIG =.... µa Reset voltage..7...7. Reset current =....... ma I Reset current =.... ma CC = Output voltage (low) I SINK =ma.... I SINK =ma....7 SE.. NE/SA I SINK =ma. 3. OL NE-.. Output voltage (low) I SINK =ma.. CC = I SINK =8mA....3 I SINK =ma.... CC = I SOURCE =ma.. OH Output voltage (high) I SOURCE =ma 3. 3.3.7 3.3 t OFF Turn-off time NE- CC = I SOURCE =ma 3. 3.3.7 3.3 = CC... µs t R Rise time of output 3 ns t F Fall time of output 3 ns Discharge leakage current na August 3, 3
ELECTRICAL CHARACTERISTICS (Continued) SYMBOL PARAMETER TEST CONDITIONS Matching characteristics SE/- NE/SA/SEC NE-/SE-C Min Typ Max Min Typ Max Initial accuracy.... % Drift with temperature ± ppm/ C Drift with supply voltage.... %/ NOTES:. Supply current when output is high is typically.ma less.. Tested at CC = and CC =. 3. This will determine maximum value of R A +R B. For operation, the max total R=MΩ, and for operation, the maximum total R=3.MΩ.. Matching characteristics refer to the difference between performance characteristics for each timer section in the monostable mode.. Specified with trigger input high. In order to guarantee reset the voltage at reset pin must be less than or equal to.. To disable reset function, the voltage at reset pin has to be greater than.. Time measured from a positive-going input pulse from to. CC into the threshold to the drop from high to low of the output. Trigger is tied to threshold. UNIT TYPICAL APPLICATIONS One feature of the dual timer is that by utilizing both halves it is possible to obtain sequential timing. By connecting the output of the first half to the input of the second half via a.µf coupling capacitor sequential timing may be obtained. Delay t is determined by the first half and t by the second half delay. The first half of the timer is started by momentarily connecting Pin to ground. When it is timed out (determined by.r C ) the second half begins. Its duration is determined by.r C. CC CC CC CC CC k R M R 3k k 3 C µf INPUT. C µf 8. 7 3.. NOTE: All resistor values are in Ω. Sequential Timer August 3, 3
TYPICAL PERFORMANCE CHARACTERISTICS Minimum Pulse Width Required for Triggering Supply Current S Supply oltage High Output oltage Drop vs Output Source Current MINIMUM PULSE WIDTH (ns) 7 o C +7 o C...3.(X CC ) SUPPLY CURRENT ma. 8.... o C... CC OLTS..8.....8... o C = CC =... LOWEST OLTAGE LEEL OF PULSE SUPPLY OLTAGE OLTS I SOURCE ma Low Output oltage CC = Low Output oltage CC = Low Output oltae CC = OLTS NORMALIZED DELAY TIME.. o C.......... Delay Time vs Temperature OLTS NORMALIZED DELAY TIME............ Delay Time vs Supply oltage PROPAGATION ns OLTS...... Propagation Delay vs oltage Level of Trigger Pulse 3 o C +7 o C.8 + + +7 + +.8...3. TEMPERATURE o C SUPPLY OLTAGE LOWEST OLTAGE LEEL OF PULSE X CC August 3, 37