Voting/ Glide Tone Encoder

Eclipse Series RF Technology rfinfo@rftechnology.com.au August 99 Voting/ Glide Tone Encoder This manual is produced by RF Technology Pty Ltd / Leighton Place, Hornsby, NSW Australia Copyright 99, RF Technology VTE Page of

CONTENTS Page General System Description Installation and Operation Circuit Description Parts List Block Diagram 9 Board Layout Schematic Diagram VTE Page of

General System Description The Voting Tone Encoder module is for use in mobile systems employing base station signal strength voting. It provides the audio interface and signal strength encoding for the RF Technology Eclipse series receivers. The encoder is compatible with the voting equipment supplied by Mobicom Ltd. The system encodes the received signal strength information as an audio tone. The tone is varied over the range Hz to 9 Hz according to the strength of the received signal. The lowest frequency corresponds to no signal. The tone frequency increases with increasing signal strength until the maximum of 9 Hz is reached. The dynamic range of the system, the difference between the weakest and strongest received signals, is approximately db. This is much less than the total range of usable signal levels in a system, but it is sufficient to cover the range where voting is useful. The minimum usable signal is generally accepted to be db SINAD and above db SINAD there is negligible improvement in intelligibility. The voting equipment is optimized for the db SINAD range. Installation and Operation The VTE module plugs into the Eclipse series subrack. All connections are via the DB pin connector on the rear of the module. The unit is aligned at the factory and should not require realignment. The only adjustments required are the signal strength threshold and the line output level. These can be set from the front panel. An indication of the received signal strength is provided on the front panel by eight yellow LEDs. When no signal is present all of the LEDs are OFF. The lowest LED () comes ON when the signal level rises above the receiver squelch threshold. As the signal increases the lowest LED will turn OFF and the next higher LED will come ON. At some points, particularly on weak signals, the indication will flicker between adjacent LEDs. This is normal and is a consequence of the random nature of noise on radio signals. Module Connections The module requires audio, discriminator and COS signals from the Eclipse receiver and Volt dc power. The necessary connections are shown in the table below. Rx Signal Rx Pin VTE pin DIR AUDIO DISC AUDIO AUDIO GND COS COS Power VTE pin Vdc, GND, Tone Voice Output VTE pin Line [] Line [] VTE Page of

COS The receiver COS output must be changed from the factory standard "dc loop" configuration and jumpered for "free switch" output. This is accomplished by removing JP, JP and JP9. System Calibration The following procedure may be used to calibrate the encoder and set the audio output level. Apply a dbm on channel signal to the receiver with standard modulation. ( % at KHz ).. Using an audio level meter, verify that the receiver DISC AUDIO ( pin ) and DIR AUDIO ( pin ) output are between. Vrms and. Vrms. If the audio levels are not within the specified range, the receiver discriminator and line output should be reset according to the receiver maintenance manual.. Using a noise and distortion or SINAD meter to monitor the receiver DIR AUDIO output. Reduce the signal generator output until the SINAD drops to db. Note, the receiver DIR AUDIO is also connected to the test connector on the receiver front panel. The SINAD and DIR AUDIO level can be measured between pins and.. With the generator level set to obtain db SINAD, turn the Voting THRESHOLD adjustment (VTH) on the front panel fully clockwise until the lowest signal strength LED () is ON. Then slowly turn the adjustment counterclockwise until the second () signal strength LED comes ON and remains ON continuously.. Connect an audio level meter across the module Ohm line output on pins and. Set the Line adjustment on the front panel to obtain the desired output. Circuit Description The following descriptions should be read as an aid to understanding the block and circuit diagrams in this manual. Noise Signal Processing The discriminator output from the receiver contains both audio signals and noise. The audio level remains constant as the strength of the received signal changes. The level of noise varies inversely with the strength of the received signal and therefore can be used to determine the signal to noise ratio of the received signal. The discriminator audio is connected to the input of a unity gain amplifier UA. A balanced bridge circuit is used to reduce noise which may be introduced through the ground loop. The wide band discriminator signal level is adjusted by RV which serves to set the threshold of the encoder. Noise Filter Operational amplifiers UA and UB are used in active high pass filter circuits to separate the noise from the voice frequency audio. These filters effectively remove all audio frequencies below KHz leaving only the noise and distortion components. The noise and distortion are amplified by operational amplifier UB. VTE Page of

Noise Detector The amplified signal is then fed to the noise detector. The noise detector consists of UA, UB, D and associated passive components. The noise detector, a precision full wave rectifier circuit, converts the ac noise signal to a dc voltage. This dc voltage is smoothed by a low pass filter consisting of UA and associated components. UB amplifies the smoothed signal to provide Volts for the microcontroller A/D input. Microcontroller A single chip microcontroller IC U is used to generate the voting tones. It also provides an indication of the signal strength by means of eight LEDs. The conditioned dc noise level voltage is connected to the analogue to digital converter input of U. U then uses the digital noise value and the state of the COS input to determine the required tone frequency. The microcontroller timer is programmed to produce a square wave output at frequencies between. and. KHz. The square wave is level shifted by UB before being fed to a low pass filter UA. The low pass filter reduces the harmonic content of the square wave to less than %. Receiver Voice Frequency Processing The audio from the receiver direct audio output is connected to a bridge amplifier built around UA. The bridge configuration is used to reduce possibility of noise being introduced through the ground loop. Two notch filters are used to remove audio frequency components which may be present between. and. KHz. If the voice components were not removed, they would interfere operation of the voting system. The two filters consist of UB,U,U,UA and associated passive components. They are tuned by RV to Hz and by RV to Hz. Audio Summing and Output The voting tone and voice signals are combined by summing amplifier UB. The relative level of the voice and tone are set by RV and RV respectively. RV on the output of UB is used to set output level of the combined signal. The combined signal is then fed to U9. U9 is used to provide the drive for Ohm balanced lines through transformer T. VTE Page of

APPENDIX A Voting Tone Encoder Parts List RF Technology Pty. Ltd. /99 R Iss. Ref. Description Part Number C CAP U V RAD ELECTRO //U C CAP N % NPO RAD. //N C CAP N % NPO RAD. //N C CAP N % NPO RAD. //N C CAP N % NPO RAD. //N C CAP N % NPO RAD. //N C CAP % V XR RD. // C CAP P % V NPO RAD. //P C CAP % V XR RD. // C CAP P % V NPO RAD. //P C9 CAP P % V NPO RAD. //P C CAP % V XR RD. // C CAP % V XR RD. // C CAP N % V MKT RAD. //N C CAP N % V MKT RAD. //N C CAP N % V MKT RD. //N C CAP N % V MKT RAD. //N C CAP U V RB ELECTRO //U C CAP % V XR RD. // C CAP % V XR RD. // C CAP % V XR RD. // C9 CAP N % V MKT RD. //N C CAP U V RAD ELECTRO //U C CAP N % COG RAD. //N C CAP N % COG RAD. //N C CAP % V XR RD. // C CAP N % V MKT RD. //N C CAP N % COG RAD. //N C CAP N % COG RAD. //N C CAP % V XR RD. // C CAP % V XR RD. // C CAP % V XR RD. // C9 CAP N % V XR RAD. //N C CAP % V XR RD. // C CAP N % COG RAD. //N C CAP U V RB ELECTRO //U C CAP % V XR RD. // C CAP U V RB ELECTRO //U C CAP UO % V MKT //U C CAP UO % V MKT //U C CAP UO % V MKT //U C CAP % V XR RD. // C CAP N % V MKT RAD. //N C9 CAP % V MKT RD. // C CAP % V XR RD. // C CAP N % NPO RAD. //N C CAP % V XR RD. // C CAP % V XR RD. // C CAP U V RAD ELECTRO //U C CAP % V XR RD. // C CAP % V XR RD. // C CAP P % V NPO RAD. //P C CAP P % V NPO RAD. //P C CAP U V RAD ELECTRO //U C9 CAP U V RAD ELECTRO //U VTE Page of

C CAP % V XR RD. // C CAP U V RAD ELECTRO //U C CAP % V XR RD. // C CAP N % V XR RAD. //N C9 CAP N % NPO RAD. //N D DIODE SIL GP // D DIODE LED YEL RT ANG MTG //LEDY D DIODE LED YEL RT ANG MTG //LEDY D DIODE LED YEL RT ANG MTG //LEDY D DIODE LED GRN RT ANG MTG //LEDG D DIODE SILICON IN // D DIODE SILICON IN // D DIODE SILICON IN // D DIODE LED YEL RT ANG MTG //LEDY D DIODE LED YEL RT ANG MTG //LEDY D DIODE LED YEL RT ANG MTG //LEDY D DIODE LED YEL RT ANG MTG //LEDY D9 DIODE LED YEL RT ANG MTG //LEDY L INDUCTOR uh AXIAL //U P HEADER, x STRAIGHT PIN // R RES %.W AXIAL // R RES K %.W AXIAL //K R IC MICRO MCHCP9 //P9 R RES K %.W AXIAL //K R RES %.W AXIAL // R RES K9 %.W AXIAL //K9 R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R9 RES K %.W AXIAL //K R RES %.W AXIAL // R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K9 %.W AXIAL //K9 R RES K9 %.W AXIAL //K9 R RES %.W AXIAL // R RES %.W AXIAL // R RES K %.W AXIAL //K R RES %.W AXIAL // R RES K9 %.W AXIAL //K9 R9 RES K9 %.W AXIAL //K9 R RES K9 %.W AXIAL //K9 R RES K9 %.W AXIAL //K9 R RES K9 %.W AXIAL //K9 R RES K %.W AXIAL //K R RES %.W AXIAL // R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R RES %.W AXIAL // R RES %.W AXIAL // R9 RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R RES %.W AXIAL // R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // VTE Page of

R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R RES K %.W AXIAL //K R9 RES %.W AXIAL // R RES K %.W AXIAL //K R RES %.W AXIAL // R RES %.W AXIAL // R RES %.W AXIAL // R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R RES %.W AXIAL // R RES K %.W AXIAL //K R9 RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R RES %.W AXIAL // R RES K %.W AXIAL //K R RES %.W AXIAL // R RES %.W AXIAL // R RES M %.W AXIAL //M R9 RES K %.W AXIAL //K R RES K %.W AXIAL //K R RES %.W AXIAL // R RES K %.W AXIAL //K R RES 9 %.W AXIAL //9 R RES %.W AXIAL // R RES M %.W AXIAL //M R RES M %.W AXIAL //M R RES K %.W AXIAL //K R9 RES %.W AXIAL // RV TRIMPOT MULTITURN HOR // RV TRIMPOT MULITURN VERT // RV TRIMPOT MULITURN VERT // RV TRIMPOT MULITURN VERT // RV TRIMPOT MULTITURN HOR // RV TRIMPOT MULITURN VERT // T TRANSFORMER LINE OHM // U IC DUAL FET OP AMP DIP //C U IC DUAL FET OP AMP DIP //C U IC MICRO MCHCP9 //P9 U IC VOLT REG L TO9M //L U IC VOLT REG L TO9M //L U IC DUAL FET OP AMP DIP //C U IC DUAL CMOS OP AMP DIP // U IC DUAL CMOS OP AMP DIP // U IC DUAL FET OP AMP DIP //C U IC DUAL FET OP AMP DIP //C U IC DUAL FET OP AMP DIP //C U IC DUAL FET OP AMP DIP //C U9 IC DUAL OP AMP MCB // Y CRYSTAL. MHz /9/M VTE Page of

A/D LED DRIVER Title Date: D? LED RF TECHNOLOGY PTY LTD VOTING TONE ENCIDER Block Diagram 9 August 99 Sheet of DISCRIMINATOR INPUT BUFFER HIGH PASS NOISE FILTER NOISE AMPLIFIER NOISE DETECTOR LOW PASS FILTER MICROCONTROLLER UA UB, UA UB UA, UB, D UA, UB U D Rx DISC. AUDIO RV SIGNAL STRENGTH DISPLAY D THRESHOLD ADJUSTMENT RV TONE GEN. TONE LEVEL ADJUSTMENT TONE LOW PASS FILTER UA, UB RECEIVER AUDIO INPUT BUFFER AUDIO NOTCH FILTER, 9 Hz AUDIO NOTCH FILTER, Hz AUDIO SUMMING AMPLIFIER OHM LINE DRIVER UA UB, UA, UB UA, UB, UA UB U9A, U9B T Rx AUDIO RV RV LINE OUTPUT TRANSFORMER Rx AUDIO LEVEL ADJUST LINE OUTPUT LEVEL ADJUST VOTING TONE ENCODER SIGNAL FLOW Size Document Number REV A

RF TECHNOLOGY PTY LTD Title Size Document Number REV Date: Sheet of NULL 9 NULL TONE LEVEL RX LEVEL THRESHOLD OUTPUT LEVEL DISC AUD GND COS COS DIR AUD LINE LINE DISC ND_OUT AUD GND DIR AUD AUD GND LINE LINE TCMP TCMP ND_OUT COS................ F PC FUSE D N C U R C C U C C R R K9 C N C9 N C N R K R K C N R K C N C N R K R K C N R9 C R C C P C9 P R K D N R C C U C R R K9 R K9 R K R K C R UA TLC C N R K R9 K C R R C R K R K C9 N R C N R K R9 C U R C U R R R K R K R K R C R K R K R K R K R R C C R K R L U C U C R D N C R M C P C P R9 K R D N D R K R 9 UA TLC UB TLC UA TLC UA LMC UB LMC UA LMC UA TLC UA TLC UB TLC UA TLC UB TLC UB TLC U9B UB TLC I G O U L I G O U L C C C C C C R K R K R K R R R K R K R K UB TLC UB LMC C P U9A R C U C U Y MHZ T C N C N C N C9 N C N C N C N C N C9 C N R R D D D D D9 D D D UA TLC R K9 R K9 R K9 R K R K R9 K R K R K R9 K9 R K9 R K R K UB TLC R K C U C9 U C N R9 K C U 9 9 P PA PA PA PA PA PA PA 9 PA PB/SCK PB/SDI PB/SDO PC/VRH PC/AN PC/AN PC/AN PC/AN 9 PC PC PC PD PD/TCAP TCMP VSS OSC OSC IRQ/VPP RESET U MCHCP9 R K RV RV RV RV RV C U RV R K R K C N VOTING TONE ENCODER 99VTECKT August 99 A

F. R... F E AUD GND DISC C C C P R K9 R K9 R K9 R R K9 C9 C UA TLC P R C N RV THRESHOLD C9 N C U R K C N R K C N R K UB TLC C N R K C N R K R K C N R9 C UA TLC C N R C D UB UA UB UB C9 N LMC R R R9 LMC LMC N TLC R R K K K LMC K K UA C C N R R R N R C K K K N R K C P C N R C R K ND_OUT R9 E. D AUD GND DIR AUD C C R K9 R K9 R9 K9. R R K9 C UA TLC UB TLC RV K C9 R K N C N C R UB TLC R K R K C N C R. UA TLC UB TLC RV R K C N C N R K C9 R K R9 K C C N. C R RX LEVEL UA TLC C U R. UA TLC C RV R K R K R K UB TLC C U RV OUTPUT LEVEL C U R C U R R R R U9A R K K K U9B C U R R R C T LINE LINE D U R K R K U R K R K R 9 NULL 9 NULL D C. D C B TCMP P 9 9 UB TLC R K. COS R9 K COS DIR AUD DISC LINE AUD GND LINE R R K C N F PC FUSE R K C9 D N R K C N C. R R R UA TLC I C U I R L U G L U G O O C. C. RV TONE LEVEL C C P C. L U C U Y MHZ D N C P R C R M U OSC OSC RESET IRQ/VPP VSS MCHCP9 PA PA PA PA PA PA PA 9 PA PB/SCK PB/SDI PB/SDO PC/VRH PC/AN PC/AN PC/AN PC/AN 9 PC PC PC PD PD/TCAP TCMP TCMP ND_OUT C U R R9 K D N COS D D9 D D D D D R K. B C U C A A EAR Change R from K to K Title VOTING TONE ENCODER Size Number99VTECKT Revision A Date: May August 99 Sheet of File: D:\Protel Files\Master_EDA\99_VTone_Encoder\99.ddb Drawn By: