Design nd Modeling of Substrte Integrted Wveguide bsed Antenn to Study the Effect of Different Dielectric Mterils Jgmeet Kour 1, Gurpdm Singh 1, Sndeep Ary 2 1Deprtment of Electronics nd Communiction Engineering, Bent College of Engineering & Technology, Gurdspur, Punjb-143521, Indi 2Deprtment of Physics & Electronics, University of Jmmu, Jmmu, J&K-180002, Indi ---------------------------------------------------------------------***--------------------------------------------------------------------- Abstrct - In this pper, ntenn models of substrte integrted wveguide (SIW) hs been nlyzed nd designed to investigte the effect of dielectric mterils on its operting prmeters. Prmeters tht hve been evluted in this work re electric field, return losses, bndwidth nd the trnsmission gin. Printed circuit bord (PCB), Silicon (Si) nd Mic re used s different dielectrics to evlute the results in the frequency domin between 6 to 11 GHz. Design steps in n orderly mnner were pursued for the optimiztion of geometricl dimensions followed by the finite-element method (FEM) bsed modeling of the SIW structure. The results obtined hd shown tht the trnsmission is possible for ll the three cses but the optimized results were observed for Silicon s dielectric substrte. Key Words: Substrte Integrted Wveguide, insertion loss, cylindricl vis, microstrip line. 1. INTRODUCTION The meliortion in mm-wve technologies is consequentil for the development of wireless systems s brodbnd nd high resolution techniques re held up by the utiliztion of mm-wves. In the mjority of these systems, the ccomplishment of this technology lrgely depends on the ccessibility of cost-effectul technology, felicitous for the mss-engenderment of components nd systems. It is prognosticble tht high-density mlgmtion techniques, cumulted with low-cost mnufcture process, be supposed to be ble to present widespred solutions for mm-wve commercil pplictions. The nucleus of these systems is cognte to the ctive prt, which includes components such s locl oscilltors, mixers nd possibly low-noise mplifiers mong others. Now--dys, such components cn be incorported in the outwrd ppernce of chip-sets t plusibly low cost. A number of semiconductor compnies re t present running towrds the enlrgement of chip-sets working t 45 GHz or even t higher frequencies [1]. On the other hnd, incipient components re desirble in mm-wve systems, which cnnot be expediently incorported in the chip-set, becuse either they re too stronomiclly immense or the required performnce cnnot be chieved by integrted components (such s ntenns, selective filters nd power mplifiers). These dscititious components could be simply considered s the pckge tht embeds the chip-set, but they genuinely represent prmount portion of the system [2]. At low frequencies these components re typiclly fbricted in plnr technology (microstrip or coplnr wveguides); t frequencies higher thn 30 GHz, however, trnsmission losses nd rdition vert the utiliztion of microstrip or coplnr wveguides nd other technologicl solutions hve to be identified. Thus the prosperous development of mmwve wireless systems requires the definition of pltform for implementing ll these components with high performnce, low-cost nd relible technology. A potentil cndidte for developing such systems is substrte-integrted wveguide (SIW) technology [3 7]. SIWs re integrted wveguide-like structures fbricted by utilizing two rows of conducting cylinders or slots embedded in dielectric substrte tht electriclly connect two prllel metl pltes. The schemtic is shown in Fig. 1. In this wy, the non-plnr rectngulr wveguide cn be mde in plnr form, comptible with subsisting plnr processing techniques. SIW structures exhibit propgtion chrcteristics kindred to the ones of clssicl rectngulr wveguides, including the field pttern nd the dispersion chrcteristics. Fig -1: Geometry of SIW 2017, IRJET Impct Fctor vlue: 5.181 ISO 9001:2008 Certified Journl Pge 1535
Moreover, SIW structures preserve most of the dvntges of conventionl metllic wveguides, nmely high qulity-fctor nd high power-hndling cpbility with self-consistent electricl shielding. The most prmount dvntge of SIW technology is the possibility to integrte ll the components on the sme substrte, including pssive components, ctive elements nd even ntenns. Moreover, there is the possibility to mount one or more chip-sets on the sme substrte. There is no desidertum for trnsitions between elements fbricted with different technologies, thus reducing losses nd prsitics. In this work the structure of bsic SIW is ltered nd the performnce of the simulted ntenns re evluted for three different dielectric mterils. 2. MATHEMATICAL ANALYSIS SIW cn be modeled s Rectngulr wveguide (RW) s shown in Fig. 2. Generlly, rectngulr wveguide hs horizontl length of nd verticl length of b nd its cut-off frequency is determined by nd b. ɛ r b d The guided wvelength in the SIW is given by following formul [9] g 2 2 R (2 f ) 2 c 2 Where f is the resonnt frequency, c is the speed of electromgnetic wve in free spce nd is the width of the wveguide. The distnce between two rrys determines the propgtion constnt of the fundmentl mode, nd the vi pertures prmeters (d nd p) re set to minimize the rdition loss s well s the return loss. In order to insure tht the synthesized wveguide section become rdition less or free of lekge loss, prmetric effect of p nd d cn be studied [20]. These studies revel tht the pitch must be kept minuscule to reduce the loss between djcent points. 3. SIW ANTENNA DESIGN Figure 3 shows the designed structure of n SIW consisting of the top nd bottom plnes of substrte nd two prllel vi fences in the substrte. The vi re composed such tht only ptterns with verticl current distributed on the side wll cn survive in SIWs. (v) Fig -2: Dimensions for SIW Since the length of verticl wll of SIW becomes height of substrte, h nd horizontl length is much longer thn height of substrte ( b=h), the cutoff frequency of the SIW is given by: 2 2 k 1 m n f 2 2 b 1 Thus, f10 (ii) 2 If d is the width of SIW, then the width of the substrte cn be determined s d where (iii) R R is the reltive permittivity. The distnce between opposite vi of the SIW is given by [8] 2 d s d (iv) 0.95 p (i) () (b) Fig -3: Structure of designed SIW () 2D design (b) 3D design The current pth will not be cut by vi fences, therefore TE 10 mode cn be supported in n SIW. This holds for ll TE m0 modes since their current distributions on the side wlls re similr. On the other hnd, horizontl components of the surfce current exist on the sidewlls for ll TM modes nd TE mn modes with nonzero n s. These current pths will be cut in SIW structures, which results in rdition. Therefore we cn conclude tht only TE m0 modes exist in SIW structures [12]. Different substrtes hve been tken for this experiment to find their effect on the propgtion ptterns of SIWs. Tble 1 shows different mterils tken s substrte long with their properties. where d is the dimeter of the vi, p is pitch (distnce between the vis). 2017, IRJET Impct Fctor vlue: 5.181 ISO 9001:2008 Certified Journl Pge 1536
Tble -1: Properties of different dielectric mterils Mterils Reltive Permittivity Reltive Permebility Electricl Conductivity PCB 3.38 1 0 The electric field generted while computing the results for different substrtes re shown in figure 5. Fig. 5() shows the simulted result for electric field for PCB s substrte, while fig. 5(b) nd 5(c) shows the rditions due to electric field generted for substrtes tken s Silicon nd Mic respectively. Silicon 11.7 1 1 x 10-12 Mic 6 1 2 x 10-15 The models were designed using electromgnetic, frequency domin solver. A rnge of frequency from 6 GHz to 11 GHz is pplied through the lumped ports to nlyze the results for different SIW designs. 4. RESULTS AND DISCUSSIONS Fig. 4() shows the meshing design of micro-cntilever model. The whole structure is enclosed in the sphericl domin s shown in Fig. 4(b) to evlute the ntenn performnce. Norml meshing is conducted on the SIW structure. The mximum element size selected is 0.00375. The design ws simulted on the computtionl mchine hving 3.4 GHz processor speed. The virtul memory used while simultion ws 2.97 GB. Norml meshing is selected to reduce the computtionl lod. Fig -5(): Electric field for PCB substrte Fig -5(b): Electric field for Mic substrte Fig -4(): SIW structure while meshing is pplied Fig -4(b): SIW bsed ntenn enclosed in sphericl domin Fig -5(c): Electric field for Silicon substrte 2017, IRJET Impct Fctor vlue: 5.181 ISO 9001:2008 Certified Journl Pge 1537
From the br line djcent to these grphs it is cler tht the mximum vlue (1.6 KV/m) of electric field is for PCB while for minimum vlue (700 V/m) is for silicon. For Mic, the mximum vlue of electric field is 1.0 KV/m. Similrly the plot shown in figure 6 indictes grph between S-prmeters nd the frequency. Return losses or input reflection coefficient (S 11) nd the forwrd trnsmission gin (S 21) were plotted for ll the dielectric mteril used s substrte in the experiment. Fig. 6() shows the S 11 nd S 21 prmeter w. r. t. frequency plot for PCB. Dip in the return loss is observed t 9.3 GHz nd trnsmission gin increses upto 9.3 GHz nd then decreses. Similrly, return loss nd trnsmission gin for mic nd silicon re lso plotted in Fig. 6(b) nd 6(c) respectively. In cse of silicon, return loss showed min dip t frequency 6.6 GHz, while trnsmission gin is negligibly smll. Mic substrte used in the simultion showed increse in the trnsmission gin upto frequency from 6 GHz to 8.5 GHz. Unity trnsmission gin is obtined from 8.5 GHz to 11 GHz. Dip in the return loss of -26dB is seen t frequency of 9.0 GHz. Fig. 7 shows the rdition pttern obtined while evlution of results. Fig -6(): S-prmeter for PCB substrte Fig -7(): Rdition pttern for PCB substrte Fig -6(b): S-prmeter for Mic substrte Rdition Pttern Fig -7(b): Rdition pttern for Mic substrte Fig -6(c): S-prmeter for Silicon substrte 2017, IRJET Impct Fctor vlue: 5.181 ISO 9001:2008 Certified Journl Pge 1538
Fig -7(c): Rdition pttern for Silicon substrte The results show tht the simulted design comes with subsequent gin for the entire frequency bnd especilly t resonnce. However the gin is better for the ntenn with PCB s substrte. [3] J. Hirokw, M. Ando, Single-lyer feed wveguide consisting of posts for plne TEM wve excittion in prllel pltes, IEEE Trns. Antenns Propg., vol. 46, 1998, pp. 625 630. [4] U. Hiroshi, T. Tkeshi, M. Fujii, Development of lminted wveguide, IEEE Trns. Microw. Theory Techn., vol. 46, 1998, pp. 2438 2443. [5] D. Deslndes, K. Wu, Single-substrte integrtion technique of plnr circuits nd wveguide filters, IEEE Trns. Microw. Theory Tech., vol. 51, 2003, pp. 593 596. [6] F. Xu, K. Wu, Guided-wve nd lekge chrcteristics of substrte integrted wveguide, IEEE Trns. Microw. Theory Tech., vol. 53, 2005, pp. 66 73. [7] D. Deslndes, K. Wu, Accurte modeling, wve mechnisms, nd design considertions of substrte integrted wveguide, IEEE Trns. Microw. Theory Tech., vol. 54, 2006, pp. 2516 2526. [8] K. Wu, Towrds system-on-substrte pproch for future millimeterwve nd photonic wireless pplictions, Proc. Asi-Pcific Microwve Conf., 2006. 5. CONCLUSIONS Simultion work is crried out to investigte the effect of different dielectric substrtes on the electromgnetic wve propgtion in SIW. To evlute the effect of dielectric mteril, three different substrtes such s PCB, mic, nd silicon were used in the experiment. S-prmeters such s return loss nd trnsmission gin were clculted for frequency rnging from 6 GHz to 11 GHz. Tble 2 shows the comprtive nlysis of the results obtined for ll the three different dielectrics bsed ntenn. Tble -1: Properties of different dielectric mterils Mterils Electric Field Bndwidth Resonnt Frequency Frequency Rnge Gin PCB 1.7 KV/m 200 MHz 9.3 GHz 9.2 GHz to 9.4 GHz Silicon 700 V/m 500 MHz 6.6 GHz 6.3 GHz to 6.8 GHz. Mic 1 KV/m 1200 MHz 9.0 GHz 8.5 GHz to 9.7 GHz 2.3 db 0.75 db 0.95 db From the tble 2, it cn be estimted tht PCB substrte bsed SIW ntenn shows better results thn the other two dielectric ntenns. It cn be concluded tht the SIW works efficiently t round 9.3 GHz wih better output prmeters. REFERENCES [1] A. M. Niknejd, H. Hshemi, Millimetre-wve silicon technology: 60 GHz nd beyond, Springer, 2008. [2] M. P. Gynor, System-in-pckge RF design nd pplictions, Artech House, 2007. 2017, IRJET Impct Fctor vlue: 5.181 ISO 9001:2008 Certified Journl Pge 1539