Speed Control Of DC Motor Using Cascaded H-Bridge Multilevel Inverter

Similar documents
Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.

II. WORKING PRINCIPLE The block diagram depicting the working principle of the proposed topology is as given below in Fig.2.

A New Multilevel Inverter Topology with Reduced Number of Power Switches

Speed Control of Induction Motor using Multilevel Inverter

New multilevel inverter topology with reduced number of switches

Hybrid 5-level inverter fed induction motor drive

Design and Analysis of a Novel Multilevel Inverter Topology Suitable for Renewable Energy Sources Interfacing to AC Grid for High Power Applications

Simulation and Experimental Results of 7-Level Inverter System

SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION

Harmonic Reduction in Induction Motor: Multilevel Inverter

A Novel Cascaded Multilevel Inverter Using A Single DC Source

Design and Development of Multi Level Inverter

Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive

Analysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI

ISSN: International Journal of Science, Engineering and Technology Research (IJSETR) Volume 1, Issue 5, November 2012

A Series-Connected Multilevel Inverter Topology for Squirrel-Cage Induction Motor Drive

Comparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods

Low Order Harmonic Reduction of Three Phase Multilevel Inverter

COMPARISON OF GRID CONNECT MULTI-LEVEL INVERTER

A COMPARITIVE STUDY OF THREE LEVEL INVERTER USING VARIOUS TOPOLOGIES

Multilevel Inverter Based Statcom For Power System Load Balancing System

International Journal of Advance Engineering and Research Development

CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS

MODELING AND ANALYSIS OF THREE PHASE MULTIPLE OUTPUT INVERTER

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online):

Analysis And Comparison Of Flying Capacitor And Modular Multilevel Converters Using SPWM

Speed control of Induction Motor drive using five level Multilevel inverter

Three Level Three Phase Cascade Dual-Buck Inverter With Unified Pulsewidth Modulation

International Journal of Advance Engineering and Research Development

DESIGN OF MULTILEVEL INVERTER WITH REDUCED SWITCH TOPOLOGY

Implementation of Novel Low Cost Multilevel DC-Link Inverter with Harmonic Profile Improvement

The Selective Harmonic Elimination Technique for Harmonic Reduction of Multilevel Inverter Using PSO Algorithm

Keywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion.

Ripple Reduction Using Seven-Level Shunt Active Power Filter for High-Power Drives

A Comparative Study of Different Topologies of Multilevel Inverters

Hardware Implementation of SPWM Based Diode Clamped Multilevel Invertr

Comparative Analysis of Flying Capacitor and Cascaded Multilevel Inverter Topologies using SPWM

Multilevel Inverter for Single Phase System with Reduced Number of Switches

Hybrid Cascaded H-bridges Multilevel Motor Drive Control for Electric Vehicles

Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches

SPECIFIC HARMONIC ELIMINATION SCHEME FOR NINELEVEL CASCADED H- BRIDGE INVERTER FED THREE PHASE INDUCTION MOTOR DRIVE

ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS

CHAPTER 4 MULTI-LEVEL INVERTER BASED DVR SYSTEM

COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION

Simulation of Cascade H-Bridge Multilevel Inverter With Equal DC Voltage Source

Matlab/Simulink Modeling of Novel Hybrid H-Bridge Multilevel Inverter for PV Application

Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive

Simulation & Implementation Of Three Phase Induction Motor On Single Phase By Using PWM Techniques

New Approaches for Harmonic Reduction Using Cascaded H- Bridge and Level Modules

A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications

COMPARATIVE STUDY ON CARRIER OVERLAPPING PWM STRATEGIES FOR THREE PHASE FIVE LEVEL DIODE CLAMPED AND CASCADED INVERTERS

Design of DC AC Cascaded H-Bridge Multilevel Inverter for Hybrid Electric Vehicles Using SIMULINK/MATLAB

15-LEVEL CASCADE MULTILEVEL INVERTER USING A SINGLE DC SOURCE ABSTRACT

A Novel Multilevel Inverter Employing Additive and Subtractive Topology

Voltage Unbalance Elimination in Multilevel Inverter using Coupled Inductor and Feedback Control

Performance Evaluation of a Cascaded Multilevel Inverter with a Single DC Source using ISCPWM

SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER 1 Atulkumar Verma, 2 Prof. Mrs.

Reduced PWM Harmonic Distortion for a New Topology of Multilevel Inverters

Hybrid Modulation Switching Strategy for Grid Connected Photovoltaic Systems

Study of five level inverter for harmonic elimination

Analysis of New 7- Level an Asymmetrical Multilevel Inverter Topology with Reduced Switching Devices

Nine-Level Cascaded H-Bridge Multilevel Inverter Divya Subramanian, Rebiya Rasheed

Australian Journal of Basic and Applied Sciences. Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives

Sepic Topology Based High Step-Up Step down Soft Switching Bidirectional DC-DC Converter for Energy Storage Applications

Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System

A Fifteen Level Cascade H-Bridge Multilevel Inverter Fed Induction Motor Drive with Open End Stator Winding

Power Quality Improvement Using Cascaded Multilevel Statcom with Dc Voltage Control

Three Phase Parallel Multilevel Inverter Fed Induction Motor Using POD Modulation Scheme

Analysis and Simulation of Multilevel DC-link Inverter Topology using Series-Parallel Switches

A SOLUTION TO BALANCE THE VOLTAGE OF DC-LINK CAPACITOR USING BOOST CONVERTER IN DIODE CLAMPED MULTILEVEL INVERTER

Keywords: Multilevel inverter, Cascaded H- Bridge multilevel inverter, Multicarrier pulse width modulation, Total harmonic distortion.

ISSN Vol.05,Issue.05, May-2017, Pages:

Simulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink

MODELLING AND SIMULATION OF DIODE CLAMP MULTILEVEL INVERTER FED THREE PHASE INDUCTION MOTOR FOR CMV ANALYSIS USING FILTER

Hybrid Five-Level Inverter using Switched Capacitor Unit

Modelling and Simulation of New PV-Battery Based Hybrid Energy System for Z source Inverter using SVPWM fed Industrial Applications

Reduction of Power Electronic Devices with a New Basic Unit for a Cascaded Multilevel Inverter fed Induction Motor

ANALYSIS OF PWM STRATEGIES FOR Z-SOURCE CASCADED MULTILEVEL INVERTER FOR PHOTOVOLTAIC APPLICATIONS

INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET)

Common Mode Voltage Reduction in a Three Level Neutral Point Clamped Inverter Using Modified SVPWM

COMPARATIVE ANALYSIS OF SELECTIVE HARMONIC ELIMINATION OF MULTILEVEL INVERTER USING GENETIC ALGORITHM

A Hybrid Cascaded Multilevel Inverter for Interfacing with Renewable Energy Resources

Transformerless Grid-Connected Inverters for Photovoltaic Modules: A Review

International Journal Of Engineering And Computer Science ISSN: Volume 2 Issue 12 December, 2013 Page No Abstract

Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor

A comparative study of Total Harmonic Distortion in Multi level inverter topologies

ADVANCES in NATURAL and APPLIED SCIENCES

A Five-Level Single-Phase Grid-Connected Converter for Renewable Distributed Systems

Comparative Analysis of Two Inverter Topologies Considering Either Battery or Solar PV as DC Input Sources

A NEW TOPOLOGY OF CASCADED MULTILEVEL INVERTER WITH SINGLE DC SOURCE

COMPARISON STUDY OF THREE PHASE CASCADED H-BRIDGE MULTI LEVEL INVERTER BY USING DTC INDUCTION MOTOR DRIVES

A Single-Phase Cascaded Multilevel Inverter Based on a New Basic Unit with Reduced Number of Power Switches

A Single-Phase Carrier Phase-shifted PWM Multilevel Inverter for 9-level with Reduced Switching Devices

Minimization Of Total Harmonic Distortion Using Pulse Width Modulation Technique

International Journal of Emerging Researches in Engineering Science and Technology, Volume 1, Issue 2, December 14

A NEW TOPOLOGY OF MULTIPORT ASYMMETRIC SEVEN LEVEL INVERTER USING FUZZY LOGIC CONTROLLER

Harmonic Analysis Of Three Phase Diode Clamped Multilevel Inverters

Simulation and Analysis of a Multilevel Converter Topology for Solar PV Based Grid Connected Inverter

A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity

A NOVEL APPROACH TO ENHANCE THE POWER QUALITY USING CMLI BASED CUSTOM POWER DEVICES

Transcription:

ISSN: 2278 0211 (Online) Speed Control Of DC Motor Using Cascaded H-Bridge Multilevel Inverter R.K Arvind Shriram Assistant Professor,Department of Electrical and Electronics, Meenakshi Sundararajan Engineering College, Chennai A.L Kumarappan Professor and Head,Department of Electrical and Electronics,Sri Sai Ram Engineering College,Chennai Abstract: A hybrid cascaded multilevel inverter for interfacing with renewable energy resources is developed. The objective of this research is to propose an alternative topology of hybrid cascaded multilevel inverter applications. The modified PWMtechnique is also developed to reduce switching losses. Also, theproposed topology can reduce the number of required power switches compared to a traditional cascaded multilevel inverter.psim (PowerSim) and Simulink/MATLAB are used to simulate the circuit operation and control signal. The 3-kW prototype isdeveloped. The reduced switching losses of the proposed multilevel inverter are also discussed. The results show that this alternative topology can be applied for high power applications. INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1681

1. Introduction The cascade inverter has drawn great interest due to the great demand of medium-voltage high-power inverters. These multilevel inverters can extend rated inverter voltage and power by increasing the number of voltage levels. They can also increase equivalent switching frequency without the increase of actual switching frequency, thus reducing ripple component of inverter output voltage and electromagnetic interference effects. A multilevel converter has several advantages over a conventional two-level converter that uses high switching frequency pulse width modulation (PWM). The attractive features of a multilevel converter can be briefly summarized as follows. 1. Staircase waveform quality: Multilevel converters not only can generate the output voltages with very low distortion, but also can reduce the dv/dt stresses; therefore electromagnetic compatibility (EMC) problems can be reduced. 2. Common-mode (CM) voltage: Multilevel converters produce smaller CM voltage; therefore, the stress in the bearings of a motor connected to a multilevel motor drive can be reduced. Furthermore, CM voltage can be eliminated by using advanced modulation strategies. 3.Input current: Multilevel converters can draw input current with low distortion. 4.Switching frequency: Multilevel converters can operate at both fundamental switching frequency and high switching frequency PWM. It should be noted that lower switching frequency usually means lower switching loss and higher efficiency. Multilevel converter has disadvantage that greater number of power semiconductor switches needed. Although lower voltage rated switches can be utilized in a multilevel converter, each switch requires a related gate drive circuit. This may cause the overall system to be more expensive and complex. Abundant modulation techniques and control paradigms have been developed for multilevel converters such as Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination (SHE-PWM), Space Vector Modulation (SVM), and others. In this thesis Sinusoidal Pulse Width Modulation (SPW M) and Space vector pulse width modulation (SVPWM) techniques were used. INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1682

Table-1.1: Switching states in one leg of the three-level diode clamped inverter 2. Block Diagram For Seven Level In Verter DC SOURCE H- T BRIDGE R DC INVERT SOURCE ER D C O U T P U T DRIVER CIRCUIT DC SOURCE MICROCONTROLLER Figure 1 The block diagram of improved Z-source inverter based on the hardware kit model is as shown in the figure 3.1 It consists of 1. AC supply input voltage of 220v-240v. 2. A step down transformmer which is used to step down or decrease the input AC supply to 12v. 3. Bridge rectifier is used to convert AC supply to DC supply and also regulate DC INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1683

supply to 5v. 4. PIC microcontroller i s used to generate Pulse Width Modulation (PWM) wave. 5. Driver circuit is used to turn ON or turn OFF power 6. transistor or MOSFET by giving proper gate signals to respective switches on three legs of inverter circuit. 7. Another DC supply or DC link is fed to improved Z-source inverter circuit which will perform buck or boost operation. 8. The driver circuit siignal and signal from Z-source circuit is given to three phase inverter circuit which converts DC supply to AC supply and then fed to three phase loads. 3. Output Waveform Of Piic Microcontroller The output of the PIC microcontroller will be Pulse Width Modulation (PWM) wave. This wave is produced by comparing the oscillating wave and the sine wave. Oscillator produces the oscillating wave and the sine wave is produced by the program in the PICmicrochip. The output PWM signal waveform is as shown in figure 5.1 4. Driver Circuit Figure 2: PIC ouutput waveform INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1684

Figure 3: Driver Circuit In electronics, driver is an electrical circuit or other electronic component used to control another circuit or other component, such as a power MOSFET or high-power transistor. The term is used, for example, for a specialized computer chip that controls the high-power transistors in DC-to-DC voltage converters. The Driver circuit diagram is as shown in the Fig 5.1. In this three driver circuit are used for switching operation of six MOSFET. Each driver circuit controls switching operation for two MOSFET. For this purpose IR2110 IC is used. The IR2110 is a high voltage, high speed power MOSFET driver with independent high and low side referenced output channels. The Pin diagram of IR2110 is shown in below Figure 5. Simulation Results Simulation is the discipline of designing a model of an actual or theoretical physical system, executing the model on a digital computer, and analyzing the execution output. There are many methods of modeling systems which do not involve simulation but which involve the solution of a closed-form system (such as a system of linear equations). Simulation is often essential in the following cases: 1) the model is very complex with many variables and interacting components; 2) the underlying variables relationships are nonlinear; 3) the model output is to be visual as in a 3D computer animation. INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1685

www.ijird.com May, 2013 Vol 2 Issue 5 6. Seven Level Inverter Figure 4: Seven Level Inverter 7. H-Bridge Inverter Figure5: H-Bridge Inverter INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1686

www.ijird.com May, 2013 Vol 2 Issue 5 8. Pwm Generation Circuit 9. Simulated Seven Step Multilevel Output Figure 6: Simulated Seven Step Multilevel Output 10. Conclusion The feasibility of a cascaded multilevel inverter is to control the speed of a dc motor., it presents the following features and advantages: continuous control of the series injected voltage low harmonic distortion of the injected voltage very low switching frequency and low switching losses. INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1687

11. Reference 1. Z. Du, L. M. Tolbert, and J. N. Chiasson, Active harmonic elimination for multilevel converters, IEEE Trans. Power Electron., vol. 21, no. 2, pp. 459 469, Mar. 2006. 2. L. Ben-Brahim and S. Tadakuma, A novel multilevel carrier-based PWMcontrol method for GTO inverter in low index modulation region, IEEE Trans. Ind. Appl., vol. 42, no. 1, pp. 121 127, Jan./Feb. 2006. 3. J. S. Lai, J. Rodriguez, J. Lai, and F. Peng, Multilevel inverters: A survey of topologies, controls and applications, IEEE Trans. Ind. Appl., vol. 49,no., pp. 724 738, Aug. 2002. 4. J. Rodriguez, J. S. Lai and F. Z. Peng, Multilevel inverters: Survey oftopologies, controls, and applications, IEEE Trans. Ind. Applicat., vol.49, no. 4, pp. 724-738, Aug. 2002. 5. Beser, E.; Camur, S.; Arifoglu, B.; Beser, E.K., Design and application of a novel structure and topology for multilevel inverter, inproc. IEEE SPEEDAM, Tenerife, Spain, 2008, pp. 969 974. 6. R.H. Baker, High-Voltage Converter Circuit, U.S. Patent Number4,203,151, May 1980. 7. S. Mekhilef and M. N. Abdul Kadir Voltage control of three-stage hybrid multilevel inverter using vector transformation IEEE Trans. Power Electron.,vol.25,no.10,pp 2599-2606, Oct. 2010. 8. L.M. Tolbert, F. Z. Peng, T. G. Habetler, Multilevel PWM Methods at Low Modulation Indices, IEEE Trans. Power Electron.,vol. 15, no. 4, pp. 719-725, July 2000. INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH & DEVELOPMENT Page 1688