Preferred Device Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supply crowbar circuits. Features Glass Passivated Junctions with Center Gate Fire for Greater Parameter Uniformity and Stability Small, Rugged, Thermowatt Constructed for Low Thermal Resistance, High Heat Dissipation and Durability Blocking Voltage to 8 Volts 3 A Surge Current Capability PbFree Packages are Available* SCRs 25 AMPERES RMS 5 thru 8 VOLTS A G K MARKING DIAGRAM 4 CASE 22A STYLE 3 AY WW 65x 2 3 x = 4, 5, 7, 8 or 9 A = Assembly Location Y = Year WW = Work Week PIN ASSIGNMENT Cathode 2 Anode 3 Gate 4 Anode ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Preferred devices are recommended choices for future use and best overall value. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 25 November, 25 Rev. 6 Publication Order Number: 2N654/D
MAXIMUM RATINGS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit *Peak Repetitive OffState Voltage (Note ) (Gate Open, Sine Wave 5 to 6 Hz, T J = 25 to 25 C) 2N654 2N655 2N657 2N658 2N659 V DRM, V RRM 5 4 6 8 On-State Current RMS (8 Conduction Angles; T C = 85 C) I T(RMS) 25 A Average On-State Current (8 Conduction Angles; T C = 85 C) I T(AV) 6 A Peak Non-repetitive Surge Current (/2 Cycle, Sine Wave 6 Hz, T J = C) I TSM 25 A Forward Peak Gate Power (Pulse Width. s, T C = 85 C) P GM 2 W Forward Average Gate Power (t = 8.3 ms, T C = 85 C) P G(AV).5 W Forward Peak Gate Current (Pulse Width. s, T C = 85 C) I GM 2. A Operating Junction Temperature Range T J 4 to +25 C Storage Temperature Range T stg 4 to +5 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. V DRM and V RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. THERMAL CHARACTERISTICS Characteristic Symbol Max Unit *Thermal Resistance, JunctiontoCase R JC.5 C/W *Maximum Lead Temperature for Soldering Purposes /8 in from Case for Seconds T L 26 C V ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS * Peak Repetitive Forward or Reverse Blocking Current (V AK = Rated V DRM or V RRM, Gate Open) T J = 25 C T J = 25 C ON CHARACTERISTICS * Forward OnState Voltage (Note 2) (I TM = 5 A) V TM.8 V * Gate Trigger Current (Continuous dc) T C = 25 C (V AK = 2 Vdc, R L = ) T C = 4 C * Gate Trigger Voltage (Continuous dc) (V AK = 2 Vdc, R L =, T C = 4 C) V GT..5 V Gate Non-Trigger Voltage (V AK = 2 Vdc, R L =, T J = 25 C) V GD.2 V * Holding Current T C = 25 C (V AK = 2 Vdc, Initiating Current = 2 ma, Gate Open) T C = 4 C * Turn-On Time (I TM = 25 A, I GT = 5 madc) t gt.5 2. s Turn-Off Time (V DRM = rated voltage) (I TM = 25 A, I R = 25 A) (I TM = 25 A, I R = 25 A, T J = 25 C) DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off-State Voltage (Gate Open, Rated V DRM, Exponential Waveform) dv/dt 5 V/ s *Indicates JEDEC Registered Data. 2. Pulse Test: Pulse Width 3 s, Duty Cycle 2%. I DRM, I RRM I GT I H t q 9. 8 5 35 2. 3 75 4 8 A ma ma ma s 2
Voltage Current Characteristic of SCR + Current Anode + Symbol V DRM I DRM V RRM I RRM V TM I H Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current I RRM at V RRM on state Reverse Blocking Region (off state) Reverse Avalanche Region V TM I H + Voltage I DRM at V DRM Forward Blocking Region (off state) Anode T C, MAXIMUM CASE TEMPERATURE ( C) 3 2 9 α = 3 6 α α = CONDUCTION ANGLE 9 8 dc P (AV), AVERAGE POWER (WATTS) 32 24 6 8. α α = CONDUCTION ANGLE α = 3 6 9 8 T J = 25 C dc 8 4. 8. 2 6 2 I T(AV), ON-STATE FORWARD CURRENT (AMPS) Figure. Average Current Derating 4. 8. 2 6 2 I T(AV), AVERAGE ON-STATE FORWARD CURRENT (AMPS) Figure 2. Maximum OnState Power Dissipation 3
7 5 3 2 25 C i F, INSTANTANEOUS FORWARD CURRENT (AMPS) 7. 5. 3. 2...7.5.3.2..4 25 C.8.2.6 2. 2.4 2.8 v F, INSTANTANEOUS VOLTAGE (VOLTS) I TSM, PEAK SURGE CURRENT (AMP) 3 275 25 225 2 75. T C = 85 C f = 6 Hz SURGE IS PRECEDED AND FOLLOWED BY RATED CURRENT NUMBER OF CYCLES CYCLE 2. 3. 4. 6. 8. Figure 3. Typical OnState Characteristics Figure 4. Maximum NonRepetitive Surge Current r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)..7.5.3.2..7.5.3.2...2.3.5. 2. 3. 5. Z JC(t) = R JC r(t) 2 3 5 2 3 5. k 2. k 3. k 5. k k t, TIME (ms) Figure 5. Thermal Response 4
TYPICAL TRIGGER CHARACTERISTICS. I GT, GATE TRIGGER CURRENT (ma) VGT, GATE TRIGGER VOLTAGE (VOLTS).9.8.7.6.5.4.3 4 25 5 2 35 5 65 8 95 T J, JUNCTION TEMPERATURE ( C) 25.2 4 25 5 2 35 5 65 8 T J, JUNCTION TEMPERATURE ( C) 95 25 Figure 6. Typical Gate Trigger Current versus Junction Temperature Figure 7. Typical Gate Trigger Voltage versus Junction Temperature I H, HOLDING CURRENT (ma) 4 25 5 2 35 5 65 8 T J, JUNCTION TEMPERATURE ( C) 95 25 Figure 8. Typical Holding Current versus Junction Temperature 5
ORDERING INFORMATION 2N644 2N644G 2N645 2N645G 2N645T 2N645TG 2N647 2N647G 2N647T 2N647TG 2N648 2N648G 2N649 2N649G 2N649T 2N649TG Device Package Shipping (PbFree) (PbFree) (PbFree) (PbFree) (PbFree) (PbFree) (PbFree) (PbFree) 5 Units / Box 6
PACKAGE DIMENSIONS CASE 22A9 ISSUE AA H Q Z L V G B 4 2 3 N D A K F T U S R J C T SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A.57.62 4.48 5.75 B.38.45 9.66.28 C.6.9 4.7 4.82 D.25.35.64.88 F.42.47 3.6 3.73 G.95.5 2.42 2.66 H..55 2.8 3.93 J.8.25.46.64 K.5.562 2.7 4.27 L.45.6.5.52 N.9.2 4.83 5.33 Q..2 2.54 3.4 R.8. 2.4 2.79 S.45.55.5.39 T.235.255 5.97 6.47 U..5..27 V.45.5 Z.8 2.4 STYLE 3: PIN. CATHODE 2. ANODE 3. GATE 4. ANODE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 632, Phoenix, Arizona 858232 USA Phone: 4882977 or 8344386 Toll Free USA/Canada Fax: 48829779 or 83443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 82829855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 29 Kamimeguro, Meguroku, Tokyo, Japan 535 Phone: 835773385 7 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. 2N654/D