Single supply logic gates with voltage translation

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7LVT - 7LVT - 7LVT - 7LVT8-7LVT - 7LVT - 7LVT86-7LVT87-7LVT - 7LVT6 Single supply logic gates with voltage translation Our 7LVTxxx logic family provides solutions that integrate voltage level translation with a oolean function. 7LVTxxx types are single.6 V to. V supply general-purpose voltage translating devices. Our 7LVTxxx family is currently composed of ten logic functions including buffers, inverters and gates (ND, OR, NND, NOR, EXCLUSIVE-OR, EXCLUSIVE-NOR). Our 7LVTxxx family provides single-supply translation using overvoltage-tolerant, low-threshold inputs. The output level is always referenced to V cc which can range from.6 V to. V. For V cc =. V, input logic signals from systems at.8 V to. V are valid. This wide V cc range allows interconnection between systems at most of the different logic signal levels. 7LVTxxx has a low-noise balanced output drive capability of 8 m reducing line reflections, overshoot and undershoot. Key Features Wide supply voltage range.6 V to. V Up and down translation possible Overvoltage tolerant inputs Up to MHz operation at. V pplications Portable devices Industrial controllers Servers, PC & Notebooks utomotive enefits No external pull-up or pull down resistors required Integration of logic function with translation saves device count and PC space Footprint-compatible with existing non-translating devices Low dynamic power consumption increasing battery longevity vailable in smallest package for use without step-down mask (XSON)

Translation properties Translation (V) Input system supply (V) Output system supply (V).8..8 Up.....8.....8..8 Down...... vailable types Type 7LVT 7LVT 7LVT 7LVT8 7LVT 7LVT 7LVT86 7LVT87 7LVT 7LVT6 -input NND gate -input NOR gate Inverter -input ND gate -input OR gate uffer -input XOR gate -input XNOR gate uffer / line driver; -state uffer / line driver; -state Parametrics Type Range Output Drive Prop Delay (t PD ) Temperature Range Static Current ( ) LVTxxx.6. V +/- 8 m <. ns ~ C <. µ (typ.) Packages Suffix Package version Package name Dimensions (L x W x H, pitch - in mm) GW SOT- TSSOP. x. x.,.6 GX SOT6 XSON.8 x.8 x.,.8 7LVTxxx - Single supply logic gates with voltage translation

Functional diagrams 7LVT 7LVT 7LVT n.c. 7LVT8 7LVT 7LVT n.c. 7LVT86 7LVT87 7LVT OE 7LVT6 7LVTxxx share the same footprint as 7HCGxxx functions 7HCG8 7LVT8 OE 7LVTxxx - Single supply logic gates with voltage translation

Overvoltage tolerant inputs 7LVTxxx series has overvoltage tolerant inputs, which do not have input clamp diodes to and can be used to interface to higher-voltage systems without using external current-limiting resistors, effectively reducing OM and cost. Input characteristics These devices have input-switching thresholds lower than the typical / value of CMOS and can be used for low-to-high voltage level translation.schmitt action is included to provide hysteresis, preventing false switching and ensuring well-defined outputs when driven by slowly transitioning signals. 6 (μ) (μ) 6 8...7...7... =.8 V =. V (μ). (m)..7...... =. V = V 7LVTxxx - Single supply logic gates with voltage translation

Output characteristics (m) 6 (m) - - -6 8-8 C typ C min 8 C min C min.. =.8 V, output driving LOW C typ - C min 8 C min C min -.. =.8 V, output driving HIGH (m) (m) - - - - C typ C min 8 C min C min... =. V, output driving LOW C typ - C min 8 C min C min -... =. V, output driving HIGH 7LVTxxx - Single supply logic gates with voltage translation

Output characteristics 6 (m) (m) - - - C typ C min 8 C min C min.... =. V, output driving LOW - C typ C min 8 C min C min -.... =. V, output driving HIGH (m) 8 (m) - 6 - -6 C typ C min 8 C min C min 6 = V, output driving LOW -8 C typ C min 8 C min C min - 6 = V, output driving HIGH 8 Nexperia.V. ll rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: January 8 Printed: In the Netherlands nexperia.com