AMMP-6408 Thermal Application Examples Application Note 5351 Introduction The AMMP-6408 is a 1 W power amplifier operating over the 6 to 18 GHz frequency range and is housed in a 5 x 5 mm surface mount package. The AMMP-6408 is the packaged version of Avago s AMMC-6408 PHEMT MMIC. The nominal drain bias for the AMMP-6408 is +5 Vand 650 ma. The resulting 3.25 W of DC power dissipated in the device must be properly heat sinked to ensure reliable, long-term operation. Estimation of MTTF is predicated on knowing the channel temperature of the AMMP-6408 MMIC. This application note provides information useful for determining the operating channel temperature of the AMMP-6408 in several representative applications. Typical Application An implementation of the AMMP-6408 is shown in Figure 1. The SMT package is soldered to an RF motherboard, which in turn is attached to a heat sink, carrier, base plate, or some sort of housing. In some cases, a pedestal may be used directly under the AMMP-6408 to improve heat sinking. The operating temperature of the heat sink (TH) is usually specified, known, or easily measured. The channel-to-case thermal resistance (θ ch-c ) for the AMMP-6408 is specified in the data sheet. This θ ch-c is the thermal resistance measured from the channel of the MMIC die to the bottom mounting surface of the package, or the case in common semiconductor industry vernacular. Given TH and θ ch-c, the remaining issue is to determine the MMIC channel temperature (T ch ). For cases in which the AMMP-6408 is not mounted directly to a heat sink, the critical unknown variable is the thermal conduction through the RF motherboard. RF Motherboard AMMP-6408 (T ch ) Heatsink ( ) Figure 1. Typical AMMP-6408 Application.
Simulation vs. Measurement One method of determining the temperature drop through a motherboard is to create a model and use a computer program, generally of the finite element (FEM) type, to simulate the results. While superior for analyzing arbitrary assemblies, a software-based approach can be somewhat tedious. A reasonably accurate model for the motherboard would need to take into account factors such as the number and location of ground/thermal vias, whether or not the vias are filled or unfilled, properties of the fill material, and the heat-spreading effects of the top metal pattern under and around the AMMP-6408 package. Without standardization of thermal models, interoperability between various thermal analysis programs is also difficult. As an alternative to the need for RF designers to do thermal modeling and simulation, Avago has measured the overall thermal resistance for several typical RF assemblies using the AMMP-6408. Measurement Method The temperatures indicated in Figure 1 were determined by direct measurement for the assemblies described in this note. The RF assemblies were placed on a temperature-controlled base plate maintained at a fixed temperature,. An AMMP-6408 with an open top package (no lid) was used to allow MMIC channel temperatures to be measured with an infrared microscope. Measuring the device bias voltage and current, the overall thermal resistance from channel to heat sink, θ chh, is then easily calculated as, θ ch-h = (T ch TH ) / (V DD * I DD ) in units of C/W, where V DD and I DD are the AMMP-6408 drain supply voltage and current. PCB Land Pattern The PCB Land Pattern shown in Figure 2 is recommended for Avago AMMP products in the 5 x 5 mm SMT package. This pattern has been verified for RF as well as thermal performance and is the pattern used for the test results described in this note. This layout is designed to be used with 0.010-inch thick Rogers [1] RO4350B substrate material (ε r = 3.48) with a solid ground plane on the backside. The plated through thermal/rf ground vias are 0.008 inches (0.2 mm) in diameter and spaced 0.0165 inches center to center (0.42mm). For best heat sinking, the vias should either be filled, during PCB fabrication, with silver or other thermally conductive material, or filled with solder during the assembly process. The data in this note is based on solder filled vias. See Figures 8 and 9, at the end of this note, for the full stack-up of the PCB assemblies used. Assembly Note If vias are to be solder filled, then an adequate amount of solder paste should be dispensed onto the package land pattern during the assembly process to provide sufficient solder to wick into the vias and fill them. Notes: 1. Rogers Corporation, Chandler, AZ. 2. http://www.labtechcircuits.com.0180[0.46].0110[0.28].0100[0.25] 0.114[2.89].0160[0.41].0095[0.24].0160[0.14].1260[3.2] 0.590[1.5].0200[0.51].0120[0.3] Figure 2. Recommended PCB Land Pattern for Avago AMMP products in 5 x 5 mm SMT Packages. 2 Dimensions are inches [mm]..0180[0.46].0095[0.24].0935[2.37] This pattern is for 0.010-inch thick Rogers RO4350B substrate material.
Direct Heat Sink Example An example of mounting the SMT package directly to a heat sink is shown in Figure 3. In this situation, the PCB has a solid copper filled section, which was manufactured by Labtech Microwave Circuits [2]. The PCB is mounted onto an additional (Cu/W) heatsink. This is an excellent mounting method to minimize T ch. The PCB copper filled section should be large enough to cover the RF ground area directly under the SMT package that, for the 5x5 mm package, is approximately 0.121 x 0.110 (3.08 mm x 2.8 mm). In this example the Cu/W heatsink was 0.500-inch thick (1.27 mm). For a direct heat sink, T ch is found by using the DC power dissipation and device thermal resistance (θ ch-c ) specification: Tch = + [ θ ch-c * (V DD * I DD )] Or, if T ch is specified, the heat sink temperature is: = T ch - [ θ ch-c * (V DD * I DD )] Single Layer PCB Example The cross-section of a single-layer RF PCB with vias is shown in Figure 4. This PCB uses the package land pattern in Figure 2 on a 0.010-inch thick Rogers RO4350B substrate with 0.5 oz. copper metal layers. A low-temperature, indium-based solder is used to solder the RO4350B circuit to a 0.050-inch thick coppertungsten (Cu/W) heat sink. This step also fills the ground/ thermal vias with solder. This circuit assembly is similar to those used for Avago s AMMP-xxxx demonstration units shown in Figure 6. For thermal testing, the circuit assembly was mounted on a temperature-controlled plate. With the AMMP-6408 powered on, and allowing sufficient time for thermal stabilization, the following data was measured: T ch = 85 C = 20 C V DD = 5.0 V I DD = 650 ma T ch The overall thermal resistance from MMIC channel to heat sink, θ ch-h1, for this single-layer assembly is then: θ ch-h1 = (T ch TH ) / (V DD * I DD ) θ ch-h1 = 20 C/W. Note: No RF signal was applied during the test. Multilayer PCB Example An example of a multilayer motherboard is shown in Figure 5. This PCB stackup consists of a 0.010-inch thick RO4350B top RF layer (identical to the single layer example above) plus a second 0.030-inch thick layer of FR-4. The ground/thermal vias extend through both the RO4350B and the FR-4 layers and were silver filled during the PCB fabrication process. The bottom metal layer of the FR-4 is a continuous ground plane. This type of construction is representative of several types of assemblies. The simplest case is that in which the FR-4 layer is used for mechanical rigidity to prevent flexing of the relatively thin RF layer of RO4350B. More commonly, the FR-4 section is made up of several layers (e.g., three 0.010-inch thick layers) that are used for low frequency signal lines, DC power distribution, and control signals. To obtain the thermal resistance of the FR-4 layer, a circuit assembly was mounted on a heat sink and the following data was measured with the AMMP-6408 powered on and stabilized: T FR-4 = 78 C = 66 C V DD = 5.5 V I DD = 660 ma where T FR-4 is the temperature at the RO4350B FR-4 layer interface. AMMP-6408 RF PCB AMMP-6408 RF PCB Figure 3. Direct Heat Sink Example Figure 4. Example of Single-layer PCB. 3
The thermal resistance of the FR-4 layer is: θ FR-4 = (T FR-4 ) / (V DD * I DD ) θ FR-4 = 4 C/W. The overall thermal resistance for the multi-layer example, θ ch-h2, is then: θ ch-h2 = θ ch-h1 + θ FR-4 θ ch-h2 = 28 C/W As in the single layer example, no RF signal was applied during the test. Accounting for RF Output Power The above examples, in which no RF signal was applied during the test, are worst-case situations. The AMMP- 6408 is capable of delivering up to 1 W of output power. For cases in which a significant amount of RF power is output from the MMIC, the channel temperature may be lower. The total device power dissipation, P d, is: P d = (V DD * I DD ) P out where P out is the average RF output power. If it is desired to account for the RF output power, the T ch calculation is amended as: T ch = + [θ ch-h * ((V DD *I DD ) P out )] Note that the power added efficiency (PAE) of the AMMP- 6408 increases as the device is driven into compression. As efficiency increases, the IDD decreases. If a particular application operates the device at a consistent output power and IDD operating point, then a higher heat sink temperature may be used. It is important to note that long-term reliability estimates are contingent on applications in which RF operation is continuous. 0.030-in FR-4 AMMP-6420 Figure 5. Example of Multilayer PCB. T FR-4 0.010-in RO4350B Using the Data The examples presented above are for specific device channel and heat sink temperatures. These particular temperatures were chosen to be compatible with the measurement range of the test equipment. The thermal resistances derived from these measurements can easily be extended to determine T ch for any given heat sink temperature,. The general T ch is: T ch = + [θ ch-c * (V DD * I DD )] Conversely, a maximum allowable heat sink temperature can be determined, given a maximum channel temperature: = T ch - [θ ch-c * (V DD * I DD )] The following working examples are presented as a guide for using a typical AMMP-6408 in several configurations. Working Example 1 Direct Heat Sink In this example, a AMMP-6408 is mounted directly on a heat sink pedestal as illustrated in Figure 3. The thermal resistance specified for the AMMP-6408 is 20 C/W. In the intended application, the housing is expected reach a temperature of 60 C. What is the resulting T ch? With the AMMP-6408 operating in the linear region (uncompressed) with a nominal bias of 5 V and 650 ma, the channel temperature is calculated to be: T ch = + [θ ch-h * (V DD * I DD )] T ch = 60 C+[20 C/W * (5 V * 650 ma)] T ch = 125 C Working Example 2 Single-layer RF Motherboard An AMMP-6408 is assembled on a single-layer RF motherboard, as described in Figure 4. The PCB is mounted on a metal housing. In the intended application, the housing is expected reach a maximum temperature of 35 C. What is the resulting T ch? With the AMMP-6408 operating in the linear region (uncompressed), and with a nominal bias of 5 V and 650 ma, the channel temperature is: T ch = + [θ ch-h1 * (V DD * I DD )] T ch = 35 C + [24 C/W * (5 V * 650 ma)] T ch = 113 C Figure 6. Photograph of Complete AMMP-6408 Assembly. 4
Working Example 3 Multilayer PCB and Saturated Output Power In this case, an AMMP-6408 is assembled on a RO4350B FR-4 multilayer motherboard as shown in Figure 5. The AMMP-6408 is operated in a saturated mode with a continuous output power of 1 W. From the data sheet curve (Figure 7) for P out vs. I DD, it can be seen that the typical Ids increases from 650 ma to approximately 800 ma as the device is driven into saturation. Suppose that for this application, the maximum allowable channel temperature is specified to be 155 C. What is the corresponding maximum? Taking the total device dissipation into account, the maximum heat sink temperature is now: Po (dbm) and PAE (%) = T ch - [θ ch-c * ((V DD * I DD ) P out )] = 155 C - [28 C/W * ((5 V * 800 ma) 1 W)] = 44 C 40 1000 35 30 25 20 15 10 5 Pout (dbm) PAE (%) Id (TOTAL) Figure 7: Typical Output Power, PAE and Total Drain Current Versus Input Power at 8 GHz 900 800 700 0-15 -10-5 0 5 10 600 51 Pin (dbm) Ids (ma) Full Description of Evaluation Testboard Stack-up and Assembly Illustration of Evaluation Testboards Stack-up and Assembly PCB with Plated thru vias Solder Paste Copper Tungsten Heatsink Carrier Thermagon T2100 Bottom Metal PCb Indium Figure 8. Evaluation Module Stack-up (Not drawn to Scale) Bottom Metal PCB 2.5 mm sq. copper filled PCB Solder Paste Copper Plug Indium Copper Tungsten Heatsink Carrier Thermagon T2100 Bottom Metal PCB SolderPlus 62NCLR-A Rogers RO4350 10 mil thk. Indium solder 0.500 Thk. Cu/W Carrier Thermagon T2905C Aluminum Heatsink. SolderPlus 62NCLR-A Rogers RO4350 10 mil thk. Indium solder 0.500 Thk. Cu/W Carrier Thermagon T2905C Aluminum Heatsink. Figure 9. Evaluation Module Stack-up (Not drawn to Scale) Notes: The copper filled PC board design is manufactured by Labtech Limited: www.labtechmicrowave.com For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 2005-2010 Avago Technologies. All rights reserved. AV02-0663EN - August 27, 2010