Chapter 3 Digital Logic Structures

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Transcription:

Chapter 3 Digital Logic Structures

Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium 4 (2000): 48 million IBM PowerPC 750FX (2002): 38 million IBM/Apple PowerPC G5 (2003): 58 million Logically, each transistor acts as a switch Combined to implement logic functions AND, OR, NOT Combined to build higher-level structures Adder, multiplexer, decoder, register, Combined to build processor LC-3 3-2

Simple Switch Circuit Switch open: No current through circuit Light is off V out is +2.9V Switch closed: Short circuit across switch Current flows Light is on V out is 0V Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage. 3-3

MOS Transistor MOS = Metal Oxide Semiconductor two types: n-type and p-type n-type when Gate has positive voltage, short circuit between #1 and #2 (switch closed) when Gate has zero voltage, open circuit between #1 and #2 (switch open) Gate = 1 Gate = 0 Terminal #2 must be connected to GND (0V). 3-4

p-type MOS Transistor p-type is complementary to n-type when Gate has positive voltage, open circuit between #1 and #2 (switch open) when Gate has zero voltage, short circuit between #1 and #2 (switch closed) Gate = 1 Gate = 0 Terminal #1 must be connected to +2.9V. 3-5

Logic Gates Use switch behavior of MOS transistors to implement logical functions: AND, OR, NOT. Digital symbols: recall that we assign a range of analog voltages to each digital (logic) symbol assignment of voltage ranges depends on electrical properties of transistors being used typical values for "1": +5V, +3.3V, +2.9V from now on we'll use +2.9V 3-6

CMOS Circuit Complementary MOS Uses both n-type and p-type MOS transistors p-type Attached to + voltage Pulls output voltage UP when input is zero n-type Attached to GND Pulls output voltage DOWN when input is one For all inputs, make sure that output is either connected to GND or to +, but not both! 3-7

Inverter (NOT Gate) Truth table In Out 0 V 2.9 V 2.9 V 0 V In Out 0 1 1 0 3-8

NOR Gate Note: Serial structure on top, parallel on bottom. A B C 0 0 1 0 1 0 1 0 0 1 1 0 3-9

OR Gate A B C 0 0 0 0 1 1 1 0 1 1 1 1 Add inverter to NOR. 3-10

NAND Gate (AND-NOT) Note: Parallel structure on top, serial on bottom. A B C 0 0 1 0 1 1 1 0 1 1 1 0 3-11

AND Gate A B C 0 0 0 0 1 0 1 0 0 1 1 1 Add inverter to NAND. 3-12

Basic Logic Gates 3-13

DeMorgan's Law Converting AND to OR (with some help from NOT) Consider the following gate: A B A B A B A B 0 0 0 1 1 1 1 0 1 0 0 1 To convert AND to OR (or vice versa), invert inputs and output. 1 0 0 1 0 1 1 1 0 0 0 1 Same as A+B! 3-14

More than 2 Inputs? AND/OR can take any number of inputs. AND = 1 if all inputs are 1. OR = 1 if any input is 1. Similar for NAND/NOR. Can implement with multiple two-input gates, or with single CMOS circuit. 3-15

Summary MOS transistors are used as switches to implement logic functions. n-type: connect to GND, turn on (with 1) to pull down to 0 p-type: connect to +2.9V, turn on (with 0) to pull up to 1 Basic gates: NOT, NOR, NAND Logic functions are usually expressed with AND, OR, and NOT DeMorgan's Law Convert AND to OR (and vice versa) by inverting inputs and output 3-16

Building Functions from Logic Gates Combinational Logic Circuit output depends only on the current inputs stateless Sequential Logic Circuit output depends on the sequence of inputs (past and present) stores information (state) from past inputs We'll first look at some useful combinational circuits, then show how to use sequential circuits to store information. 3-17

Decoder n inputs, 2 n outputs exactly one output is 1 for each possible input pattern 2-bit decoder 3-18

Multiplexer (MUX) n-bit selector and 2 n inputs, one output output equals one of the inputs, depending on selector 4-to-1 MUX 3-19

Full Adder Add two bits and carry-in, produce one-bit sum and carry-out. A B C in S C out 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 3-20

Four-bit Adder 3-21

Logical Completeness Can implement ANY truth table with AND, OR, NOT. A B C D 0 0 0 1 0 1 0 1 0 0 0 1 0 1 1 1 1 0 0 1 0 0 0 0 1 0 1 1 0 1 1 0 1. AND combinations that yield a "1" in the truth table. 2. OR the results of the AND gates. 3-22

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