UNISONIC TECHNOLOGIES CO., LTD 8-BIT 8-CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS SOP-24 DESCRIPTION The UTC M62364 is a CMOS 8-bit, 8-ch D/A converter having a multiplying function and output buffer amplifiers. It has a serial data input and can easily communicate with a microcontroller by the simple three-wiring method (D IN, CLK, LD). The output buffer amplifiers operating in AB-class has both sinking and driving capabilities of.ma or more and can operate in a whole supply range from V DD to GND. The IC is suitable for a use in automatic adjustment applications in conjunction with a MCU by utilizing the terminal Do for a cascading connection. FEATURES SSOP-24 (29mil) *Three-wiring serial data transmission *Doubled precision 8-ch D/A converter employing an R-2R with higher-order segment method *8 buffer amplifiers operating in a whole supply voltage range from V DD to GND *4-quadrant multiplication ORDERING INFORMATION Ordering Number Package Packing M62364G-R24-R SSOP-24 Tape Reel M62364G-S24-R SOP-24 Tape Reel MARKING SOP-24 SSOP-24 of 8 Copyright 25 Unisonic Technologies Co., Ltd
PIN CONFIGURATION (TOP VIEW) V IN V OUT V OUT2 V IN2 V DD LD CLK D IN V IN3 V OUT3 V OUT4 V IN4 2 3 4 5 6 7 8 9 2 24 23 22 2 2 9 8 7 6 5 4 3 V IN8 V OUT8 V OUT7 V IN7 GND RESET V DA(REF) D OUT V IN6 V OUT6 V OUT5 V IN5 EXPLANATION OF TERMINALS PIN NO SYMBOL FUNCTION 8 D IN Serial data input 7 D OUT Serial data output 7 CLK Shift clock input. Input data of D IN are taken into the 2-bit shift register on a rising edge of the clock 6 LD A low state enables data loading to the 2-bit shift register. During a rising edge of LD, the data will be loaded to the output register 9 RESET Reset 8-bit latches 2 V OUT 3 V OUT2 V OUT3 V OUT4 4 V OUT5 D/A Converter Output with8-bit resolution 5 V OUT6 22 V OUT7 23 V OUT8 5 V DD Power Supply 2 GND Ground V IN 4 V IN2 9 V IN3 2 V IN4 3 V IN5 D/A Converter Input 6 V IN6 2 V IN7 24 V IN8 8 V DA(REF) D/A Converter Reference Voltage Input UNISONIC TECHNOLOGIES CO., LTD 2 of 8
BLOCK DIAGRAM V DD 5 D IN 8 2-bit 2- SHIFT REGISTER bit SHIFT REGISTER 7 D OUT CLK 7 D D D D23 D3 D4 D5D D6D D7D D8 D D9D D D 6 LD ADDRESS DECODER RESET 9 8-bit Latch 8-bit Latch D-A CONVERTER D-A CONVERTER 8 V DA(REF) - + - + 2 24 23 2 V IN V OUT V IN8 V OUT8 GND UNISONIC TECHNOLOGIES CO., LTD 3 of 8
ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT Supply Voltage V DD -.3 ~ +7. V Digital Input Voltage V IND -.3 ~ +7. V Analog Input Voltage V IN -.3 ~ V DD +.3 V Analog Output Voltage V OUT -.3 ~ V DD +.3 V D-A Reference Voltage V DA(REF) -.3 ~ V DD +.3 V Operating Temperature T OPR -2 ~ +75 C Storage Temperature T STG -4 ~ +25 C ELECTRICAL CHARACTERISTICS (V DD =5V±%, V DD V IN, GND, V DA(REF) =V, T A = -2 ~ 85 C, unless otherwise specified) PARAMETER SYMBOL TEST CONDUCTION MIN TYP MAX UNIT ANA/DIG COMMON PART Supply Voltage V DD 2.7 3. V Supply Current I DD CLK=MHz, V CC =3V, I AO =μa 3.5 ma Digital Part Digital Input Low Voltage I IL.2 V DD V Digital Input High Voltage I IH.8V DD V D OUT Terminal Output Low Voltage V OL I OL =2.5mA.4 V D OUT Terminal Output High Voltage V OH I OH = -4μA V DD -.4 V Input Leak Current I ILK V IN = ~V DD - μa ANALOG PART Buffer Amplifier Output Voltage Range V AO I AO = ±μa. V CC -. I AO = ±5μA.2 V CC -.2 V V IN =3V, V DA(REF) =V, Input Current I IN * Proportional to max. input current condition (V IN - V DA(REF) ) and digital data of each channels..8 ma V IN =3V, V DA(REF) =V, * Proportional to max. input D-A Reference Input Current I DA(REF) current condition -.44 ma (V IN - V DA(REF) ) and digital data of each channels Buffer Amplifier Output Current Range I AO Upper Saturation Voltage=.4V Lower Saturation Voltage=.4V - ma Buffer Amplifier Output Impedance R O 5 Ω Resolution RES V DD =2.6V,V DA(REF) =.5V 8 bit Differential Nonlinearity DNL (mv/lsb) - LSB Nonlinearity NL Without Load (I AO = ±) -.5.5 LSB Output Capacitative Load C O. μf UNISONIC TECHNOLOGIES CO., LTD 4 of 8
ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER SYMBOL TEST CONDUCTION MIN TYP MAX UNIT AC CHARACTERISTICS Clock L Pulse Width t CKL 2 ns Clock H Pulse Width t CKH 2 ns Clock Rise Time t CR Clock Fall Time t CF 2 ns Data Set Up Time t DCH 6 ns Data Hold Time t CHD ns LD Set Up Time t CHL 2 ns LD Hold Time t LDC ns LD H Pulse Duration Time t LDH ns Data Output Delay Time t DOUT C L =pf 7 35 ns D-A Output Setting Time t LDD C L pf,v AO :.<=>2.6V This Time Until The Output Becomes The final Value Of /2 LSB 3 μs UNISONIC TECHNOLOGIES CO., LTD 5 of 8
DIGITAL FORMAT 2 3 4 5 6 7 8 9 2 (LSB) DATA D D D9 D8 D7 D6 D5 D4 D3 D2 D D CLK D D D2 D3 D4 D5 D6 D7 : DAC DATA (LSB) ( MSB ) D8 D9 D D : DAC SELECT DATA Dac Select Data D8 D9 D D Dac Selection V OUT Selection V OUT2 Selection V OUT3 Selection V OUT4 Selection V OUT5 Selection V OUT6 Selection V OUT7 Selection V OUT8 Selection UNISONIC TECHNOLOGIES CO., LTD 6 of 8
DIGITAL FORMAT(Cont.) TIMING CHART UNISONIC TECHNOLOGIES CO., LTD 7 of 8
TIMING CHART(Cont.) CLK t CR t CKH t CF t CKL D IN t LDC t LDH t DCH t CHD t CHL LD t LDD D-A OUTPUT t Do D OUT OUTPUT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD 8 of 8