1
2 List of Experiment CYCLE I 1) To plot the frequency response for inverting configuration of OP AMP on breadboard. 2) To plot the frequency response for non inverting configuration of OP AMP on breadboard. 3) To perform the experiment of summing and difference amplifier by using op amp on breadboard. 4) To perform experiment for waveshaping circuit (integrator & differentiator ) by using OP AMP on breadboard. 5) To perform experiment of OP AMP as voltage follower. CYCLE-II 6) To perform 1 st order low pass filter. 7) To perform clipper & clamper circuits. 8) To perform free running multivibrator 9) To perform Bistable Multivibrator 10) To study IC 555
3 Experiment No. 1 Aim:- To plot the frequency response for Inverting configuration of OP AMP ON breadboard. IC 741 As Inverting Amplifier. Objective:- (1) To study IC 741 as Inverting Amplifier. (2) To see the effect on O/P by changing R1 & RF. (3) To Study, Why this Amplifier is called an Inverting Amplifier. Apparatus:- Signal generator, CRO- dual channel, and Patch chord. Components :- R11 = 10K, R12 = 1K, R13 = 100Ω, RF1 = 10K, RF2 = 100K RF3 = 33K, R2 10K, R2 10K, R3 1K, R4 100Ω, RL = 10K, IC741. Theory: - An op-amp can be used for number of application like Amplifier, Adder, Substractor, Rectifier, Multivibrators, and Analog computer etc. Here we are using 741 as a inverting amplifier. It is called as inverting amplifier because here input is connected at inverting input i.e. pin no.2 So we get inverted signal of the input at the output The basic ckt of inverting amplifier is shown below. In this mode of operation the positive input terminal of the amplifier is grounded and the input signal vi is applied to the negative input terminal via resistor Rr1. The feedback applied through Rf from the input terminal, isnegative. This helps to in maintaining gain stable. The inverting operation performed by circuit is determined by RF & R1. Circuit Diagram:-
4 Procedure:- (1) Connect the ckt. as shown in fig. (2) Select proper R1 & Rf. (3) Connect 1 channel of CRO at the o/p & other at I/p. (4) Connect signal generator at I/p. Adjust I/p at 200m.vp-p. (5) Observe the o/p with respect.to I/p. (6) Observe the change in o/p by change in resistor between pin 3 & gnd. (7) Calculate theoretical & practical gain. (8) Draw the waveform on graph. Observation Table: - Inverting waveforms
5 Experiment No. 2 Aim:- To plot the frequency response for Non Inverting configuration of OP AMP ON breadboard. IC 741 As Non-Inverting Amplifier. OBJECTIVES;- (1) To study IC 741 as Non-inverting amplifier (2) To see the effect on o/p by changing Rj & Rf. Apparatus:- Signal generator, CRO, patch chord = 3 no. Component value:- R11 = 1K R12 = 10K R13 = 107 pot RL = 10K RF1 = 10K RF2 = 100K RF3 = 33K IC = 741. Theory: - An OP-AMP can be used for number of application like Amplifier, Adder, Substractor, Rectifier, Multivibrators, and Analog computer etc. Here we are going to study 741 as a non-inverting amplifier. It is called as non-inverting amplifier because input is applied at pin no.3 i.e. non-inverting input. So we get o/p signal in phase with input signal. In this case the i/p signal is applied directly to the non-inverting (+ve) i/p terminal of the amplifier & the feed back resistor RF is connected between the o/p terminal & negative I/p terminal. The R is connected between the inverting terminal & ground. Note that Vi is not equal to zero in this case, meaning that non-inverting ckt has to virtual ground at one of it s i/p terminals. Thus the closed loop gain of a non-inverting amplifier is always greater than or equal to unity & it is determined by R1 & Rf. Procedure:- (1) Connect the ckt. as shown in fig.
6 (2) Select proper R1 & Rf. (3) Connect 1- channel of CRO at o/p & other at i/p. (4) Connect signal generator at i/p. (5) Observe the change in o/p by changing R1, Rf and frequency of i/p. (6) Draw the waveform on graph paper. Observation Table:- Input waveforms:- Result:- The I/p signal is amplified at the o/p & is in phase with I/p signal. The input signal is amplified & inverted at the output of inverting amplifier. The input signal is amplified & noninverted at the output of inverting amplifier.
7 Viva Questions :- 1) What is virtual ground concept? 2) What is feedback? Which type of feedback is used in linear application? Experiment No. 3 Aim:- Design and verify op-amp application as adder and substractor. Apparatus:- IC 741,Bread Board, Power Supply, Connecting Wires, resistors. Components Values: - For (adder) Ra = 1K, Rb = 1K, RF = 1K, R = 250Ω, IC 741. For (substractor) Ra = 1K, Rb = 1K, RF = 1K, R = 1K, IC 741 Circuit Diagram:- ADDER SUBTRACTOR
8 Theory: - Figure shows inverting configuration with two inputs V1, V2. The circuit can be verified by examining the expression for the voltage V0, which is obtained KCL at node V2. From figure shown, Ia + Ib = IB + I F ---------(1) Since Ri and A of the op-amp are ideally infinity, IB = 0A and V1 = V2 = 0V.Therefore, If in the above circuit Ra = Rb = Rf The equation can be written as, Vo = -(Rf / R) (V1+V2) This means that the output voltage is equal to negative sum of all the inputs times the gain of the circuit - hence, is called as a summing amplifier. When the gain of the circuit is unity that is Ra = Rb = Rf, the output voltage is equal to negative sum of all input voltage. Negative gain in this equation indicates that there is a phase shift of 180 between the input and output. Procedure:- For Adder Circuit: 1) Connect the circuit as shown in figure. 2) Give the supply voltage to op-amp. 3) Apply the input signals Va, Vb, to the inverting input terminal of op-amp. 4) Note the output for the corresponding voltages. 5) Take the reading for several input voltages Va, Vb, Vc. 6) Calculate the theoretical and practical output voltage. Observation Table:-
9 For substractor Circuit:- 1) Connect the circuit as shown in figure. 2) Give the supply voltage to op-amp. 3) Apply the input signals Va, Vb, to the inverting input terminal of op-amp. 4) Note the output for the corresponding voltages. 5) Take the reading for various of input voltages Va, Vb, 6) Calculate the theoretical and practical output voltage. Observation Table: - Result:- Thus theoretical and practical values are verified Viva Questions :- 1) State two practical application of adder/substractor ckt. 2)Which type of Op-Amp mode is used for adder and why?
10 Experiment No: 4 Aim:- Design and verify gain and frequency response of Integrator and Differentiator ckt. Using IC 741. Show its simulation results on microcap Apparatus:- Op- Amp 741, Resistances,Capacitor, Function Generator. Theory:- Integrator and Differentiator: - A circuit in which the output voltage is the integration of the input voltage is called as the integrator or the integration amplifier. Such a circuit is obtained by using a basic inverting amplifier configuration if the feedback resistor RF is replaced by a capacitor CF The expression for the output voltage Vo can be obtained by writing Kirchhoff s current equation at node V2 I =IB + IF (Since IB is negligibly small, I IF) Recall that the relationship between current through and voltage across the capacitor is Ic = C dv/dt Therefore (Vin - V2)/R1 = CF (d/dt)(v2-vo) However, V2 0 (virtual ground Concept) because A is very large. Therefore, Vin/R1 = CF d/dt(-vo) The output voltage can be obtained by integrating both sides with respect to time: t t _ Vin /R1 dt = _ CF d/dt (-Vo)dt 0 0 = CF (-Vo) + Vo t=0 Therefore, t Vo = -1/RC_ Vin dt + C 0 fb = 1/(2 RF CF) fa = 1/(2 RF CF ) INTEGRATOR CIRCUIT:-
11
12 DIFFERENTIATOR CIRCUIT: Procedure:- (Integrator) 1) Switch on the power supply. 2) Apply input from function generator i.e. sine or square (the input should be such that T> RF. (CF) 3) Connect C1 in parallel with RF by patch cords 4) Connect output of integrator to CRO by probe and observe the waveforms 5) Vary input frequency and observe the change in output waveforms Procedure:- (Differentiator) 1) Switch on the power supply. 2) Apply input from function generator i.e. sine or square (the input should be such that
13 T> RF.(CF). 3) Connect C1 in parallel with RF by patch cords 4) Connect output of differentiator to CRO by probe and observe the waveforms 5) Vary input frequency and observe the change in output waveforms Result:- Thus output waveforms of integrator and differentiator are studied. Viva Questions :- 1)What do you mean by cut off frequency. 2) Explain integrator and diffentiator.
14 Experiment No. 5 Aim:- To perform experiment of OP AMP as voltage follower. Objectives :- To study voltage follower using op-amp & plot its frequency response. Apparatus:- IC 741, Bread Board Systems Resister, Power Supply & Connecting Wires etc. Ckt Diagram:- Theory:- The smallest gain that can be obtained from a non-inverting amplifier with feedback is unity. When configured for unity gain, it is called as a voltage follower, because the output voltage is equal to and in phase with the input. In other words, in the voltage follower the output follows the input. Although it is similar to the discrete emitter follower, the voltage follower is preferred, because if has much higher input resistance and the output amplitude is exactly equal to the input. To obtain the voltage follower from the non-inverting amplifier simply open R. and short RF. In the circuit of voltage follower all the output voltage is feed back into the inverting terminal of the op-amp. The gain of the feedback circuit is unity. From the experiment of Non-inverting amplifier. The expression for gain is given by the equation. AF= 1+ (RF/R1) But in voltage follower ckt. the value of feedback resistance Rf is Zero, hence gain is unity. I/P impedance is given by Rif= A Ri since open loop gain is very high,( ideally infinite) hence it is very large & the output impedance is Rof= Ro/A very small(ideally zero).the voltage follower is also called a non-inverting buffer, because when placed between two networks, it removes the loading on the first network. Procedure:- 1) Connect the ckt. as shown in fig. 2) Give the DC supply to op-amp. (Dual power Supply)
15 3) Apply the sinusoidal signal of certain amplitude to the non-inverting input using signal generator. 4) Observe the output voltage on CRO. For this case the output amplitude should be same as input signal amplitude. 5) Keeping the amplitude of the input signal fixed, vary the frequency of input signal in certain steps. And measure the output voltage for each frequency. Observation Table:- Input waveforms and Output waveforms Result:- Thus Theoretical and practical values are verified. Viva Questions :- 1)What is the ideal gain of buffer? 2) Which type of feedback is used in buffer?
16 Experiment No: 6 Aim:- 1st order low pass filter. Verify its frequency response characteristics. Objective: - Design a Low Pass Filter of 1st order having cut off frequency of 1KHz. Apparatus: - Op- Amp 741, Resistances, Capacitor & Function Generator. Circuit Diagram:- Theory:- Filters are the circuits, which are specifically designed for frequency rejection over a certain range and allow frequency over a specific range. Filters may be of three types: - 1) Low Pass Filter 2) High Pass Filter 3) Narrow and Wide Band Pass Filter. They may be classified as 1) Active Filters 2) Passive Filters. Active filters are designed without the use of inductors, which are costly and bulky. The designing is done independently as there is no coupling between input and output under active filters, filters with every high quality factor can be designed. In case of passive filters the resistance of coil and the dielectric losses of capacitor limit Q factor. Important parameters for filter:- 1) Cut Off Frequency. 2) Gain variation in Pass Band 3) Attenuation in Stop Band. 4) Rate of roll off beyond cut off frequency. Low Pass Filters are those filters that allow low frequency signals to pass i.e from d.c. to fc and block the higher frequency signals i.e. the signals above the cut off level fc.
17 ANALYSIS:- Given fc = 1KHz, Assume the value of C. fc = 1/ 2_RC 1 + Rf / R1 =3, Assume the value of R1 Observations:- Procedure:- 1) Make the connections according to the circuit diagram before turning on the supply. 2) Choose appropriate standard values of resistances and Capacitances. 3) For different frequencies and note the corresponding output Voltage. 4) Calculate the Gain using the formula and plot the graph between freq. and Gain. Waveform:- Result:- Thus a Low Pass Filter Circuit is designed with cut off frequency 1KHz and a graph is plotted between Frequency and Gain. Viva Questions :- 1) Define filter. 2) What the Order of filter indicates?
18 Experiment No 7(A) Aim:- Verify op-amp application as Camper & Clipper Apparatus:- CRO, Bread Board, Connecting wire & Multimeter Components Values:- R1 = 1K, RF = 10K RL = 10 K C1 =0.1µf, IC = 741 Circuit Diagram:- Theory:- The Clamper is a circuit, which clamps a signal to a different level. An op-amp Clamper has a resistor, a capacitor, & an op-amp. The clamper circuit works on charging of the capacitor by the signal and then discharging through the resistor. The values of R and C are so designed that constant Rc is so large that the capacitor through the resistor during the time, the op-amp is not conducting, during the analysis of the clamper circuit the op-amp are assumed to be ideal. The clampers are of following types: - 1) Positive Clamper:- This circuits the signal towards the positive side such that the negative side of the signal reduces to zero. Figure a shows the positive clamper. The input has a maximum value of Vim volts. During negative cycle of the input signal, the diode is forward biased and becomes short circuited (Closed Switch). The capacitor is charged to its maximum value of the input signal voltage (VM) in the direction shown. The output across short-circuited diode i.e. Across RL will be zero. During positive Cycle, the diode is reverse biased and behaves as an open circuited switch. The capacitor is now discharged through the resistor RL. It is assumed that RC constant of the circuit is such that the capacitor discharges fully; this adds the signal
19 voltage during the positive cycle. The resultant output waveform across the op-amp i.e. Across RL is equal to VM+Vm = 2VM. 2) Negative Clamper:- This circuit shifts the signal towards the negative side such that Positive side reduces to zero. Note that the signal is reduced to zero in the positive side and the level in the negative side is 2 Vim, where Vim is the maximum value of the input signal. Procedure:- 1) Study the circuit of the clamper. 2) Connect the sine wave input from function generator by using patch chords. 3) Note different clamper levels by varying the reference voltage. 4) Observing them on CRO & draw the waveforms on graph paper. 5) Take the amplitudes of the waveform for various clamping voltage. Observations: - Input Signal Amplitude = Output Signal Amplitude = Result:- The various waveforms of clamped signal are observed on CRO. Viva Questions: - 1) What is use of dc restorer? 2) What do you mean by clamping?
20 Experiment No 7 (B) Aim :- Verify and simulate Clipper circuit using IC 741. Apparatus:- Diode, Bread Board, Patch cords, CRO, Components Values:- RF = 1 k, D1 = IN4007, IC 741 Circuit Diagram:- Theory: - The switching operation of diode is utilized to clip, remove, or chop off a part of the input signal and obtain a new wave shape to be used for a particular purpose. These wave shapes are used in computers, radars, etc. Types of Diode Clippers The diode clippers are of the following types:- 1) Positive clippers The circuit, which clips off the positive cycle of the input A.C. signal is called positive clipper. See fig.(a) where a diode is kept in series with a limiting or controlling resistance R. The input is given as shown and output is taken across a load RL. The input Vim has a maximum value of 10volts. Operation:- When positive cycle of the signal appears the diode becomes forward biased (short circuited0; hence voltage across the diode is zero. In other words, positive cycle is clipped off and does not appear at the output. The whole of the input is dropped across R. 1) During negative cycle of the input signal the diode becomes reverse biased (open circuited) and hence the whole input voltage of the negative cycle appears across the diode (or across RL) 2) Negative clippers
21 The clipping circuit in which negative half cycle of the input A.C. signal is clipped or chopped off is known as negative clipper circuit. This is similar to the positive clipper except that the polarity of the diode is reversed. Figure (b) shows the circuit and fig(c) shows the input and output wave forms. Biased clippers The clipper circuit in which the diode is biased with a battery is known as biased clipper. In these circuits, the whole of the cycle (positive or negative) is not clipped off., but only the desired part of the signal is clipped off which is beyond the biasing voltage of the battery. Biased clippers may be of two types. (i) Biased positive clipper Fig. shows a biased positive clipper, which will remove a part of the positive cycle beyond the biasing voltage (V= 5 V) of the battery. The input voltage Vin has a maximum value of 8V Operation: - (i) When the positive cycle of the signal( maximum value = 8v) appears, the diode is forward biased from the signal side but reverse biased form the battery side. The battery will not allow the diode to become forward biased up to its own voltage(=5v) In other words, up to 5V, the diode will remain reverse biased ( open circuit) and only 5V will appear across the diode ( and hence across RL) beyond 5v the battery will loose all control on the diode and it will become forward biased from the signal side, which will make it short and the remaining part of the signal will not appear across the diode ( load ) i.e. the part beyond 5V(8V-5V=3V) will be clipped off. (ii) During negative cycle of the signal the diode is reverse biased as well as from the battery side. The diode will be open circuited and full voltage will appear across the diode and hence across RL. This will remove a part of the negative cycle. It is the same except that the polarities of the diode and the battery are reversed. Figure shows the input and output shapes. Its operation is just the reverse of the biased positive clipper circuit. The input Voltage has a maximum value of 8V and battery used is of 5V. Procedure:- Write down procedure in your own words.. Observation table:- Vin = Vo = Result:- The output waveform of clipper is observed.
22 viva Questions :- 1)Explain difference between clipper and clamper. 2)Explain +ve and -ve clipper level?
Fig. 3, 555 Block Diagram G.H. Raisoni College of Engineering, Nagpur. 23 EXPERIMENT NO 8 Aim : Astable multivibrator using IC 555. OBJECTIVES : (1) To study the astable multivibrator using IC 555'r /" (2) To study astable multivibrator as a square wave oscillator. /' (3) To study % duty cycle in case of astable operation. (4) To study the waveforms of astable multivibrator.. (5) To change the pulse width of astable operation. INTRODUCTION : The timer type 555 is the most versatile linear Ic. It was introduced by signatic corporation as SE INE 555. IC 555 used for following application. Monostable, A stable multivibrator, Dc - Dc converter, Digital logic probes, waveform generator etc. The timer 555 is available as an 8 pin mini DIP, or a 14 pin mini DIP. The SE 555 is designed for the operating temperature range Tom -55 to + 125, while NE 555 operates over a temperature range of 0 to 70 c.
24 Features ofic 555 :. 1) It can operate on + 5v to + 18v supply voltage. 2) It have adjustable duty cycle. 3) Timing can be adjust Tom J.l see to hours. 4) High current output. 5) Output can drive TTL. 6) Capacity to source or sink current of 22mA. 7) Reliable, easy to use, and low cost like general purpose OP-Amp. In functional diagram three 5 ill internal resistors acts as voltage divider giving bias voltage of (2/3 Vcc) to comparator 1. and 1/3 Vcc to lower comaparator 2. Where V cc is the Supply voltage. 1) Pin 1:- Ground :- All voltage are measured with respect to this terminal. 2) Pin 2 :- Trigger :- The output of timer depends on the Amplitude of the external trigger pulse applied to this pin. The Olp is low if the voltage at this pin is greater than 2/3 V cc. However when negative going pulse of amplitude larger than 1/3 V cc is applied to this pin, the comparator -2 output goes low, which in turn switches the output of the timer high. The output remains high as long as the trigger is held at a low voltage. 3) Pin 3 :- Output : - There are two ways a load can be connected at output terminal either between pin 3 and ground [pin 1] or between pin 3 and supply voltage + V cc. When the output is low load current flows through the load connected between pin 3 and +Vcc into the output terminal and is called the sink current. However the current through the grounded load is zero when the output is low. For this reason, if the load is connected between + V cc and pin 3 there it is called the normally off load. On the other hand, when the output is high the current through the load connected between pin3 and +Vcc (normally on load) is zero. However the output terminal supplies current to the normally of load. This current is called the source current. The maximum value of sink or source current is 200 m A.
25 4) Pin 4 :- Reset :-By applying negative pulse to this Pin IC 555 can be reset. When this pin is not in used then it is connected to + V cc to avoid any possibility of false triggering. 5) Pin 5 : - Control Voltage : - An external voltage applied to this tenninal arrange the threshold as well as trigger voltage. Due to this voltage pulse width can be changed. When this pin is not in used then ground through capacitor of 0.01 J-lf to avoid any noise problem. 6) Pin 6 : - Threshold : - This is the non-inverting input terminal of comparator -1 which monitonpthe voltage across the external capacitor connected to this pin and ground when the v~ is grealtr than or equal to threshold voltage 2/3 V cc, the output of comp 1 goesflighr*hich in turn swi#hes th~ output of timer to low. 7) Pin 7:- Discharge :- This pin is internally connected to the collector of Ql. When output is high Q 1 is off and acts as an open circuit& to the external capacitor e conne<sted across it. Whereas if output is low Q 1 is saturated and acts as a short circuit, Shorting out the external capacitor e to ground. 8) Pin 8 : +VCC :- The supply voltage + 5v to + 18 v is applied to this pin with respect vc. c..to ground pin 1. Astable operation Fig (3) shows the circuit diagram for astable multivibrator using IC 555. Initially,.'if output is high, then capacitor C starts charging towards Vcc through RA & RB. So voltage across capacitor V c increases. As soon as voltage across capacitor V c equals to 2/3 Vcc, then comparator-1 triggers the flip-flop and the outputswitches low (as shown in waveform). So, now capacitor 'c' starts discharging through RB & internal transistor Q1. SO Vc decreases when voltage across capacitor Vc equals to 1/3 Vcc then comparator-2 output trigger the flip-flqp,and the poutput goes high. Then the complete cycle repeats as shown in waveform fig (4). In waveform, the capacitoris periodically charged & discharged between 2/3 V cc and 1/3
26 V cc repectively. The time during which ~apacitor discharges trom 1/3 V cc to 2/3 V cc is equal to the time for which output is low and it is given by Thus the total period of the output waveforms is give~ T=Tc+Td = 0~6? (RA + 2 Ra) C. Therefore the fi:equency of oscillation is given by This frequency of oscillation is also called as tree-running trequency. Above equation shows that ftequecny of oscillation is independent of the supply Circuit Diagram : + 5 v +Vcc R a R b 4 8 7 6 555 3 2 1 5 O/P C.01µF Observation Table : Sr N o. Ra Rb Theo. Tc=.69Rb Pract From CRO Theo Td=.69(Ra+Rb) Pract Td Tot = Tc+Td Tot. Theo T=Tc+ Td Theo freq Pract freq
27 1 Result : By changing the value ofra = Rl or R2 or R3 and ~ the ftequency of oscillation can be change. EXPERIMENT NO : 9 AIM : BISTABLE MULTIVIBRATOR USING IC 555. OBIECTIVES: (I) To study the circuit of Bistable multivibrator using IC 555. (2) To study the va. INTRODUCTION The timer type 555 is the most versatile linear Ie. It was introduced by signetic corporation as SEINE 555, IC 555 used for following apphcation, Monostable, A stable multivibrator,dc - DC converter, Digital logic probes. waveform generator etc. The timer 555 is available as an 8 pin metal can, an 8 pm mini DIP, or a 14 pin mini DIP, The SE 555 is designed for the operating.te'mperature range from "':55 ' to + 125, While NE 555 operates over a temperature range of 0" to 70" c. FEA TU RES OF IC 555: (I) It can operate on +5 v to + 18 v supply voltage, (2) It have adjustable duty cycle, (3) Timing can be adjust from ~ see to hours, = (4) High current output. (5) Output can drive TTL. (6) Capacity to source or sink current of 200 ma (7) Reliable, easy to use, and low cost like general purpose OP- AMP, PIN DIAGRAM OF IC 555:
28 (I) Pin) : - G ro un d : - All voltage are measured with respect to this terminal (2) Pin 2 :- Trigger :- The output of this timer depends on the Amplitude of the external trigger pulse applil'd to this pin 11le 0/1' is low.frhl' voltagl' at this pili is greatcr than 2/3 Vcc. However whcn ncgatlve golllg pulsc of amplitude larger than 1/3 vcc IS applied to tlus pin., the comparator. 2 output goes low., which in turn switches the output of the timer high. The output remains high as long as the trigger terminal is held at a low voltage. (3) Pin 3: - 0 u t put: - There are two ways a load can be connected at output terminal either between pin 3 and ground [pin I] or between pin 3 and supply voltage + vcc. When the output is low load current flows through the load connected between pin 3 and +vcc into the output terminal and is called the sink current. However the current through the grounded load is zero when the output is low. For this reason, if the load is connected between +vcc and pin3 there it is called the normally on load and that connected between pin 3 and ground is called the normally off load. On the other hand, when the output is high the current through the load connected between pin3 and +vcc (normally on load) is zero. However the output terminal supplies current to the normally off load. This current is called the source current. The maximum value of sink or source current is 200 ma. (4) Pin 4:- Reset :- By applying negative pulse to this pm IC 555 can be reset. Whenthis pin is not in used then it is connected to +vcc to avoid any possibility of false triggering. (5) Pin 5 :- Control voltage:- An external voltage applied to this terminal arrange the threshold as well as trigger voltage. Due to this voltage pulse width can be changed. When this pin is not in used then ground through capacitor of 0.01 flfto avoid any noise problem. (6) Pin 6 :-Threshold:- This is the non-inverting input terminal of comparator-i which monitors the voltage across the external capacitor connected to this pin and ground when the voltage is greater than or equal to threshold voltage 2/3 vcc. the output of comp I goes high, which in turn switches the output of timer to low (7) Pin 7 Discharge :- TIlis pin is internally connected to the collector of QI. \v"hen output is high QI is off and acts as an open circuits to the e"..ternal capacitor Lconnected across it. Whereas if output is low Q I is saturated and acts as a short circuit, shorting out the external capacitor f to ground. (8) Pin 8 : - + v cc: - TIle supply voltage +5v to + 18\1 is applied to this pin with respect to ground pin I. BISTABLE OPERATION: If a negative pulse less than 1/3 vcc is applied to the tnggcr Input pm 2. comparator-2 set ~le flip-flop and output god high~
Fig. 3, 555 Block Diagram G.H. Raisoni College of Engineering, Nagpur. 29 When positive going pulse greater than 2/3 vec IS applied to the threshold terminal (pm 6) then comparator-i will Reset the flip-flop and charge output stage from high level to low level So when positive voltage/negative voltage is applied to the 1C555 in Bistable mode then output at pin3 will be zero (low) or high respectively. The advantage of Bistable multivibrator is that it uses little power and requires no extra components other than control voltage by pass capacitor connected at pins and grounds Also it can directly drives the Relays. PROCEDURE: ( I) Study the circuit given on the front panel of the kit. (2) Switch ON the power supply and measure supply voltage +6v at pins with respect to ground pin 1. (3) Apply negative / Low pulse at pin 2 by pressing switch S.. The output at pin 3 goes high so green LED becomes ON it will remains in ON state until the state of input is not changed (4) Apply positive pulse/voltage by presssing switch S2. Then output at pin 3 becomes zero or low. Hence green LED becomes off.. (5) Again when switch 5, is pressed then step 3 and step 4 is repeated again and again.
30 Components value: R.. = lok, R2:= look, OBSERVA TION: (I) When switch SI is pressed then measured following voltages. Voltage at input pin 2 = volt Output voltage at pin 3 = _ volt. (2) When switch S2 is pressed, then again,measured following voltages. Voltage at input pin&= volt. Output voltage at pin 3 := volt. Circuit Diagram: +6 V R 1 X 4 R 8 7 (Dis) S1 2 (Tr) 555 3 To CRO S2 6 (Th) 1 5 R 2 R 3 DISCUSSION ;If Load is connected inplace of LED [pin 3] then if51 is ON then Load becomes ON. But if 5: is pressed then the same Load becomes Reset (OFF).
31 Aim : To study IC 555 EXPERIMENT NO. 10 Apparatus : IC 555 Theory : Pin connections You can use the 555 effectively without understanding the function of each pin in detail. The 555 timer is an extremely versatile integrated circuit which can be used to build lots of different circuits. Astable circuits Astable circuits produce pulses. The circuit most people use to make a 555 astable looks like this:
32 As you can see, the frequency, or repetition rate, of the output pulses is determined by the values of two resistors, R1 and R2 and by the timing capacitor, C. The design formula for the frequency of the pulses is: The HIGH and LOW times of each pulse can be calculated from: The duty cycle of the waveform, usually expressed as a percentage, is given by: An alternative measurement of HIGH and LOW times is the mark space ratio: Before calculating a frequency, you should know that it is usual to make R1=1 kω because this helps to give the output pulses a duty cycle close to 50%, that is, the HIGH and LOW times of the pulses are approximately equal. Remember that design formulae work in fundamental units. However, it is often more convenient to work with other combinations of units: resistance capacitance period frequency F s Hz µf s Hz
33 µf ms khz With R values in MΩ and C values in µf, the frequency will be in Hz. Alternatively, with R values in kω and C values in µf, frequencies will be in khz. Suppose you want to design a circuit to produce a frequency of approximately 1 khz for an alarm application. What values of R1, R2 and C should you use? R1 should be 1kΩ, as already explained. This leaves you with the task of selecting values for R2 and C. The best thing to do is to rearrange the design formula so that the R values are on the right hand side: Now substitute for R1 and f : You are using R values in kω and f values in khz, so C values will be in µf. To make further progress, you must choose a value for C. At the same time, it is important to remember that practical values for R2 are between 1 kω and 1MΩ. Suppose you choose C = 10 nf = 0.01 µf: that is: and: Result : Hence Timer IC 555 studied.
34