AN UBA2015/UBA2017 saturating inductor support during ignition. Document information

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UBA2015/UBA2017 saturating inductor support during ignition Rev. 1 16 August 2012 Application note Document information Info Keywords Abstract Content UBA2015, UBA2017, saturating resonant tank inductor support This application note describes how to use a UBA2015/UBA2017 or in combination with a resonant tank inductor that saturates during lamp ignition. This application note also applies to the UBA2017 half-bridge controller IC without a PFC.

Revision history Rev Date Description v.1 20120816 first issue Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 2 of 12

1. Introduction This application note describes how to use a UBA2015/UBA2017 in combination with a resonant tank inductor that saturates during lamp ignition. The ignition voltage V ign is applied to the lamp for time t ign to ignite a fluorescent lamp. The V ign voltage is much higher than the nominal operating voltage of the lamp. Most lamp ballasts apply an open lamp voltage to the lamp connector during the ignition state. The open lamp voltage is applied for between 100 ms and 200 ms to ensure old and cold lamps ignite. Some lamp ballasts use a saturating inductor during the ignition state to reduce the size and cost of this inductor. The UBA2015/UBA2017 circuitry only supports saturation protection. The IC reduces the on-time of the low-side half-bridge transistor when the inductor saturates. However, the high voltage is not maintained over the total programmable ignition time-out period. The UBA2015/UBA2017 can also be used to control inductor saturation during the ignition time-out period. The saturation is controlled during the programmable ignition time-out period. This function requires an extra circuit that connects to the CF pin capacitor. This extra circuit is explained in this application note. Remark: Unless otherwise stated, all voltages are typical values. 1.1 Features 2. Circuit Diagram Operating the resonant tank inductor in saturation Regulation is adjustable for several saturation levels Fig 1. Circuit to support inductor saturation All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 3 of 12

The additional parts for inductor saturation regulation are: D CF, D1, D2, R CF, R sense(qlhb) and C sense(qlhb). To reduce the sense resistor values, Schottky diodes can be used on positions D1 and D2. 2.1 Extended Bill of Materials Table 1. Extended Bill of Materials Part reference Description C CF C DC C div C sense(qlhb) C res D1 D2 D CF D VFB L1A L1B; L1C UBA2015/UBA2017 oscillator frequency setting DC blocking capacitor capacitive lamp voltage divider filter capacitor to remove hard switching spikes resonance capacitor increases V CF when the L1A inductor saturates and QHHB is on increases V CF when the L1A inductor saturates and QLHB is on CF pin protection against negative voltages clamping diode to ground resonant tank inductor inductor L1 windings for heating the filaments R CF R GHHB ; R GLHB R sense(qhhb) R sense(qlhb) R VFB1 ; R VFB2 R VFB3 provide impedance to lift V CF MOSFET gate damping resistors inductor current sense resistor when QHHB is on inductor current sense resistor when QLHB is on resistor divider VFB pin voltage VFB pin voltage offset 3. Operation and Performance At the end of the preheat state, the half-bridge frequency is swept down by increasing the voltage on the VCO input (pin CIFB). The current in the inductor increases during the sweep and the inductor starts to saturate. Figure 2 shows the first ignition attempt and a small part of the second and final ignition attempt. The resonance capacitor C res integrates the current waveform to generate the ignition voltage. Figure 2 shows the CF pin voltage on channel C4. When saturation pulses are present, the CF pin voltage is increased because of the signal injected by diodes D1 or D2. Each time the CF pin reaches 2.5 V, the active MOSFET is switched off. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 4 of 12

Fig 2. (1) C1=V Cres. (1) C2 = V CPT. (1) C3 = I L1A. (1) C4 = V CF. First ignition attempt: lamp voltage, inductor current, CPT timer, CF pin voltage Figure 2 shows the fault timer counting on channel C2. The VFB pin activates counting and is necessary to shut down the ballast in case no lamp is present. The fault timer is activated using the VFB pin under the following circumstances: In the ignition state: when the VFB voltage is > V th(ov)(vfb) = 2.5 V and <V th(ovextra)(vfb) = 3.35 V. In burn state after flow detection = V CIFB = 3.0 V: when the VFB voltage > V th(oveol)(vfb) > 880 mv (DIM pin left open, UBA2015A only) and <V th(ovextra)(vfb) =3.35 V In addition, the voltage feedback stabilizes the voltage increase on the CIFB pin. Figure 3 shows the CIFB pin voltage on channel 4. The CIFB voltage sets the operating frequency. However during saturation, the operating frequency is higher than set because the MOSFET on-time is reduced by triggering the CF threshold voltage V th(cf) at 2.5 volts. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 5 of 12

(1) C1=V Cres. (2) C2 = V CPT. (3) C3 = I L1A. (4) C4 = V CIFB. Fig 3. First ignition attempt: lamp voltage, inductor current, CPT timer, CIFB pin voltage 4. Step-by-step guide The goal is to set the sense resistors for the correct open lamp voltage during an open lamp test. 1. Start with sense resistors R sense(qhhb) and R sense(qlhb) at 1. Keep R sense(qhhb) equal to R sense(qlhb) ). 2. Measure the open lamp voltage during ignition. 3. If the open lamp voltage is too low, reduce the value of R sense(qhhb) and R sense(qlhb). Then go to step 2. 4. If the open lamp voltage is too high, increase the value of R sense(qhhb) and R sense(qlhb). Then go to step 2. 5. Open lamp voltage is ok, R sense(qhhb) and R sense(qlhb). are correct. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 6 of 12

5. Simplified circuit It is possible to operate a saturating inductor with a smaller circuit for some ballast (large CIFB capacitor, non-dimmable). Remark: Test only using R sense(qlhb) for inductor saturation regulation, do not mount R sense(qhhb), D1 or D CF. The R sense(qlhb) value obtained is higher compared to Figure 1. aaa-004406 Fig 4. Simplified circuit to support inductor saturation All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 7 of 12

6. Star ground configuration The UBA2015/UBA2017 is subjected to large disturbances because of the high peak current during saturation. These disturbances are caused when the half-bridge switching node has commuted to the bus voltage V bus. Place the star ground near the GND pin (15) of the UBA2015 to minimize the common impedance of the ground tracks. Route the bus voltage next to the ground between the bus capacitor C11 and half-bridge MOSFETs to minimize the magnetic field of the high di/dt signal. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 8 of 12

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x Fig 5. Star ground example to indicate board layout set-up All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 9 of 12

7. References [1] UBA2016A/15/15A 600 V fluorescent lamp driver with PFC, linear dimming and boost function [2] UBA2017/UBA2017A 600 V fluorescent lamp driver with linear dimming function [3] AN10958 Fluorescent lamp driver with PFC using the UBA2015/16 family [4] UM10359 UBA2016AT demo board 1 28 W dim and boost [5] UM10438 UBA2015AP evaluation board 1 35 W T5 dimmable 120 V (AC) [6] UM10440 UBA2015AT reference design 2 35 W T5 dimmable 230 V (AC) [7] UM10466 UBA2015P reference design 2 35 W T5 non-dimmable 230 V (AC) [8] UM10486 UBA2015P reference design 2 35 W T5 non-dimmable 120 V (AC) [9] UM10561 UBA2017AT reference design for 420 V (DC) [10] UM10564 UBA2017DB1064 2 x 28 W T5 demo board All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 10 of 12

8. Legal information 8.1 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 8.2 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Evaluation products This product is provided on an as is and with all faults basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. Translations A non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 8.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Application note Rev. 1 16 August 2012 11 of 12

9. Contents 1 Introduction............................ 3 1.1 Features.............................. 3 2 Circuit Diagram......................... 3 2.1 Extended Bill of Materials................. 4 3 Operation and Performance............... 4 4 Step-by-step guide....................... 6 5 Simplified circuit........................ 7 6 Star ground configuration................. 8 7 References............................ 10 8 Legal information....................... 11 8.1 Definitions............................ 11 8.2 Disclaimers........................... 11 8.3 Trademarks........................... 11 9 Contents.............................. 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 August 2012 Document identifier: