Analog Electronics
BJT Structure The BJT has three regions called the emitter, base, and collector. Between the regions are junctions as indicated. The base is a thin lightly doped region compared to the heavily doped emitter and moderately doped collector regions. npn B (base) C (collector) n p n Base-Collector junction Base-Emitter junction pnp B C p n p The pn junction joining the base region and the emitter region is called the baseemitter junction. E (emitter) E The pn junction joining the base region and the collector region is called the basecollector junction
BJT Operation In normal operation, the base-emitter is forward-biased and the base-collector is reverse-biased. For the npn type shown, the collector is more positive than the base, which is more positive than the emitter. For the pnp type, the voltages are reversed to maintain the forward-reverse bias. BC reversebiased BC reversebiased BE forwardbiased BE forward- biased pnp npn
BJT Currents The direction of conventional current is in the direction of the arrow on the emitter terminal. The emitter current is the sum of the collector current and the small base current. That is, I E = I C I B. I C I C I C I C I B n p I B I B p n I B n p I E I E I E I E npn pnp
BJT Parameters Two important parameters, β DC (dc current gain) and α DC are introduced and used to analyze a BJT circuit. DC Beta (β DC ) Ratio of DC collector current and DC base current. β DC = = I C /I B DC Alpha (α DC ) Ratio of DC collector current to the DC emitter current. α DC = = I C /I E V BB forward bias the baseemitte jumction and V CC reverse bias the base-collector junction
Transistor DC Model BJT in un-saturation mode is a current controlled current source. Input circuit is a forward-biased diode through which there is base current. The output circuit is dependent current source. The value of o/p current is dependent on base current.
BJT Circuit Analysis Currents and voltages in BJT I B : dc base current I E : dc emitter current I C : dc source current V BE : dc voltage at base wrt. emitter V CE : dc voltage at collector wrt. emitter. V CB : dc voltage at collector wrt. Base.
BJT Characteristics The collector characteristic curves show the relationship of the three transistor currents. The curve shown is for a fixed based current. The first region is the saturation region. As V CE is increased, I C increases until B. Then it flattens in region between points B and C, which is the active region. After C, is the breakdown region. I C B Saturation region Active region Breakdown region A 0 0.7 V V CE(max) V CE C
BJT Characteristics The collector characteristic curves illustrate the relationship of the three transistor currents. I C By setting up other values of I B6 base current, a family of I B5 collector curves is developed. b DC is the ratio of collector current to base current. IC bdc I It can be read from the curves. The value of b DC is nearly the same wherever it is read. B 0 Cutoff region I B4 I B3 I B2 I B1 I B = 0 V CE
BJT Characteristics What is the b DC for the transistor shown? I C (ma) Choose a base current near the center of the range in this case I B3 which is 30 ma. Read the corresponding collector current in this case, 5.0 ma. Calculate the ratio: 10.0 8.0 6.0 4.0 2.0 I B6 I B5 I B4 I B3 I B2 I B1 = 60 ma = 50 ma = 40 ma = 30 ma = 20 ma = 10 ma b DC I I C 167 B 5.0 ma 30 ma 0 I B = 0 V CE
Cutoff In a BJT, cutoff is the condition in which there is no base current, which results in only an extremely small leakage current (I CEO ) in the collector circuit. For practical work, this current is assumed to be zero. In cutoff, neither the base-emitter junction, nor the base-collector junction are forward-biased. R B R C I CEO V CE V CC I B = 0 V CC
Saturation In a BJT, saturation is the condition in which there is maximum collector current. The saturation current is determined by the external circuit (V CC and R C in this case) because the collector-emitter voltage is minimum ( 0.2 V) When the base-emitter junction is forward biased and there is enough base current to produce maximum collector current, the transistor is saturated In saturation, an increase of base current has no effect on the collector circuit and the relation I C = b DC I B is no longer valid. V BB R B V CE = V CC I C R C V CC I B R C I C(SAT) =V CC V CE(SAT) /R C I B(min) = I C(SAT) β DC I C
DC Load Line The DC load line represents the circuit that is external to the transistor. It is drawn by I C connecting the saturation Saturation I and cutoff points. C(sat) The transistor characteristic curves are shown superimposed on the load line. The region between the saturation and cutoff points is called the active region. I B = 0 Cutoff 0 V CE(sat) V CC V CE
DC Load Line R C 3.3 kw What is the saturation current and the cutoff voltage for the circuit? V BB Assume V CE = 0.2 V in saturation. 3 V VCC R B β DC = 200 15 V 220 kw I SAT V 0.2 V 15 V 0.2 V R 3.3 kw CC C 4.48 ma VCO VCC 15 V Is the transistor saturated? I B 3.0 V 0.7 V 10.45 m A 220 kw I C = b I B = 200 (10.45 ma) = 2.09 ma Since I C < I SAT, it is not saturated.
Data Sheets Data sheets give manufacturer s specifications for maximum operating conditions, thermal, and electrical characteristics. For example, an electrical characteristic is b DC, which is given as h FE. The 2N3904 shows a range of b s on the data sheet from 100 to 300 for I C = 10 ma. ON Characteristics DC current gain ( I C = 0.1 ma dc, V CE = 1.0 V dc) ( I C = 1.0 ma dc, V CE = 1.0 V dc) ( I C = 10 ma dc, V CE = 1.0 V dc) ( I C = 50 ma dc, V CE = 1.0 V dc) ( I C = 100 ma dc, V CE = 1.0 V dc) Characteristic Symbol Min Max Unit 2N3903 2N3904 2N3903 2N3904 2N3903 2N3904 2N3903 2N3904 2N3903 2N3904 h FE 20 40 35 70 50 100 30 60 15 30 150 300
Data Sheets
DC and AC Quantities The text uses capital letters for both AC and DC currents and voltages with rms values assumed unless stated otherwise. DC Quantities use upper case roman subscripts. Example: V CE. (The second letter in the subscript indicates the reference point.) AC Quantities and time varying signals use lower case italic subscripts. Example: V ce. Internal transistor resistances are indicated as lower case quantities with a prime and an appropriate subscript. Example: r e. External resistances are indicated as capital R with either a capital or lower case subscript depending on if it is a DC or ac resistance. Examples: R C and R c.
BJT Amplifiers A BJT amplifies AC signals by converting some of the DC power from the power supplies to AC signal power. An ac signal at the input is superimposed in the dc bias by the capacitive coupling. The output ac signal is inverted and rides on a dc level of V CE. V in R C V BB 0 V c V in V BB R B V b r e V c V CC V CE 0
BJT Switches A BJT can be used as a switching device in logic circuits to turn on or off current to a load. As a switch, the transistor is normally in either cutoff (load is OFF) or saturation (load is ON). V CC V CC V CC V CC R C I C = 0 R C R C I C(sat) R C I C(sat) 0 V R B I B = 0 C E V BB R B I B C E In cutoff, the transistor looks like an open switch. In saturation, the transistor looks like a closed switch.
The FET The idea for a field-effect transistor (FET) was first proposed by Julius Lilienthal, a physicist and inventor. In 1930 he was granted a U.S. patent for the device. His ideas were later refined and developed into the FET. Materials were not available at the time to build his device. A practical FET was not constructed until the 1950 s. Today FETs are the most widely used components in integrated circuits.
The JFET The JFET (or Junction Field Effect Transistor) is a normally ON device. For the n-channel device illustrated, when the drain is positive with respect to the source and there is no gate-source voltage, there is current in the channel. When a negative gate voltage is applied to the FET, the electric field causes the channel to narrow, which in turn causes current to decrease. V GG G p n n D S p R D V DD
The JFET As in the base of bipolar transistors, there are two types of JFETs: n-channel and p-channel. The dc voltages are opposite polarities for each type. The symbol for an n-channel JFET is shown, along with the proper polarities of the applied dc voltages. For an n-channel device, the gate is always operated with a negative (or zero) voltage with respect to the source. V GG Gate Drain Source R D V DD
The JFET There are three regions in the characteristic curve for a JFET as illustrated for the case when V GS = 0 V. Between A and B is the Ohmic region, where current and voltage are related by Ohm s law. From B to C is the active (or constant-current) region where current is essentially independent of V DS. Beyond C is the breakdown region. Operation here can damage the FET. I DSS 0 I D A Ohmic region B V P (pinch-off voltage) V GS = 0 Active region (constant current) C Breakdown V DS
The JFET When V GS is set to different values, the relationship between V DS and I D develops a family of characteristic curves for the device. Pinch-off Voltage I DSS V GS(off). I DSS I D V GS = 0 V GS = 1 V Notice that V p is positive and has the same magnitude as V GS(off). V P = 5 V V GS = 2 V V GS = 3 V V GS = 4 V V GS = V GS(off) = 5 V V DS
The JFET A plot of V GS to I D is called the transfer or transconductance characteristic curve. The transfer curve is a is a plot of the output current (I D ) to the input voltage (V GS ). The transfer curve is based on the equation I D I DSS I D I DSS V 1 V GS GS(off) By substitution, you can find other points on the curve for plotting the universal curve. 2 V GS V GS(off) 0.3 V GS(off) I DSS 2 I DSS 4 0 0.5 V GS(off)
Summary JFET Input Resistance V The input resistance of a JFET is given by: GS RI N IGSS where I GSS is the current into the reverse biased gate. JFETs have very high input resistance, but it drops when the temperature increases. Compare the input resistance of a 2N5485 at 25 o C and at 100 o C. The specification sheet shows that for V GS = 20 V, I GSS 1 na at 25 o C and 0.2 ma at 100 o C. At 25 o VGS 20 V C, RI N 20 GW! I 1 na At 100 o C, R GSS V 20 V GS IN 100 MW IGSS 0.2 μa
Summary JFET Biasing Self-bias is simple and effective, so it is the most common biasing method for JFETs. With self bias, the gate is essentially at 0 V. V DD An n-channel JFET is illustrated. The current in R S develops the necessary reverse bias that forces the gate to be less than the source. = 12 V R D 1.5 kw Assume the resistors are as shown and the drain current is 3.0 ma. What is V GS? V G = 0 V; V S = (3.0 ma)(330 W) = 0.99 V V GS = 0 0.99 V = 0.99 V R G 1.0 MW V G = 0 V R S I S 330 W
Summary JFET Biasing You can use the transfer curve to obtain a reasonable value for the source resistor in a self-biased circuit. I D (ma) What value of R S should you use to set the Q point as shown? 10 ma 8.0 The Q point is approximately at I D = 4.0 ma and V GS = 1.25 V. R V 1.25 V GS S ID 3.0 ma 375 W V GS 4 3 2 Q 1 6.0 4.0 2.0 0
Summary JFET Biasing Voltage-divider biasing is a combination of a voltage-divider and a source resistor to keep the source more positive than the gate. V G is set by the voltage-divider and is independent of V S. V S must be larger than V G in order to maintain the gate at a negative voltage with respect to the source. R 1 V G V DD R D I D Voltage-divider bias helps stabilize the bias for variations between transistors. R 2 V S I S R S
The MOSFET The metal oxide semiconductor FET uses an insulated gate to isolate the gate from the channel. Two types are the enhancement mode (E-MOSFET) and the depletion mode (D-MOSFET). An E-MOSFET has no channel until it is induced by a voltage applied to the gate, so it operates only in enhancement mode. An n- channel type is illustrated here; a positive gate voltage induces the channel. Gate SiO 2 Drain n p substrate n Source E-MOSFET V GG Induced channel I D n n R D VDD
Summary The MOSFET The D-MOSFET has a channel that can is controlled by the gate voltage. For an n-channel type, a negative voltage depletes the channel; and a positive voltage enhances the channel. A D-MOSFET can operate in either mode, depending on the gate voltage. V GG n n p R D D-MOSFET V DD V GG n n p R D V DD operating in D-mode operating in E-mode
Summary The MOSFET MOSFET symbols are shown. Notice the broken line representing the E-MOSFET that has an induced channel. The n channel has an inward pointing arrow. E-MOSFETs D-MOSFETs D D D D G G G G S S S S n channel p channel n channel p channel
Summary The MOSFET The transfer curve for a MOSFET is has the same parabolic shape as the JFET but the position is shifted along the x-axis. The transfer curve for an n-channel E-MOSFET is entirely in the first quadrant as shown. The curve starts at V GS(th), which is a nonzero voltage that is required to have channel conduction. The equation for the drain current is 2 I K V V D GS GS(th) I D 0 V GS(th) V GS
The MOSFET The D-MOSFET can be operated in either mode. For the n- channel device illustrated, operation to the left of the y-axis means it is in depletion mode; operation to the right means is in enhancement mode. As with the JFET, I D is zero at V GS(off). When VGS is 0, the drain current is IDSS, which for this device is not the maximum current. The equation for drain current is 2 V GS ID IDSS 1 V GS(off) V GS V GS(off) I D I 0 DSS
MOSFET Biasing E-MOSFETs can be biased using bias methods like the BJT methods studied earlier. Voltage-divider bias and drainfeedback bias are illustrated for n-channel devices. V DD V DD R 1 R D R G R D R 2 Voltage-divider bias Drain-feedback bias
MOSFET Biasing The simplest way to bias a D-MOSFET is with zero bias. This works because the device can operate in either depletion or enhancement mode, so the gate can go above or below 0 V. V DD V DD R D R D V G = 0 V I DSS ac C V GS = 0 input R G R G Zero bias, which can only be used for the D-MOSFET