GHz GaAs MMIC Power Amplifier

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17.24. GHz GaAs MMIC May 25 Rev 5May5 Features High Linearity Output Amplifier Balanced Design Provides Good Input/Output Match OnChip Temperature Compensated Output Power Detector 19. Small Signal Gain +36. m Third Order Intercept (OIP3) 1% OnWafer RF, DC and Output Power Testing 1% Visual Inspection to MILSTD883 Method 21 Chip Device Layout General Description Mimix Broadband s two stage 17.24. GHz GaAs MMIC power amplifier is optimized for linear operation with a Absolute Maximum Ratings third order intercept point of +36. m. The device also Supply Voltage (Vd) +6. VDC includes Lange couplers to achieve good input/output Supply Current (Id) 7 ma return loss and an onchip temperature compensated output Gate Bias Voltage (Vg) +.3 VDC power detector. This MMIC uses Mimix Broadband s.15 µm GaAs PHEMT device model technology, and is based upon Input Power (Pin) +9. m electron beam lithography to ensure high repeatability and Storage Temperature (Tstg) 65 to +165 O C uniformity. The chip has surface passivation to protect and Operating Temperature (Ta) provide a rugged part with backside via holes and gold Channel Temperature (Tch) MTTF Table 4 metallization to allow either a conductive epoxy or eutectic solder die attach process. This device is well suited for (4) Channel temperature affects a device's MTTF. It is recommended to keep channel temperature as low as Millimeterwave PointtoPoint Radio, LMDS, SATCOM and VSAT possible for maximum life. applications. Electrical Characteristics (Ambient Temperature T = 25 o C) 55 to MTTF Table4 Parameter Frequency Range (f ) Input Return Loss (S11) Output Return Loss (S22) Small Signal Gain (S21) Gain Flatness ( S21) Reverse Isolation (S12) Output Power for 1 Compression (P1) 2 Output Third Order Intercept Point (OIP3) 1,2 Drain Bias Voltage (Vd1,2,3,4) (Vd5 [Det], Rd=36KΩ) Gate Bias Voltage (Vg1,2,3,4) Supply Current (Id) (Vd=5.5V, Vg=.5V Typical) Detector (diff ) Output at 2 m3 Units GHz m m VDC VDC ma VDC Min. 17. +35. 1. Typ. 2. 2. 19. +/1. 4. +25. +36. +5.5.5 43.28 Max. 24. +5.6. 65 (1) Measured at +16 m per tone output carrier level at 22 GHz. (2) Measured using constant current. (3) Measured with either Vd5=I.V or Vd5=5.5V and Rd=5.6KΩ. Page 1 of 6

17.24. GHz GaAs MMIC May 25 Rev 5May5 Measurements Gain () X Vd1,2,3,4=5.5 V Id1,2,3,4=43 ma 25 2 1 15 2 1 3 5 4 5 5 6 14. 15. 16. 17. 18. 19. 2. 21. 22. 23. 24. 25. 26. 27. S21 Avg S12 Avg Reverse Isolation () Input Return Loss () X Vd1,2,3,4=5.5 V Id1,2,3,4=43 ma 5 5 1 1 15 15 2 2 25 25 3 3 35 35 4 4 45 45 14. 15. 16. 17. 18. 19. 2. 21. 22. 23. 24. 25. 26. 27. S11 Avg S22 Avg Output Return Loss () Output Power P1 (m) X Vd1,2,3,4=5.5 V Id1,2,3,4=43 ma 3 29 28 27 26 25 24 23 22 21 2 18 2 22 24 26 OIP3 (m) X Vd1,2,3,4=5.5 V Id1,2,3,4=43 ma 44 6 42 5.5 4 5 38 4.5 36 4 34 3.5 32 3 3 2.5 28 2 26 1.5 17 18 19 2 21 22 23 24 Min Avg Max Std Dev X Vd1,2,3,4=5.5 V Id1,2,3,4=43 ma Frequency=22. GHz OIP3 (m) 4 1.25 39 38 1 37 36.75 35 34.5 33 32.25 31 3 9 1 11 12 13 14 15 16 17 Output Power per tone (m) Min Avg Max Std Dev Page 2 of 6

17.24. GHz GaAs MMIC May 25 Rev 5May5 Mechanical Drawing.467 (.18).866 (.34) 1.267 (.5) 1.867 (.74) 2.5 (.99) 2 3 4 5 6 2.184 (.86) 1.791 (.71) 1. 13 12 11 1 9 8 7..467 (.18).866 (.34) 1.267 (.5) 1.867 (.74) 2.967 (.117) 3.368 (.133) (Note: Engineering designator is 21PAMP_5B) 3.167 (.125) 3.56 (.14) Bias Arrangement Units: millimeters (inches) Bond pad dimensions are shown to center of bond pad. Thickness:.11 +/.1 (.3 +/.4), Backside is ground, Bond Pad/Backside Metallization: Gold All Bond Pads are.1 x.1 (.4 x.4). Bond pad centers are approximately.19 (.4) from the edge of the chip. Dicing tolerance: +/.5 (+/.2). Approximate weight: 5.524 mg. Bond Pad #1 (RF In) Bond Pad #2 (Vg1) Bond Pad #3 (Vd1) Bond Pad #4 (Vg2) Vg1,2 Bond Pad #5 (Vd2) Bond Pad #6 () Bond Pad #7 (V2 Out) Vd1,2 Bond Pad #8 (Vd5) Bond Pad #9 (V1 Out) Bond Pad #1 (Vd4) Bond Pad #11 (Vg4) Bond Pad #12 (Vd3) Bond Pad #13 (Vg3) Bypass Capacitors See App Note [3] Vd1,2 Vg1,2 2 3 4 5 6 RF In 1 RF In X V2 Out Vg3,4 13 12 11 1 Vd3,4 9 8 7 Vd5 V1 Out Page 3 of 6 V2 Out Vd5 Rd V1 Out Vg3,4 Vd3,4

17.24. GHz GaAs MMIC May 25 Rev 5May5 Detector Curves Typical Detector Characteristic (LOG) Typical Detector Characteristic Detector Diff. Output, V.35.3.25.2.15.1.5. 12 13 14 15 16 17 18 19 2 21 22 23 Total Output Power, m 2 tones each at 3 below total output Detector Diff. Output, V 1..1.1.1 12 13 14 15 16 17 18 19 2 21 22 23 Total Output Power, m 2 tones each at 3 below total output App Note [1] Biasing As shown in the bonding diagram, it is recommended to separately bias the upper and lower amplifiers at Vd(1+2)=5.5V Id(1+2)=215mA, and Vd(3+4)=5.5V Id(3+4)=215mA, although best performance will result in separately biasing Vd1 through Vd4, with Id1=Id3=71mA, Id2=Id4=144mA. It is also recommended to use active biasing to keep the currents constant as the RF power and temperature vary; this gives the most reproducible results. Depending on the supply voltage available and the power dissipation constraints, the bias circuit may be a single transistor or a low power operational amplifier, with a low value resistor in series with the drain supply used to sense the current. The gate of the phemt is controlled to maintain correct drain current and thus drain voltage. The typical gate voltage needed to do this is.5v. Typically the gate is protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is available before applying the positive drain supply. App Note [2] Onboard Detector The output signal of the power amplifier is coupled via a 15 directional coupler to a detector, which comprises a diode connected to the signal path, and a second diode used to provide a temperature compensation signal. The common bias terminal is Vd5, and is nominally set to forward bias both diodes. The bias is normally provided in 1 of 2 ways. The Vd5 port can be connected directly to a 1V bias, and given the internal series resistance, results in about 1mA of bias current. Alternatively, Vd5 can be tied to the same voltage as Vd1Vd4 through an external series resistor Rd in the range 3 6kΩ. App Note [3] Bias Arrangement For Parallel Stage Bias (Recommended for general applications) The same as Individual Stage Bias but all the drain or gate pad DC bypass capacitors (~12 pf) can be combined. Additional DC bypass capacitance (~.1 uf) is also recommended to all DC or combination (if gate or drains are tied together) of DC bias pads. For Individual Stage Bias (Recommended for Saturated Applications) Each DC pad (Vd1,2,3,4 and Vg1,2,3,4)needs to have DC bypass capacitance (~12 pf) as close to the device as possible. Additional DC bypass capacitance (~.1 uf) is also recommended. MTTF Table These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry. Backplate Temperature Channel Temperature Rth MTTF Hours FITs 55 deg Celsius 127 deg Celsius 9.11E+8 1.7E+ 75 deg Celsius 147 deg Celsius 3.1 C/W 1.3E+8 9.71E+ 95 deg Celsius 167 deg Celsius 1.42E+7 7.4E+1 Bias Conditions: Vd1=Vd2=Vd3=Vd4=5.5V, Id1=Id3=71 ma, Id2=Id4=144 ma Page 4 of 6

17.24. GHz GaAs MMIC May 25 Rev 5May5 Device Schematic Vd2 R=6. Vg1 Vd1 R=1. R=6. Vg2 R=5. R=5. RF In R=5. R=5. R=6. Vg3 R=6. R=1. Vd3 Vg4 R=5. Vd4 R=1K R=2. Vout1 R=1K Vout2 R=5. R=2. Typical Application R=15. Vd5 XU1 XB14 X IF IN 2 GHz WG Sideband Reject 17.719.7 GHz LO(+12m) 15.717.7 GHz (USB Operation) 19.721.7 GHz (LSB Operation) OnChip Temp Comp Detector Mimix Broadband MMICbased 17.24. GHz Transmitter Block Diagram (Changing LO and IF frequencies as required allows design to operate as high as 24 GHz) Page 5 of 6

17.24. GHz GaAs MMIC May 25 Rev 5May5 Handling and Assembly Information CAUTION! Mimix Broadband MMIC Products contain gallium arsenide (GaAs) which can be hazardous to the human body and the environment. For safety, observe the following procedures: Do not ingest. Do not alter the form of this product into a gas, powder, or liquid through burning, crushing, or chemical processing as these byproducts are dangerous to the human body if inhaled, ingested, or swallowed. Observe government laws and company regulations when discarding this product. This product must be discarded in accordance with methods specified by applicable hazardous waste procedures. Life Support Policy Mimix Broadband's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President and General Counsel of Mimix Broadband. As used herein: (1) Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. (2) A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ESD Gallium Arsenide (GaAs) devices are susceptible to electrostatic and mechanical damage. Die are supplied in antistatic containers, which should be opened in cleanroom conditions at an appropriately grounded antistatic workstation. Devices need careful handling using correctly designed collets, vacuum pickups or, with care, sharp tweezers. Die Attachment GaAs Products from Mimix Broadband are.1 mm (.4") thick and have vias through to the backside to enable grounding to the circuit. Microstrip substrates should be brought as close to the die as possible. The mounting surface should be clean and flat. If using conductive epoxy, recommended epoxies are Ablestick 841LMI or 841LMIT cured in a nitrogen atmosphere per manufacturer's cure schedule. Apply epoxy sparingly to avoid getting any on to the top surface of the die. An epoxy fillet should be visible around the total die periphery. If eutectic mounting is preferred, then a fluxless goldtin (AuSn) preform, approximately.12 thick, placed between the die and the attachment surface should be used. A die bonder that utilizes a heated collet and provides scrubbing action to ensure total wetting to prevent void formation in a nitrogen atmosphere is recommended. The goldtin eutectic (8% Au 2% Sn) has a melting point of approximately 28 C (Note: Gold Germanium should be avoided). The work station temperature should be 31 C + 1 C. Exposure to these extreme temperatures should be kept to minimum. The collet should be heated, and the die preheated to avoid excessive thermal shock. Avoidance of air bridges and force impact are critical during placement. Wire Bonding Windows in the surface passivation above the bond pads are provided to allow wire bonding to the die's gold bond pads. The recommended wire bonding procedure uses.76 mm x.13 mm (.3" x.5") 99.99% pure gold ribbon with.52% elongation to minimize RF port bond inductance. Gold.25 mm (.1") diameter wedge or ball bonds are acceptable for DC Bias connections. Aluminum wire should be avoided. Thermocompression bonding is recommended though thermosonic bonding may be used providing the ultrasonic content of the bond is minimized. Bond force, time and ultrasonics are all critical parameters. Bonds should be made from the bond pads on the die to the package or substrate. All bonds should be as short as possible. Page 6 of 6