A LDO PRIMER Part I: A REVIEW ON PASS ELEMENT

A LDO PRIMER Part I: A REVIEW ON PASS ELEMENT Qi Deng Senior Product Marketing Engineer, Analog and Interface Products Division Microchip Technology Inc. A Low Drop Out regulator (LDO) is a linear regulator specifically designed to minimize the dropout voltage, which is defined as the minimum inputtooutput voltage differential required for the linear regulator to sustain a regulated output voltage. A generic linear regulator consists of three key elements: A pass element, which is a transistor or a combination of transistors that operates in the linear/saturation region to produce a regulated output voltage. The dropout voltage of a linear regulator is directly related to the structure and characteristics of the pass element. The dropout voltage is achieved when the pass element operates in the saturation region. In this article, we focus exclusively on the pass element. A bandgap voltage reference, which provides a high precision reference voltage. An error amplifier, which amplifies a fraction of the output voltage against the bandgap voltage reference to control the pass element. The evolution of the linear regulator started when bipolar processing technology, of which the NPN transistor and PNP transistor are the fundamental building blocks, was first used for semiconductor IC manufacturing. The standard NPN regulator (Figure 1) was the first successful linear regulator based upon the bipolar processing technology. It uses a combination of transistors: a PNP base current driver transistor () and a NPN Darlington transistor pair (Q2 and Q3), as the pass element, and its dropout voltage is given as: V DROP = V SAT () V BE (Q2) V BE (Q3), where V SAT () is the saturation voltage across the collector and the emitter (V CE ) of the PNP based current driver transistor, and V BE (Q2) and V BE (Q3) are the voltages across the base and the emitter of the NPN transistors that form the Darlington pair. (1) Q3 Q2 V Figure 1 Standard NPN Regulator The dropout voltage, V DROP, can vary among different processes, with a typical value between 1.8V and 2.4V. The standard NPN regulator has several advantages intrinsic to its architecture: It has very steady ground pin current. The ground pin current is roughly equal to the base current of the PNP transistor,, which is basically the load current divided by the gain of the pass element. Since the NPN Darlington pair has very high gain, when the load current

changes, the ground pin current does not change significantly. The ground pin current has a typical value of several miliampere (ma). It is unconditionally stable without an output capacitor. The standard NPN regulator resembles a common collector configuration with very low output impedance, which makes it very stable without any external compensation during regulation. This means it does not need an output capacitor of any kind. The standard NPN regulator is a good choice for ACpowered applications where the inputtooutput voltage differential is more than 3V, or for applications where the input voltage is relatively high. However, its rather high dropout voltage makes it undesirable in many of the modern embedded applications. The NPN pass transistor regulator (Figure 2), partially solves the high dropout voltage problem associated with the standard NPN regulator. As its name implies, the NPN pass transistor regulator uses the combination of a PNP base current driver transistor () and a single NPN power transistor (Q2), as the pass element. Its dropout voltage is given as: V DROP = V SAT () V BE (Q2) (2) Comparing Equation (1) and Equation (2), we can see that the dropout voltage of the NPN pass transistor regulator is a full V BE lower than that of the standard NPN regulator, with a typical value between 1V and 1.5V. Q2 V Figure 2 NPN Pass Transistor Regulator The NPN pass transistor regulator has the following characteristics intrinsic to its architecture: It has relatively steady ground pin current because of the high gain of the NPN pass transistor (although not as steady as the standard NPN regulator), with a typical value of several miliampere (ma). It is also in a common collector configuration with low output impedance. However, since the base of the NPN transistor is driven by the PNP base current transistor with rather high impedance, the overall output impedance of the NPN pass transistor regulator is higher than that of the standard NPN regulator. As a result, it requires an output capacitor to sustain a stable operation, although the value of the capacitor does not need to be high, and the operation stability is not sensitive to the capacitor s ESR (Equivalent Series Resistance). The NPN pass transistor regulator is widely used in embedded applications because of its good balance of relatively low dropout voltage and easeofuse. However, in applications powered by batteries with tighter voltage differential budget, an even lower dropout voltage is desirable. This brings out the PNP pass transistor regulator (Figure 3), a true LDO that uses a PNP transistor as the pass element. Its dropout voltage is simply given as: V DROP = V SAT () (3)

Comparing Equations (2) and (3), we can see that the dropout voltage of the PNP pass transistor regulator is another full V BE lower than that of the NPN pass transistor regulator, with a typical value between 0.1V and 0.7V. V Figure 3 PNP Pass Transistor Regulator Since the PNP pass transistor regulator offers the best dropout voltage among the three bipolar technology based linear regulators, it is the only conceivable choice among the three for modern batterypowered embedded applications. However, compared with the standard NPN regulator and the NPN pass transistor regulator, the PNP pass transistor regulator has certain distinctive disadvantages: It has unsteady ground pin current because of the relatively low gain of the PNP transistor. The ground pin current is directly related to the load current, and when the load current is high, the ground pin current is high as well. For example, when the load current is 1A and above, its ground pin current can be up to 10mA. Typically, the ground pin current is of several miliampere (ma) in value. It is intrinsically unstable without an output capacitor. The PNP transistor is in a common emitter configuration, which has high output impedance. Therefore, the PNP pass transistor regulator s operation is only stable with external compensation a carefully selected output capacitor with certain range of. While the PNP pass transistor regulator can be made stable through a careful selection of an output capacitor, its relatively high ground pin current cannot be avoided. This makes it unattractive for a special class of batterypowered embedded applications that requires long battery life portable consumer electronics, such as mobile phones, audio/video players, and game consoles, etc. Although the high ground pin current problem associated with the PNP pass transistor regulator is intrinsic to the bipolar processing technology, it can be easily solved if the regulator is constructed on CMOS processing technology, in which case the PNP transistor is replaced by a Pchannel FET, hence the name the Pchannel FET regulator (Figure 4). V Figure 4 Pchannel FET Regulator

The CMOS processing technology uses Nchannel FET and Pchannel FET, counterparts to the NPN transistor and PNP transistor in bipolar processing technology, respectively, as basic building blocks of functional circuits. One of the fundamental differences between a bipolar transistor and a CMOS FET is that, a bipolar transistor s emitter/collector current is proportional (or linear) to its base current, while a CMOS FET s drain/source current is related to its gate voltage. This is the reason why the ground pin current of the Pchannel FET regulator can be several orders of magnitude lower than that of the PNP pass transistor regulator. The PNP transistor s collector current is proportional to its base current and is given as: I C = I B, Where I C is the collector current, I B is the base current, and is the gain of the PNP transistor. (4) The gain,, can be as low as being in the 10 s. This means the ground pin current of the PNP pass transistor regulator (essentially the PNP transistor s base current, I B ), can be a significant fraction of the output current (essentially the PNP transistor s collector current, I C ). For example, in a PNP pass transistor regulator with 1A output current, the ground pin current can be up to 10mA. However, in a typical Pchannel FET construction, the gate impedance is very high, sometimes in hundred thousands of ohms ( ) or higher, which makes the gate current extremely low. Since the gate current in a Pchannel FET regulator no longer contributes to its total ground pin current, as a result, the ground pin current can be extremely low. For example, the ground pin current of a 1A output current Pchannel FET regulator can be as low as 100 A, 2 to 4 orders of magnitude lower than that of the PNP pass transistor regulator. The Pchannel FET regulator s dropout voltage is given as: V DROP = R DS(ON) () x I, where R DS(ON) () is the draintosource resistance of the Pchannel FET when it is fully on, and I is the output current to the resistive load. (5) The dropout voltage can be very low because the R DS(ON) can be easily adjusted to a very low value by scaling the size of the Pchannel FET. This also means that for a given dropout voltage, the Pchannel regulator is capable of outputting higher current than the PNP transistor pass regulator. The Pchannel regulator has the following characteristics: Its ground pin current is very low. As it has been explained, with the same dropout voltage and load current, its ground pin current can be 2 to 4 orders of magnitude lower than that of the PNP pass transistor regulator. It is intrinsically unstable without an output capacitor. Like the PNP pass transistor regulator, the Pchannel regulator is also intrinsically unstable because of the Pchannel FET s relatively high gate capacitance. Its stable operation requires external compensation again, a carefully selected output capacitor with certain range of. The Pchannel FET regulator s advantages, both low dropout voltage and low ground pin current, make it an excellent choice for batterypowered embedded applications that require long battery life. Indeed, the most popular LDO in today s portable consumer electronics devices, such as mobile phones, video/audio players, and game consoles, etc., is the Pchannel FET regulator. The last member of the linear regulator family is a CMOS processing technology based regulator with a Nchannel FET as the pass element: the Nchannel FET regulator (Figure 5). The N channel FET regulator s dropout voltage is given as:

V DROP = R DS(ON) () x I, where R DS(ON) () is the draintosource resistance of the Nchannel FET when it is fully on, and I is the output current to the resistive load. (6) As such, its dropout voltage can be just as low as the Pchannel FET regulator. Also, its ground pin current can be low for the same reason as the Pchannel FET regulator. Unlike in the Pchannel FET regulator though, the gate bias voltage of the Nchannel FET which needs to be above a certain threshold level for the FET to operate in the linear and saturation regions is not setup automatically by the input voltage, V IN (Figure 5). As a result, an extra circuit is needed to establish the gate bias voltage. This extra circuit, typically a charge pump, is used to multiply the input voltage (V IN ) to a higher level needed as the positive rail of the error amplifier, which in turn produces the desired gate bias voltage for the Nchannel FET. Therefore, the Nchannel FET regulator does require more complex circuit design than the P channel FET regulator, resulting in more silicon and higher cost. V Charge Pump Figure 5 Nchannel FET Regulator However, one advantage of the Nchannel FET regulator is that, for the same load current, the size of a Nchannel FET is up to 50% smaller than that of a Pchannel FET, which could result in less silicon and lower cost. When the load current is high, such as 2A and above, in which case a large FET is required, this silicon and cost reduction of a Nchannel FET could be significant enough to offset the extra silicon and cost associated with its more complex circuit design. Therefore, the Nchannel FET regulator is desirable in applications that require low dropout voltage, low ground pin current, and high load current. Of course, because of its relatively complex design, it is less used compared to the Pchannel FET regulator. Regulator Type Standard NPN (Darlington) NPN Pass Transistor PNP Pass Transistor Pchannel FET Nchannel FET Dropout Voltage 2V BE V SAT, 1.5V 2.5V typical V BE V SAT, 1.0V 1.5V typical V SAT, 0.1V 0.7V typical R DS(ON) x I, 0.05V 0.7V typical R DS(ON) x I, 0.05V 0.7V typical Ground Pin Current Steady, 5mA typical Relatively steady, 5mA typical Unsteady, 5mA typical Very low Very low Output Current High High Medium Medium High Operation Stability Intrinsically stable Need output capacitor Need output capacitor Need output capacitor Need output capacitor Output Capacitor Not needed Small capacitance, insensitive to ESR Applications AC powered with 3V and above voltage differential Embedded applications Battery powered applications Battery powered applications that require long battery life High current applications that require better efficiency. Microchip offers a broad range of Pchannel FET regulators with load current ranging between 50mA and 1000mA. For more information on Microchip s linear regulator products, please visit http://www.microchip.com/paramchartsearch/chart.aspx?branchid=9004&mid=11&lang=en&pag eid=79.