INTEGRTED CIRCUITS 3.3V Parallel printer interface traceiver/buffer 1995 Nov 10 IC4 Low Voltage Handbook
FETURES synchronous operation 4-Bit traceivers 3 additional buffer/driver lines TTL compatible inputs ESD protection exceeds 1000V per MIL STD 883 Method 3015 and 00V per Machine Model Input Hysteresis Low Noise Operation Center Pin & IEEE 184 Compliant Level 1 & Overvoltage Protection on B side DESCRIPTION The parallel interface chip is designed to provide an asynchronous, 4-bit, bi-directional, parallel printer interface for personal computers. Three additional lines are included to provide handshaking signals between the host and the peripheral. The part is designed to match IEEE 184 standard. The 4 traceiver pi (/B 1-4) allow data tramission from the bus to the B bus, or from the B bus to the bus, depending on the state of the direction pin DIR. The B bus and the Y5-Y7 lines have totem pole or open drain style outputs depending on the state of the high drive enable pin HD. The bus only has totem pole style outputs. ll inputs are TTL compatible with at least 300mV of input hysteresis at = 3.3V. QUICK REFERENCE DT SYMBOL PRMETER CONDITIONS T amb = 5 C; = 0V TYPICL UNIT R D B/Y Side output resistance = 3.3V; V O = 1.65V 0.V (See Figure ) 45 Ω SR B/Y Side slew rate R L = 6Ω; C L = 50pF (See Waveform 4) 0. V/ I CC Total static current V I = /; I O = 0 5 µ V HYS Input hysteresis = 3.3V 0.4 V t PLH /t PHL B/Y Propagation delay to the B/Y side outputs = 3.3V 1.6/1.4 ORDERING INFORMTION PCKGES TEMPERTURE RNGE ORDER CODE DRWING NUMBER 0-pin plastic SO 0 C to +70 C 7LVC184 D SOT163-1 0-pin plastic SSOP Type II 0 C to +70 C DB SOT339-1 0-pin plastic TSSOP Type I 0 C to +70 C PW SOT360-1 PIN CONFIGURTION LOGIC SYMBOL 1 1 0 19 B1 B 1 B B1 3 4 3 4 18 17 B3 B4 B B 5 6 16 15 3 B B3 5 6 7 8 14 13 Y5 Y6 4 B B4 7 DIR 9 1 10 11 Y7 HD 5 Y Y5 SK00001 6 Y Y6 7 Y Y7 DIR HD SK00009 1995 Nov 10 853-1819 16000
PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1,,3,4 1-4 Data inputs/outputs 0,19,18,17 B1 - B4 IEEE 184 Std. outputs/inputs 7,8,9 5-7 Data inputs 14,13,1 Y5 - Y7 IEEE 184 Std. outputs 10 DIR Direction selection 11 HD B/Y side high drive enable/disable 5,6 Ground (0V) 15,16 Positive supply voltage FUNCTION TBLE INPUTS OUTPUTS INPUTS/OUTPUTS DIR HD 5-7 Y5-7 1-4 B1-4 L L L L = B Inputs L L H Z = B Inputs L H L L = B Inputs L H H H = B Inputs H L L L Inputs Low Outputs Low H L H Z Inputs High Outputs Z H H L L Inputs B = H H H H Inputs B = H = High Voltage L = Low Voltage Z = High Impedance, Off-State BSOLUTE MXIMUM RTINGS 1, SYMBOL PRMETER CONDITIONS RTING UNIT ESD Immunity, per Mil Std 883C method 3015 kv DC supply voltage 0.5 to +4.6 V I IK DC input diode current V I < 0 0 m I OK DC output diode current V O < 0 50 m V IN DC input voltage 3 0.5 to +5.5 V V OUT B/Y DC DC output voltage on B/Y side 3 0.5 to +5.5 V V OUT B/Y (tr) Traient output voltage on B/Y side 4 40 traient to +7 V V OUT side DC output voltage on side 0.5 to +0.5 V I O DC output current Outputs in High or Low state 50 m T stg Storage temperature range 60 to +150 C I CC /I Continuous current through or 00 m NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability.. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 4. V OUT B/Y (tr) guarantees only that this part will not be damaged by reflectio in application so long as the voltage levels remain in the specified range. RECOMMENDED OPERTING CONDITIONS SYMBOL PRMETER LIMITS MIN MX UNIT DC supply voltage 3.0 3.6 V V I Input voltage 0 V V OUT B/Y output voltage 0.5 5.5 V V OUT side output voltage 0 V I OH B/Y side output current High 14 m I OL B/Y side output current Low 14 m T amb Operating free-air temperature range 0 +70 C 1995 Nov 10 3
DC ELECTRICL CHRCTERISTICS LIMITS SYMBOL PRMETER TEST CONDITIONS T amb = 5 C T amb = 0 C to +70 C UNIT V OH High-level output voltage n MIN TYP MX MIN MX = Min to Max; I OH = 50µ 0. 0. V = 3.0V; I OH = 4m.4.4 V Bn or Yn = 3.0V; I OH = 14m..4.1 V = Min to Max; I OL = 50µ; 0. 0. V Low-level n V I = V IL or V IH V OL output voltage = 3.0V; I OL = 4m; V I = V IL or V IH 0.4 0.4 V Bn or Yn = 3.0V; I OL = 14m; V I = V IL or V IH 0.8 0.9 V V IH High-level input voltage = Min to Max 0.8 0.8 V IL Low-level input voltage = Min to Max.0.0 V HYS Input Hysteresis = 3.3V 0.4 0.3 V R D B/Y side Output Impedance See Figure 38 45 53 35 55 Ω I I I IHZ /I ILZ I OFF I OZH I OZL Input leakage current (5-7 DIR, HD) Input current for common I/O pi B/Y Side Power-off leakage current 3-State output High current Yn 3-State output Low current Yn = 3.6V; V O = or ; Not for I/O pi ±1.0 ± µ = 3.6V;V I = 5.5V or 0.1 15 µ = 0.0V; V O = 0 to 5.5V ±10 ±100 µ = 3.6V; V O = ; V I = V IL or V IH 5 0 µ = 3.6V; V O = ; V I = V IL or V IH 5 0 µ I IH +I OZH current (1 4, Bn) = 3.6V; V I/O = 5 5 µ I IL +I OZL current (1 4, Bn) = 3.6V; V I/O = 5 5 µ I CC Quiescent Supply Current C CHRCTERISTICS = 0V, t R = t F = 3.0, C L = 50pF, R L = 500Ω SYMBOL PRMETER WVEFORM = 3.6V; I O = 0; V I = or 5 10 50 µ T amb = 5 C = 3.3V LIMITS T amb = 0 to + 70 C = Min to Max MIN TYP MX MIN MX SR B-Side Slew Rate 4 0.05 0. 0.35 0.05 0.4 V/ t PLH t PHL t PLH t PHL t PZH t PHZ t PZL t PLZ t PZH t PZL t PHZ t PLZ t PZH t PZL t PHZ t PLZ Propagation delay toy or to B Propagation delay B to Output enable/disable time to/from High level HD to Y or HD to B Output enable/disable time to/from Low level to Y or to B Output enable time from DIR to B Output disable time from DIR to B Output enable time from DIR to Output disable from DIR to 5 1 6.0 6.0 4.0.0 8.0 8.0 6.0 3.5 4.0.5.5 1.6 1.4 5.5 5.6 1.0 6.5 1.7 1.3 1.7 8.9 9.1 6.9 8.6 3.7 3.7 18.0 18.0 7.9 7.6 16.0 9.1 16.3 7.1 18.0 18.0 1.0 13.0 14.0 5.5 4.0.0 4.0 4.0.0.0 3.0 3.0.0.0 19.5 0.0 9.5 9.0 0.0 11.0 0.0 9.0 0.0 0.0 14.5 14.0 14.5 16.0 6.0 5.5 UNIT 1995 Nov 10 4
C WVEFORMS = V V X = V OL 0.3V V Y = V OH 0.3V V OL and V OH are the typical output voltage drops that occur with the output load. ( never goes below 3.0V). V =.7V.4V INPUTS INPUT 1.4V 1.4V 0.4V V OH t PHL t PLH t PLH tphl V OUT OUTPUTS OUTPUT 1.4V V OUT 1.4V V OL Waveform 1. SY00001 Input Bn to output n propagation delays Waveform 3. SY00008 Voltage Waveforms Propagation Delay Times ( To B) Measured at Output Pin DIR to.4v t PLZ t PZL INPUT 0.4V DIR to B OUTPUT 0.9V 0.4V.4V 1.9V HD to B t1 t t1 t SY00007 OUTPUT LOW-to-OFF OFF-to-LOW V OL V OH OUTPUT HIGH-to-OFF OFF-to-HIGH outputs enabled t PHZ V X V Y outputs disabled t PZH outputs enabled Waveform 4. Slew Rate Waveforms Voltage Waveforms (Input pulse rise and fall time are 3, 150 pulse width 10 µs, for both a Low to High and a High to Low traition.) Slew Rate measured between 0.4V and 0.9V - rising. Slew Rate measured between.4v and 1.9V - falling. Slew Rate measured at TP1. SY0000 Waveform. 3-State enable and disable times 1995 Nov 10 5
PULSE GENERTOR V IN V OUT D.U.T. R T Test Circuit for B n or Y n Outputs 50pF S 1 R L = 500Ω t PLH / PHL = 6Ω for SR test SWITCH POSITION Bn or Yn Outputs TEST SWITCH t PLH t PHL PULSE GENERTOR DEFINITIONS C L = R L = V IN R T D.U.T V OUT Test Circuit for n Outputs Load capacitance includes jig and probe capacitance; see C CHRCTERISTICS for value. Load resistor; see C CHRCTERISTICS for value. R T = Termination resistance should be equal to Z OUT of pulse generators. C L R L 90% NEGTIVE PULSE POSITIVE PULSE 10% FMILY 74LVC 10% t THL (t f ) t TLH (t r ) 90% t W t W 10% 90% = V Input Pulse Definition 90% t THL (t f ) t TLH (t r ) 10% INPUT PULSE REQUIREMENTS MP (V) 0V MP (V) mplitude Rep. Rate t W t r t f 3.0V 1MHz 500 3 3 0V Waveform 5. SY00004 PULSE GENERTOR V I R T D.U.T. V O C L 50pF S 1 500Ω 500Ω x Open TEST CIRCUIT D.U.T. I O / Test S 1 V I t PLH /t PHL Open.7V t PLZ /t PZL x.7v 3.6V.7V t PHZ /t PZH SY00003 Figure 1. Load Circuitry for Bn to n Switching Times I O is measured by forcing / on the output. RD can then be calculated using the equation RD = / I O. SY00005 Figure. Output Impedance RD 1995 Nov 10 6
SO0: plastic small outline package; 0 leads; body width 7.5 mm SOT163-1 1995 Nov 10 7
SSOP0: plastic shrink small outline package; 0 leads; body width 5.3 mm SOT339-1 1995 Nov 10 8
TSSOP0: plastic thin shrink small outline package; 0 leads; body width 4.4 mm SOT360-1 1995 Nov 10 9
Data sheet status Data sheet status Product status Definition [1] Objective specification Preliminary specification Product specification Development Qualification Production This data sheet contai the design target or goal specificatio for product development. Specification may change in any manner without notice. This data sheet contai preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contai final specificatio. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please coult the most recently issued datasheet before initiating or completing a design. Definitio Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the bsolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditio above those given in the Characteristics sectio of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. pplication information pplicatio that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applicatio will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applicatio do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no respoibility or liability for the use of any of these products, conveys no licee or title under any patent, copyright, or mask work right to these products, and makes no representatio or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East rques venue P.O. Box 3409 Sunnyvale, California 94088 3409 Telephone 800-34-7381 Copyright Philips Electronics North merica Corporation 1998 ll rights reserved. Printed in U.S.. print code Date of release: 05-96 Document order number: 9397-750-0453 yyyy mmm dd 10