Real-Time Software Receiver Using Massively Parallel Processors for GPS Adaptive Antenna Array Processing Jiwon Seo, David De Lorenzo, Sherman Lo, Per Enge, Stanford University Yu-Hsuan Chen, National Cheng Kung University, Taiwan Dennis Akos, University of Colorado, Boulder ION ITM 2011 26 January 2011 The authors gratefully acknowledge the support of the Federal Aviation Administration.
Motivation Synchronize time between GBTs under GPS interference? (Stanford s effort) GPS jammers Ground Based Transceivers (GBTs) for FAA s Alternate Position Navigation and Timing (APNT) 2
Our Previous Work WAAS geostationary satellite (L5 signal) Adaptive GPS antenna array for robust time synchronization Direct beam to a satellite (1 tracked SV is enough for time transfer) Null to jammers Antenna array [Whelan and Enge, ION GNSS 2010] [Chen et al., ION GNSS 2010] 3
Current Work GPS L5 signals 12 direct beams for all-in-view GPS satellites Real-time software receiver with expanded capabilities Null to jammers 12 direct beams 40 Msps (20 Msps I & Q) 14-bit resolution data Possible aviation application: Protecting GBAS ground facility 4
Receiver Architecture: Initial Phase Alignment Adaptive beamsteering software receiver RF/IF & A/D RF/IF & A/D Algorithm Algorithm Weight Control Algorithm Algorithm Algorithm Carrier Wipeoff Code Wipeoff Tracking Loops RF/IF & A/D RF/IF & A/D Carrier NCO Code NCO Array Steering Vector T W init W init e e e 1 j 2 j 3 j 4 - Tracks 4 antennas independently and calibrates phase differences - Assigns synthesized data to a main tracking channel for beamsteering [De Lorenzo et al., ION GNSS 2010] 5
Receiver Architecture: Adaptive Beamsteering Adaptive beamsteering software receiver RF/IF & A/D RF/IF & A/D Algorithm Algorithm Weight Control Algorithm Algorithm Algorithm Carrier Wipeoff Code Wipeoff Tracking Loops RF/IF & A/D RF/IF & A/D Carrier NCO Code NCO Φn W W MVDR Adaptive Array Processing n T EX X T Φ W W n W n MVDR (Minimum Variance Distortionless Response) - Signal covariance should be calculated n1 n n [De Lorenzo et al., ION GNSS 2010] 6
Computational Cost Single-antenna L1 receiver 4-antenna adaptive beamsteering L5 receiver Sampling rate Number of channels Synthesis of 4-antenna data Covariance calculation Sample resolution 4 Msps x 10 40 Msps 12 x 5 60 T: Computational cost for 12-channel L1 software receiver 50 T 100 T None Beamforming Correlation cost 1.7 T x 12 beams = 20 T None Adaptive processing 15 T 2 bits No Dynamic bit-wise range parallelism 14 bits for anti-jamming (About twice faster [Ledvina et al., 2003]) 7
Objective & Challenges Objective: Real-time 4-antenna adaptive beamsteering L5 software receiver (85 of integer-correlation L1 receivers; 135 of bit-wise-parallel-correlation L1 receivers) Don t: Have hardware support such as FPGA or ASIC Do: Use a desktop computer with commercial-off-the-shelf off processors Desktop Parallel Processing 8
Desktop Parallel Processors Commercial-off-the-shelf desktop parallel processors CPU (Central Processing Unit) GPU (Graphics Processing Unit) Intel Core i7 950 NVIDIA GeForce GTX 480 ($300) ($500) 4 cores 480 cores 9
Hardware Setup Raw IF data collection setup (4 sets) Gigabit Ethernet 14-bit, 40 Msps Trimble Antenna USRP2 (Universal Solid State t Disk Software Radio Peripheral) in a Linux box Demonstrate t real-time computational ti capability for L5 processing 4-antenna, 14-bit, 40 Msps (20 Msps I & Q), L1 data 10
GPU-Based Parallel Correlator global memory, gmem (green) 768 samples 1 ms raw IF in-phase data (20000 samples) 1) Data copy & synthesis (1 block handles 768 samples) 768 X sine & cosine tables shared memory, smem (yellow) 2) Carrier wipe off 3 X 768 265 threads in 1 block 3) Code wipe off (1 thread handles 3 samples) 3 code replica 1 256 4) Reallocation of smem for parallel reduction 1 5) Accumulation by parallel reduction in smem 6) Atomic addition of accumulated values from 27 blocks in gmem (27 blocks handle 1 tracking channel) 11
Timing Diagram of Initial Design 1 ms Data Input Massively parallel computation in GPU (CUDA C) Data move to GPU Synthesis & Correlation 0.2 ms 0.6 ms Parallel computation in CPU (C/C++) Time Covariance 0.3 ms Limit for real time Tracking, etc 0.2 ms 12
Hardware Parallelism CPU GPU computation engine GPU copy engine Tracking, etc Synthesis & Correlation Data move to GPU 0.6 ms Covariance 0.3 ms Limit for real time t 01 2 Time Buffer 1 Buffer 2 13
Load Balancing Between CPU & GPU CPU Covariance GPU computation engine Synthesis & Correlation GPU copy engine Data move to GPU 0.6 ms Tracking, etc 0.2 ms Limit for real time Time 14
Anti-Jamming Capability Tracking without beamsteering 5 tracking channels for 1 satellite 8 satellites in view Beamsteering channel (same as 1st antenna channel) 4 channels tracking 4 antennas independently (for real-time phase calibration; Calibration data are stored as a lookup table) 15
Anti-Jamming Capability Tracking with adaptive beamsteering 6 db 8 satellites in view About 6 db C/N 0 enhancement in beamsteering channel (benefit from a direct beam) C/N 0 enhancement for all satellites (synthesized IF data 12 times with 12 different weight vectors to make 12 direct beams) 16
Anti-Jamming Capability Simulated CDMA jamming in the direction of PRN 10 (40 db J/S, PRN 168 as CDMA jammer) Tracking under simulated CDMA jammer PRN 10 is completely lost Most single antenna channels are lost (Calibration data is already stored as a table by the real-time calibration scheme; Satellite ground tracks repeat) 17
Anti-Jamming Capability Simulated CDMA jamming in the direction of PRN 10 (40 db J/S, PRN 168 as CDMA jammer) Tracking under simulated CDMA jammer Beamsteering channels are still tracking! Some single antenna channels are good, but lower C/N 0 Single antenna channels of PRN 25 track the jammer! 18
Real-Time Receiver Demo (Recorded) 19
Real-Time Receiver Demo (Recorded) 20
Summary Objective: - Real-time, 4-antenna, all-in-view, adaptive beamsteering GPS software receiver capable of L5 signal processing and running on a desktop computer Results: - Developed an optimized parallel computation architecture for the beamsteering receiver on cost-efficient CPU & GPU - Confirmed real-time computational capability and anti-jamming performance under a synthetic CDMA jammer - Demonstrated that cost-efficient commercial-off-the-shelf hardware and processors would be enough to implement an adaptive beamsteering GPS receiver END 21