00-mA Low-Dropout Regulator TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 Available in.2-v,.5-v,.8-v, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5-V Fixed-Output and Adjustable Versions Only 7 µa Quiescent Current at 00 ma µa Quiescent Current in Standby Mode Dropout Voltage Typically 7 mv at 00mA Over Current Limitation 40 C to 25 C Operating Junction Temperature Range 5-Pin SOT-23 (DBV) Package description The TPS769xx family of low-dropout (LDO) voltage regulators offers the benefits of low dropout voltage, ultralow-power operation, and miniaturized packaging. These regulators feature low dropout voltages and ultralow quiescent current compared to conventional LDO regulators. Offered in a 5-terminal small outline integrated-circuit SOT-23 package, the TPS769xx series devices are ideal for micropower operations and where board space is at a premium. Ground Current µ A A combination of new circuit design and process 6 innovation has enabled the usual PNP pass transistor to be replaced by a PMOS pass 5 element. Because the PMOS pass element 60 40 20 0 20 40 60 80 00 20 40 behaves as a low-value resistor, the dropout TA Free-Air Temperature C voltage is very low, typically 7 mv at 00 ma of load current (TPS76950), and is directly proportional to the load current. Since the PMOS pass element is a voltage-driven device, the quiescent current is ultralow (28 µa maximum) and is stable over the entire range of output load current (0 ma to 00 ma). Intended for use in portable systems such as laptops and cellular phones, the ultralow-dropout voltage feature and ultralow-power operation result in a significant increase in system battery operating life. The TPS769xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to µa typical at T J = 25 C. The TPS769xx is offered in.2-v,.5-v,.8-v, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5-V fixed-voltage versions and in a variable version (programmable over the range of.2 V to 5.5 V). 22 2 20 9 8 7 IN GND EN VI = 4.3 V DBV PACKAGE (TOP VIEW) 2 3 5 4 OUT NC/FB GROUND CURRENT FREE-AIR TEMPERATURE IO = 00 ma IO = 0 ma Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 200, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 AVAILABLE OPTIONS TJ VOLTAGE PACKAGE PART NUMBER SYMBOL 40 C to 25 C Variable.2V to 5.5V TPS7690DBVT TPS7690DBVR PCFI.2 V TPS7692DBVT TPS7692DBVR PCGI.5 V TPS7695DBVT TPS7695DBVR PCHI.8 V TPS7698DBVT TPS7698DBVR PCII 2.5 V SOT-23 TPS76925DBVT TPS76925DBVR PCJI (DBV) 2.7 V TPS76927DBVT TPS76927DBVR PCKI 2.8 V TPS76928DBVT TPS76928DBVR PCLI 3.0 V TPS76930DBVT TPS76930DBVR PCMI 3.3 V DBVT DBVR PCNI 5.0 V TPS76950DBVT TPS76950DBVR PCOI The DBVT indicates tape and reel of 250 parts. The DBVR indicates tape and reel of 3000 parts. functional block diagram TPS7690 IN EN GND VREF Current Limit / Thermal Protection OUT FB TPS7692/5/8/25/27/28/30/33/50 IN EN GND VREF Current Limit / Thermal Protection OUT 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 Terminal Functions TERMINAL NAME NO. I/O GND 2 Ground EN 3 I Enable input FB 4 I Feedback voltage (TPS7690 only) IN I Input supply voltage NC 4 No connection (Fixed options only) OUT 5 O Regulated output voltage DESCRIPTION absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Input voltage range.................................................. 0.3 V to 3.5 V Voltage range at EN........................................................... 0.3 V to V I + 0.3 V Voltage on OUT, FB.......................................................................... 7 V Peak output current.............................................................. Internally limited ESD rating, HBM.......................................................................... 2 kv Continuous total power dissipation..................................... See Dissipation Rating Table Operating virtual junction temperature range, T J..................................... 40 C to 50 C Storage temperature range, T stg................................................... 65 C to 50 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE : All voltage values are with respect to network ground terminal. BOARD PACKAGE RθJC RθJA DISSIPATION RATING TABLE DERATING FACTOR ABOVE TA = 25 C TA 25 C POWER RATING TA = 70 C POWER RATING TA = 85 C POWER RATING Low K DBV 65.8 C/W 259 C/W 3.9 mw/ C 386 mw 22 mw 54 mw High K DBV 65.8 C/W 80 C/W 5.6 mw/ C 555 mw 305 mw 222 mw The JEDEC Low K (s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. recommended operating conditions MIN NOM MAX UNIT Input voltage, VI (see Note 2) 2.7 0 V Output voltage range, VO.2 5.5 V Continuous output current, IO (see Note 3) 0 00 ma Operating junction temperature, TJ 40 25 C NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula: VI(min) = VO(max) + VDO (max load) 3. Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 electrical characteristics over recommended operating free-air temperature range, V I = V O(typ) + V, I O = 00 ma, EN = 0 V, C o = 4.7 µf (unless otherwise noted) Output voltage (0 µa to 00 ma load) (see Note 4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS7690 TPS7692 TPS7695 TPS7698 TPS76925 TPS76927 TPS76928 TPS76930 TPS76950.2 V VO 5.5 V, TJ = 25 C VO.2 V VO 5.5 V, TJ = 40 C to 25 C 0.97VO.03VO TJ = 25 C, 2.7 V < VIN < 0 V.224 TJ = 40 C to 25 C, 2.7 V < VIN < 0 V.87.26 TJ = 25 C, 2.7 V < VIN < 0 V.5 TJ = 40 C to 25 C, 2.7 V < VIN < 0 V.455.545 TJ = 25 C, 2.8 V < VIN < 0 V.8 TJ = 40 C to 25 C, 2.8 V < VIN < 0 V.746.854 TJ = 25 C, 3.5 V < VIN < 0 V 2.5 TJ = 40 C to 25 C, 3.5 V < VIN < 0 V 2.425 2.575 TJ = 25 C, 3.7 V < VIN < 0 V 2.7 TJ = 40 C to 25 C, 3.7 V < VIN < 0 V 2.69 2.78 TJ = 25 C, 3.8 V < VIN < 0 V 2.8 TJ = 40 C to 25 C, 3.8 V < VIN < 0 V 2.76 2.884 TJ = 25 C, 4.0 V < VIN < 0 V 3.0 TJ = 40 C to 25 C, 4.0 V < VIN < 0 V 2.90 3.090 TJ = 25 C, 4.3 V < VIN < 0 V 3.3 TJ = 40 C to 25 C, 4.3 V < VIN < 0 V 3.20 3.399 TJ = 25 C, 6.0 V < VIN < 0 V 5.0 TJ = 40 C to 25 C, 6.0 V < VIN < 0 V 4.850 5.50 EN = 0V, 0 ma < IO < 00 ma, Quiescent current (GND current) TJ = 25 C (see Notes 4 and 5) EN = 0V, IO = 00 ma, TJ = 40 C to 25 C Load regulation Output voltage line regulation ( VO/VO) (see Note 5) Output noise voltage EN = 0V, TJ = 25 C IO = 0 to 00 ma, VO + V < VI 0 V, TJ = 25 C, See Note 4 VO + V < VI 0 V, TJ = 40 C to 25 C, See Note 4 BW = 300 Hz to 50 khz, Co = 0 µf, TJ = 25 C 7 28 V µa 2 mv 0.04 0. %/V 90 µvrms Output current limit VO = 0 V, See Note 4 350 750 ma Standby current EN = VI, 2.7 < VI < 0 V µa TJ = 40 C to 25 C 2 µa NOTES: 4. Minimum IN operating voltage is 2.7 V or VO(typ) + V, whichever is greater. Maximum IN voltage 0 V, minimum output current 0 µa, maximum output current 00 ma. 5. If VO.8 V then VImin = 2.7 V, VImax = 0 V: Line Reg. (mv).% V. If VO 2.5 V then VImin = VO + V, VImax = 0 V: V O. VImax 2.7 V. 00 000 V.V O Imax. VO V.. Line Reg. (mv).% V. 000 00 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 electrical characteristics over recommended operating free-air temperature range, V I = V O(typ) + V, I O = 00 ma, EN = 0 V, C o = 4.7 µf (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FB input current FB =.224 V (TPS7690) µa High level enable input voltage 2.7 V < VI < 0 V.7 V Low level enable input voltage 2.7 V < VI < 0 V 0.9 V Power supply ripple rejection Input current (EN) Dropout voltage (see Note 6) TPS76928 TPS76930 TPS76950 f = khz, Co = 0 µf, TJ = 25 C, See Note 4 60 db EN = 0 V 0 µa EN = VI µa IO = 50 ma, TJ = 25 C 60 IO = 50 ma, TJ = 40 C to 25 C 25 IO = 00 ma, TJ = 25 C 22 IO = 00 ma, TJ = 40 C to 25 C 245 IO = 50 ma, TJ = 25 C 57 IO = 50 ma, TJ = 40 C to 25 C 5 IO = 00 ma, TJ = 25 C 5 IO = 00 ma, TJ = 40 C to 25 C 230 IO = 50 ma, TJ = 25 C 48 IO = 50 ma, TJ = 40 C to 25 C 00 IO = 00 ma, TJ = 25 C 98 IO = 00 ma, TJ = 40 C to 25 C 200 IO = 50 ma, TJ = 25 C 35 IO = 50 ma, TJ = 40 C to 25 C 85 IO = 00 ma, TJ = 25 C 7 IO = 00 ma, TJ = 40 C to 25 C 70 NOTES: 4. Minimum IN operating voltage is 2.7 V or VO(typ) + V, whichever is greater. Maximum IN voltage 0 V, minimum output current 0 µa, maximum output current 00 ma. 6. IN voltage equals VO(Typ) 00mV; TPS7690 output voltage set to 3.3V nominal with external resistor divider. TPS7692, TPS7695, TPS7698, TPS76925, and TPS76927 dropout voltage limited by input voltage range limitations. mv TYPICAL CHARACTERISTICS Table of Graphs FIGURE VO Output voltage Output current, 2, 3 Free-air temperature 4, 5, 6 Ground current Free-air temperature 7 Output spectral noise density Frequency 8 Zo Output impedance Frequency 9 VDO Dropout voltage Free-air temperature 0 Ripple rejection Frequency LDO startup time 2 Line transient response 3, 5 Load transient response 4, 6 Equivalent series resistance (ESR) Output current 7, 9 Added ceramic capacitance 8, 20 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 TYPICAL CHARACTERISTICS 2.498 2.496 TPS76925 OUTPUT VOLTAGE OUTPUT CURRENT VI = 3.5 V TA = 25 C.498.496 TPS7695 OUTPUT VOLTAGE OUTPUT CURRENT VI = 2.7 V TA = 25 C V O Output Voltage V 2.494 2.492 2.490 2.488 2.486 V O Output Voltage V.494.492.490.488 2.484.486 2.482 0 20 40 60 80 IO Output Current ma Figure 00.484 0 20 40 60 80 00 IO Output Current ma Figure 2 OUTPUT VOLTAGE OUTPUT CURRENT TPS7695 OUTPUT VOLTAGE FREE-AIR TEMPERATURE 3.284.496 V O Output Voltage V 3.282 3.280 3.278 3.276 3.274 VI = 4.3 V TA = 25 C V O Output Voltage V.494.492.490.488.486.484 IO = ma IO = 00 ma VI = 2.7 V 3.272.482 3.270 0 20 40 60 80 00 IO Output Current ma Figure 3.480 60 40 20 0 20 40 60 80 00 20 40 TA Free-Air Temperature C Figure 4 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 TYPICAL CHARACTERISTICS TPS76925 OUTPUT VOLTAGE FREE-AIR TEMPERATURE OUTPUT VOLTAGE FREE-AIR TEMPERATURE 2.496 3.285 2.494 2.492 IO = ma 3.280 IO = ma V O Output Voltage V 2.490 2.488 2.486 2.484 2.482 IO = 00 ma V O Output Voltage V 3.275 3.270 3.265 IO = 00 ma VI = 4.3 V 2.480 2.478 VI = 3.5 V 3.260 2.476 60 40 20 0 20 40 60 80 00 20 40 TA Free-Air Temperature C Figure 5 3.255 60 40 20 0 20 40 60 80 00 20 40 TA Free-Air Temperature C Figure 6 22 GROUND CURRENT FREE-AIR TEMPERATURE 2 OUTPUT SPECTRAL NOISE DENSITY FREQUENCY Ground Current µ A 2 20 9 8 7 6 VI = 4.3 V IO = 00 ma IO = 0 ma 5 60 40 20 0 20 40 60 80 00 20 40 TA Free-Air Temperature C Figure 7 Output Spectral Noise Density µv Hz.8.6.4.2 0.8 0.6 0.4 0.2 0 00 VI = 4.3 V IO = 00 ma IO = ma CO = 0 µf IO = 00 ma CO = 0 µf IO = ma k 0k 00k f Frequency Hz Figure 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 7
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 TYPICAL CHARACTERISTICS Zo Output Impedance Ω 2.8.6.4.2 0.8 0.6 0.4 0.2 VI = 4.3 V ESR = 0.3 Ω TA = 25 C OUTPUT IMPEDANCE FREQUENCY IO = ma IO = 00 ma V DO Dropout Voltage mv 000 00 0 VI = 3.2 V DROPOUT VOLTAGE FREE-AIR TEMPERATURE IO = 0 ma IO = 00 ma 0 0 00 k 0 k 00 k M f Frequency Hz Figure 9 60 40 20 0 20 40 60 80 00 20 40 TA Free-Air Temperature C Figure 0 00 90 RIPPLE REJECTION FREQUENCY LDO STARTUP TIME Ripple Rejection db 80 70 60 50 40 30 20 IO = ma IO = 00 ma EN 0 0 VI = 4.3 V ESR = 0.3 Ω VO 0 0 00 k 0 k 00 k f Frequency Hz Figure M 0 M 0 20 40 60 80 00 20 40 60 80 200 t Time µs Figure 2 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 TYPICAL CHARACTERISTICS Output Voltage mv 0 0 0 TPS7695 LINE TRANSIENT RESPONSE Current Load ma 00 0 TPS7695 LOAD TRANSIENT RESPONSE V I Input Voltage V V O 3.7 2.7 IL = 0 ma ESR = 0.3 Ω V O Output Voltage mv Change In 0 200 400 VI = 2.7 V CO = 0 µf ESR = 0.3 Ω 0 20 40 60 80 00 20 40 60 80 200 t Time µs Figure 3 0 20 40 60 80 00 20 40 60 80 200 t Time µs Figure 4 Output Voltage mv V O V I Input Voltage V 0 0 0 5.3 4.3 LINE TRANSIENT RESPONSE IL = 0 ma ESR = 0.3 Ω Current Load ma V O Output Voltage mv Change In 00 0 00 0 00 LOAD TRANSIENT RESPONSE VI = 4.3 V ESR = 0.3 Ω 0 20 40 60 80 00 20 40 60 80 t Time µs Figure 5 0 20 40 60 80 00 20 40 60 80 t Time µs Figure 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 9
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 TYPICAL CHARACTERISTICS ESR Equivalent Series Resistance Ω 00 0 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) OUTPUT CURRENT Region of Instability Region of Stability VIN = 4.3 V 3.3 V LDO ESR Equivalent Series Resistance Ω 00 0 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) ADDED CERAMIC CAPACITANCE Region of Instability Region of Stability VIN = 4.3 V IL = 00 ma 0.2 0. 0 25 50 75 00 0 0. 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 IO Output Current ma Added Ceramic Capacitance µf Figure 7 Figure 8 ESR Equivalent Series Resistance Ω 00 0 0.2 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) OUTPUT CURRENT Region of Instability Region of Stability VIN = 4.3 V CO = 0 µf 3.3 V LDO ESR Equivalent Series Resistance Ω 00 0 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) ADDED CERAMIC CAPACITANCE Region of Instability Region of Stability VIN = 4.3 V CO = 0 µf IL = 00 ma 0. 0 25 50 75 00 0 0. 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 IO Output Current ma Added Ceramic Capacitance µf Figure 9 Figure 20 0 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 APPLICATION INFORMATION The TPS769xx family of low-dropout (LDO) regulators have been optimized for use in battery-operated equipment. They feature extremely low dropout voltages, low quiescent current (7 µa nominally), and enable inputs to reduce supply currents to µa when the regulators are turned off. device operation The TPS769xx uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over more conventional PNP-pass-element LDO designs. The PMOS pass element is a voltage-controlled device and, unlike a PNP transistor, it does not require increased drive current as output current increases. Supply current in the TPS769xx is essentially constant from no load to maximum load. Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation. The device switches into a constant-current mode at approximately 350 ma; further load reduces the output voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction temperature rises above approximately 65 C. Recovery is automatic when the junction temperature drops approximately 25 C below the high temperature trip point. The PMOS pass element includes a back gate diode that conducts reverse current when the input voltage level drops below the output voltage level. A voltage of.7 V or greater on the EN input will disable the TPS769xx internal circuitry, reducing the supply current to µa. A voltage of less than 0.9 V on the EN input will enable the TPS769xx and will enable normal operation to resume. The EN input does not include any deliberate hysteresis, and it exhibits an actual switching threshold of approximately.5 V. A typical application circuit is shown in Figure 2. TPS769xx VI IN NC/FB 4 C µf 3 OUT EN GND 2 5 VO + 4.7 µf ESR = 0.2 Ω TPS7692, TPS7695, TPS7698, TPS76925, TPS76927, TPS76928, TPS76930,, TPS76950 (fixed-voltage options). Figure 2. Typical Application Circuit POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 APPLICATION INFORMATION external capacitor requirements Although not required, a 0.047-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS769xx, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like all low dropout regulators, the TPS769xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 4.7 µf. The ESR (equivalent series resistance) of the capacitor should be between 0.2 Ω and 0 Ω. to ensure stability. Capacitor values larger than 4.7 µf are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 µf are not recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7 µf surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic capacitors may have very small equivalent series resistances and may thus require the addition of a low value series resistor to ensure stability. CAPACITOR SELECTION PART NO. MFR. VALUE MAX ESR SIZE (H L W) T494B475K06AS KEMET 4.7 µf.5 Ω.9 3.5 2.8 95D06x006x2T SPRAGUE 0 µf.5 Ω.3 7.0 2.7 695D06x003562T SPRAGUE 0 µf.3 Ω 2.5 7.6 2.5 TPSC475K035R0600 AVX 4.7 µf 0.6 Ω 2.6 6.0 3.2 Size is in mm. ESR is maximum resistance in Ohms at 00 khz and TA = 25 C. Contact manufacturer for minimum ESR values. 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
output voltage programming TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 APPLICATION INFORMATION The output voltage of the TPS7690 adjustable regulator is programmed using an external resistor divider as shown in Figure 22. The output voltage is calculated using: V V. R. O ref R2 () Where: V ref =.224 V typ (the internal reference voltage) Resistors R and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 69 kω to set the divider current at 7 µa and then calculate R using: R. V O V ref. R2 (2) OUTPUT VOLTAGE OUTPUT VOLTAGE PROGRAMMING GUIDE DIVIDER RESISTANCE (kω) (V) R R2 VI µf TPS7690 IN 2.5 3.3 3.6 4.0 5.0 % values shown. 74 287 324 383 523 69 69 69 69 69.7 V 0.9 V 3 OUT EN FB GND 2 5 4 R R2 VO 4.7 µf ESR = 0.2 Ω Figure 22. TPS7690 Adjustable LDO Regulator Programming POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3
TPS7690, TPS7692, TPS7695, TPS7698, TPS76925 TPS76927, TPS76928, TPS76930,, TPS76950 ULTRALOW-POWER 00-mA LOW-DROPOUT LINEAR REGULATORS SLVS203E JUNE 999 REVISED MAY 200 APPLICATION INFORMATION power dissipation and junction temperature Specified regulator operation is assured to a junction temperature of 25 C; the maximum junction temperature should be restricted to 25 C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P D(max), and the actual dissipation, P D, which must be less than or equal to P D(max). The maximum-power-dissipation limit is determined using the following equation: P D(max) T J max T A R JA Where: T J max is the maximum allowable junction temperature R θja is the thermal resistance junction-to-ambient for the package, see the dissipation rating table. T A is the ambient temperature. The regulator dissipation is calculated using: P D.V I V O. I O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. regulator protection The TPS769xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS769xx features internal current limiting and thermal protection. During normal operation, the TPS769xx limits output current to approximately 350 ma. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 65 C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 40 C, regulator operation resumes. 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM www.ti.com 2-Sep-206 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan TPS7690DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7690DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7690DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7690DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7692DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7692DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7692DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7692DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7695DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7695DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7695DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7695DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7698DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7698DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS7698DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS7698DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76925DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking (4/5) CU NIPDAU Level--260C-UNLIM -40 to 25 PCFI CU NIPDAU Level--260C-UNLIM -40 to 25 PCFI CU NIPDAU Level--260C-UNLIM -40 to 25 PCFI CU NIPDAU Level--260C-UNLIM -40 to 25 PCFI CU NIPDAU Level--260C-UNLIM -40 to 25 PCGI CU NIPDAU Level--260C-UNLIM -40 to 25 PCGI CU NIPDAU Level--260C-UNLIM -40 to 25 PCGI CU NIPDAU Level--260C-UNLIM -40 to 25 PCGI CU NIPDAU Level--260C-UNLIM -40 to 25 PCHI CU NIPDAU Level--260C-UNLIM -40 to 25 PCHI CU NIPDAU Level--260C-UNLIM -40 to 25 PCHI CU NIPDAU Level--260C-UNLIM -40 to 25 PCHI CU NIPDAU Level--260C-UNLIM -40 to 25 PCII CU NIPDAU Level--260C-UNLIM -40 to 25 PCII CU NIPDAU Level--260C-UNLIM -40 to 25 PCII CU NIPDAU Level--260C-UNLIM -40 to 25 PCII CU NIPDAU Level--260C-UNLIM -40 to 25 PCJI Samples Addendum-Page
PACKAGE OPTION ADDENDUM www.ti.com 2-Sep-206 Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan TPS76925DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76925DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76925DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76927DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76927DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76927DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76928DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76928DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76928DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76928DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76930DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76930DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76930DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76930DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking (4/5) CU NIPDAU Level--260C-UNLIM -40 to 25 PCJI CU NIPDAU Level--260C-UNLIM -40 to 25 PCJI CU NIPDAU Level--260C-UNLIM -40 to 25 PCJI CU NIPDAU Level--260C-UNLIM -40 to 25 PCKI CU NIPDAU Level--260C-UNLIM -40 to 25 PCKI CU NIPDAU Level--260C-UNLIM -40 to 25 PCKI CU NIPDAU Level--260C-UNLIM -40 to 25 PCLI CU NIPDAU Level--260C-UNLIM -40 to 25 PCLI CU NIPDAU Level--260C-UNLIM -40 to 25 PCLI CU NIPDAU Level--260C-UNLIM -40 to 25 PCLI CU NIPDAU Level--260C-UNLIM -40 to 25 PCMI CU NIPDAU Level--260C-UNLIM -40 to 25 PCMI CU NIPDAU Level--260C-UNLIM -40 to 25 PCMI CU NIPDAU Level--260C-UNLIM -40 to 25 PCMI CU NIPDAU Level--260C-UNLIM -40 to 25 PCNI CU NIPDAU Level--260C-UNLIM -40 to 25 PCNI CU NIPDAU Level--260C-UNLIM -40 to 25 PCNI CU NIPDAU Level--260C-UNLIM -40 to 25 PCNI Samples Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 2-Sep-206 Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan TPS76950DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76950DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS TPS76950DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS TPS76950DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking (4/5) CU NIPDAU Level--260C-UNLIM -40 to 25 PCOI CU NIPDAU Level--260C-UNLIM -40 to 25 PCOI CU NIPDAU Level--260C-UNLIM -40 to 25 PCOI CU NIPDAU Level--260C-UNLIM -40 to 25 PCOI Samples () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either ) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS : TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 3
PACKAGE OPTION ADDENDUM www.ti.com 2-Sep-206 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS769 : Automotive: TPS769-Q NOTE: Qualified Version Definitions: Automotive - Q00 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 4
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-208 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W (mm) A0 (mm) B0 (mm) K0 (mm) P (mm) W (mm) Pin Quadrant TPS7690DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7690DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7692DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7692DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7695DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7695DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7698DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS7698DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76925DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76925DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76927DBVR SOT-23 DBV 5 3000 78.0 9.0 3.3 3.2.4 4.0 8.0 Q3 TPS76927DBVT SOT-23 DBV 5 250 78.0 9.0 3.3 3.2.4 4.0 8.0 Q3 TPS76928DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76928DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76930DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76930DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 DBVR SOT-23 DBV 5 3000 80.0 8.4 3.2 3.2.4 4.0 8.0 Q3 DBVT SOT-23 DBV 5 250 80.0 8.4 3.2 3.2.4 4.0 8.0 Q3 Pack Materials-Page
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-208 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W (mm) A0 (mm) B0 (mm) K0 (mm) P (mm) W (mm) Pin Quadrant TPS76950DBVR SOT-23 DBV 5 3000 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 TPS76950DBVT SOT-23 DBV 5 250 78.0 9.0 3.23 3.7.37 4.0 8.0 Q3 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS7690DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS7690DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS7692DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS7692DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS7695DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS7695DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS7698DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS7698DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS76925DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS76925DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS76927DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS76927DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS76928DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS76928DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 TPS76930DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-208 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS76930DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 DBVR SOT-23 DBV 5 3000 20.0 85.0 35.0 DBVT SOT-23 DBV 5 250 20.0 85.0 35.0 TPS76950DBVR SOT-23 DBV 5 3000 80.0 80.0 8.0 TPS76950DBVT SOT-23 DBV 5 250 80.0 80.0 8.0 Pack Materials-Page 3
SCALE 4.000 PACKAGE OUTLINE DBV0005A SOT-23 -.45 mm max height SMALL OUTLINE TRANSISTOR C 3.0 2.6 0. C PIN INDEX AREA.75.45 B A.45 MAX 5.9 2X 0.95 2.9 3.05 2.75 5X 0.5 3 0.3 0.2 C A B 4 (.) 0.5 TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 0 TYP 0.6 TYP 0.3 SEATING PLANE 424839/C 04/207 NOTES:. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y4.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-78. www.ti.com
DBV0005A EXAMPLE BOARD LAYOUT SOT-23 -.45 mm max height SMALL OUTLINE TRANSISTOR 5X (.) PKG 5X (0.6) 5 2 SYMM (.9) 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:5X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) 0.07 MIN ARROUND SOLDER MASK DEFINED SOLDER MASK DETAILS 424839/C 04/207 NOTES: (continued) 4. Publication IPC-735 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
DBV0005A EXAMPLE STENCIL DESIGN SOT-23 -.45 mm max height SMALL OUTLINE TRANSISTOR 5X (0.6) 5X (.) PKG 5 2X(0.95) 2 SYMM (.9) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.25 mm THICK STENCIL SCALE:5X 424839/C 04/207 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com
SCALE 4.000 PACKAGE OUTLINE DBV0005A SOT-23 -.45 mm max height SMALL OUTLINE TRANSISTOR C 3.0 2.6 0. C PIN INDEX AREA.75.45 B A.45 MAX 5.9 2X 0.95 2.9 3.05 2.75 5X 0.5 3 0.3 0.2 C A B 4 (.) 0.5 TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 0 TYP 0.6 TYP 0.3 SEATING PLANE 424839/C 04/207 NOTES:. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y4.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-78. www.ti.com
DBV0005A EXAMPLE BOARD LAYOUT SOT-23 -.45 mm max height SMALL OUTLINE TRANSISTOR 5X (.) PKG 5X (0.6) 5 2 SYMM (.9) 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:5X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) 0.07 MIN ARROUND SOLDER MASK DEFINED SOLDER MASK DETAILS 424839/C 04/207 NOTES: (continued) 4. Publication IPC-735 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
DBV0005A EXAMPLE STENCIL DESIGN SOT-23 -.45 mm max height SMALL OUTLINE TRANSISTOR 5X (0.6) 5X (.) PKG 5 2X(0.95) 2 SYMM (.9) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.25 mm THICK STENCIL SCALE:5X 424839/C 04/207 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com
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