Coupled inductors on silicon for PwrSoC in the frame of PowerSwipe project Santosh Kulkarni*, Bruno Allard** *Microsystems Centre, Tyndall National Institute, University College Cork, Ireland **Ampere lab, INSA Lyon, France PAGE 1
PowerSwipe Concept PAGE 2 2
PowerSwipe Consortium Partners First EU Funded programme on PwrSoC/PwrSiP PAGE 3 3
Powerswipe-Demonstrators SOC + LV-PMIC Passive Interposer PCB Motherboard Demo 1- Low Frequency dc-dc for Automotive Passive LC Demo 2- High Frequency dc-dc for multi-phase IVR applications PAGE 4
Powerswipe integrated coupled inductors Summary of presentation Design, Fabrication & Small Signal testing of Loosely coupled inductor device Large Signal characterization of integrated coupled inductors Large signal Inductance, resistance, BH loop Impact of dc bias on magnetic material under test Summary PAGE 5
Achieve miniaturisation of power passives: Increased switching frequency of switched-mode DC-DC converter (10-200 MHz) Power passives footprint comparable to DC-DC converter IC (1 to 2 mm 2 ) HF DC-DC converter-specs Inductor design Freq. (MHz) L (nh) Coupling factor PowerSwipe Motivation/Objectives Efficiency (magnetics) Efficiency (IC) Total efficiency Coupled 100 45 ~0.4 90% 90,4% 81% Design 1: Coupled inductor PAGE 6
PowerSwipe coupled inductor Design & Fabrication L (nh) Core Length Core Thickness Copper width Copper Thickness DCR (Ohm) Device Footprint 45 Coupled 0.95 mm 2 μm 40 μm 15 μm 0.282 1.25 mm2 45nH Coupled Coupled inductor prototype Device Schematic Device Cross-section PAGE 7
Powerswipe coupled inductor Small signal Characterization Small signal testing: LCR meter & 4-probe Kelvin setup- INSA Lyon ü Good frequency & current response 20% drop Small signal testing: L vs DC bias- Tyndall I sat =650mA PAGE 8
Powerswipe coupled inductor Coupling Measurement Two port VNA test for coupling k measured = 0.38; k design = 0.4 PAGE 9
Large Signal Characterization Set-up Signal generator- Agilent E8257D Power amplifier- Applied Research 25A250A Current probe- Pearson current 2877 Voltage probe- Tap 1500 PAGE 10
Test circuit for coupled inductor measurement Key issues with large signal testing set-up - Noise - Use 4 wire measurement for the DUT - Error in amplitude & phase measurement - Attenuation & time delay from current & voltage probes - Accurate compensation system to correct this skew - Compensation is done through a measurement on a capacitor of known impedance PAGE 11
Voltage & Current waveforms for Capacitor- Compensation Time lag @ 40MHz- 0.671 ns Current attenuation- 0.895 PAGE 12
Inductance & DC resistance measurements Inductance (Self/Mutual) stays constant upto 60MHz Resistance measurement shows a dramatic increase after 60MHz This behaviour not consistent with small signal test data Possible explanation- Voltage probes damaged PAGE 13
DC bias measurements Voltage & Current waveforms including compensated current loops Iac- 20mA; Ferquency- 60MHz DC saturation current- 700 ma (consistent with small signal measurement) PAGE 14
Large signal testing to plot BH loops @ different bias currents 10 Hz - B value estimated using Faraday s law - H value estimated using Ampere s law PAGE 15
Final circuit testing of Powerswipe coupled inductors Inductor Passive Interposer Switch Initial test on single phase discrete inductor with Interposer completed Circuit testing of coupled inductor with VR ongoing at INSA, Lyon- Result will be presented at future conferences PAGE 16
Benchmarking Powerswipe VR performance 110MHz, board 90 110MHz, interposer 95 85 90 70 65 60 100 75 70 40 65 55 0 0.1 0.2 0.3 Load current (A) Interposer 0.4 1.8V 0 0.1 0.2 0.3 Load current (A) 0.4 55 0.2 0.3 0.4 2.4V Active die 20 State of the art 100 MHz cascode 100 MHz standard 60 1.2V 11 nf 80 0.5 0.6 VOUT/VIN 0.7 0.8 0.9 Ä Efficiency Globally better on interposer Slightly increased on-board for low load current 11 nf 33 nf 60 nh 16 nf PAGE 17 10 Frequency (MHz) 75 11 nf 200 85 Efficiency (%) Efficiency (V) 80 50 500
Summary First EU funded project on PwrSoC/PwrSiP Target applications- Automotive & IVR Developed multiphase coupled inductors for IVR Racetrack coupled inductors designed using CAD tool Fabricated using Tyndall s Double Metal Layer process Small signal measurement in good agreement with design data Developed large signal characterization system for measuring coupled inductor performance Circuit level testing of VR s ongoing PAGE 18
Acknowledgements Tyndall National Institute- Prof. Cian O Mathuna, Dr. Paul McCloskey, Dr. Ningning Wang, Dr. Zoran Pavolvic, Ricky Anthony, Nicolas Cordero, Margaret Hegarty, Joe O Brien, Declan Casey, James Rohan, Anne-Marie Kelleher, Graeme Maxwell Lab Ampere, INSA, Lyon- Florian Neveu, Dr. Christian Martin Universidad Carlos III de Madrid- Dr. Cristina Fernandez Herrero Funding- European Union for funding the work through FP7 (Project: PowerSwipe) under Grant 318529. PAGE 19