MPC5668x. MPC5668x Microcontroller Data Sheet. Freescale Semiconductor Data Sheet: Advance Information. Document Number: MPC5668X Rev.

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Freescale Semiconductor Data Sheet: Advance nformation MPC5668x Microcontroller Data Sheet MPC5668x features: 32-bit CPU core complex (e200z650) Compliant with Power Architecture embedded category 32 KB unified cache with line locking and eight-entry store buffer Execution speed static to 6 MHz 32-bit processor (e200z0) Execution speed static to 1/2 CPU core speed (58 MHz) 2 MB on-chip flash Supports read during program and erase operations, and multiple blocks allowing EEPRM emulation 512 KB + 80 KB (592 KB) on-chip ECC SRAM (MPC5668G) 128 KB on-chip ECC SRAM (MPC5668E) 16-entry Memory Protection Unit (MPC5668E only) Direct memory access controller 16-channel on MPC5668G 32-channel on MPC5668E Fast ethernet controller Supports -Mbps and 0-Mbps EEE 802.3 M, -Mbps 7-wire interface EEE 802.3 MAC (compliant with EEE 802.3 1998 edition) Media Local Bus (MLB) interface (MPC5668G only) Supports 16 logical channels, max speed 24 Fs nterrupt controller (NTC) supports 316 external interrupt vectors (22 are reserved) System clocks Frequency-modulated phase-locked loop (FMPLL) 4 40MHz crystal oscillator (XTAL) 32 khz crystal oscillator (XTAL) Dedicated 16 MHz and 128 khz internal RC oscillators Analog to Digital Converter (ADC) module -bit A/D resolution 32 external channels 36 internal channels (MPC5668G) 64 internal channels (MPC5668E) This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. Freescale Semiconductor, nc., 2009. All rights reserved. Document Number: MPC5668X Rev. 3, 9/2009 MPC5668x MAPBGA 208 17 mm x 17 mm MAPBGA 256 17 mm x 17 mm Cross-Triggering Unit (MPC5668E only) nternal conversion triggering for ADC Triggerable by internal timers or ems200 Deserial Serial Peripheral nterface (DSP) Four individual DSP modules Full duplex, synchronous transfers Master or slave operation nter-c communication ( 2 C) interface Four individual 2 C modules Multi-master operation Serial Communication nterface (esc) module Two-channel DMA interface Configurable as LN bus master ems200 timed input/output 24 channels, 16-bit timers (MPC5668G) 32 channels, 16-bit timers (MPC5668E) Controller Area Network (FlexCAN) module Compliant with CAN protocol specification, Version 2.0B active 64 mailboxes, each configurable as transmit or receive Dual-channel FlexRay controller Full implementation of FlexRay Protocol Specification 2.1, RevA 128 message buffers JTAG controller (MPC5668G only) Compliant with the EEE 49.1-20 Nexus Development nterface (ND) Available in 256 MAPBGA package only Compliant with EEE-ST 50-2003 Nexus class 3 development support on e200z650 Nexus class 2+ development support on e200z0 nternal voltage regulator allows operation from single 3.3 V or 5 V supply Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages PreliminarySubject to Change Without Notice

1 rdering nformation.................................3 1.1 rderable Parts................................3 2 MPC5668x Block Diagrams...........................4 3 Pin Assignments....................................6 3.1 208-ball MAPBGA Pin Assignments................6 3.2 256-ball MAPBGA Pin Assignments................7 3.3 Pin Muxing and Reset States.....................8 3.3.1 Power and Ground Supply Summary........25 4 Electrical Characteristics............................26 4.1 Maximum Ratings.............................26 4.2 Thermal Characteristics........................27 4.2.1 General Notes for Specifications at Maximum Junction Temperature....................28 4.3 ESD Characteristics...........................30 4.4 VRC Electrical Specifications....................30 4.5 DC Electrical Specifications.....................30 4.6 perating Current Specifications..............32 4.7 Pad Current Specifications...................34 4.7.1 Pad V DD33 Current Specifications........35 Table of Contents Table 1. MPC5668G/MPC5668E Comparison 4.8 Low Voltage Characteristics.................... 36 4.9 scillators Electrical Characteristics.............. 36 4. FMPLL Electrical Characteristics................. 38 4. ADC Electrical Characteristics................... 39 4.12 Flash Memory Electrical Characteristics........... 39 4.13 Pad AC Specifications......................... 40 4.14 AC Timing.................................. 43 4.14.1 Reset and Boot Configuration Pins......... 43 4.14.2 External nterrupt (RQ) and Non-Maskable nterrupt (NM) Pins..................... 43 4.14.3 JTAG (EEE 49.1) nterface............. 44 4.14.4 Nexus Debug nterface................... 47 4.14.5 Enhanced Modular Subsystem (ems).. 49 4.14.6 Deserial Serial Peripheral nterface (DSP)... 50 4.14.7 MLB nterface.......................... 55 4.14.8 Fast Ethernet nterface.................. 57 5 Package Characteristics............................ 61 5.1 Package Mechanical Data...................... 61 6 Revision History.................................. 65 Feature MPC5668G MPC5668E Package 208 MAPBGA 256 MAPBGA 208 MAPBGA 256 MAPBGA RAM with ECC 592 KB 128 KB MPU No 16 entry DMA 16-channel 32-channel Ethernet (FEC) Yes No MediaLB (MLB-DM) Yes No FlexRay Yes (128 Message Buffers) No ADC (-bit) 36 internal channels Supports 32 external channels 64 internal channels Supports 32 external channels Total Timer (ems200) 24 channels, 16-bit 32 channels, 16-bit Cross Trigger Unit (CTU) No Yes SC (esc) 6 12 SP (DSP) 4 4 CAN (FlexCAN) 6 5 2 C 4 4 Nexus3 Debug (e200z6) Nexus2+ Debug (e200z0) Supported on 256BGA emulation package Supported on 256BGA emulation package Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages 2 PreliminarySubject to Change Without Notice Freescale Semiconductor

rdering nformation 1 rdering nformation 1.1 rderable Parts Qualification Status P = Prototype M = Fully spec. qualified, general market flow S = Fully spec. qualified, automotive flow Core Code PC = Power Architecture Table 1 shows the orderable part numbers for the MPC5668x. Freescale Part Number 1 SPC5668GF0AVMG SPC5668GF0AVMJ 4 Qualification status Core code Device number Fabrication Site Revision Temperature range Package identifier Tape and reel status Table 1. rderable Part Numbers Package Description MPC5668G 208 MAPBGA package Lead-free (PbFree) MPC5668G 256 MAPBGA package Lead-free (PbFree) SPC5668G F0A V MGR Fabrication Site F = Freescale Temperature Range V = 40 C to 5 C Note: Not all options are available on all devices. Refer to Table 1. Speed (MHz) perating Temperature 2 Max 3 (f MAX ) Package dentifier MG = 208 MAPBGA Pb-free MJ = 256 MAPBGA Pb-free Tape and Reel Status R = Tape and reel (blank) = Trays Min (T L ) Max (T H ) 6 40 C 5 C 6 40 C 5 C 1 All packaged devices are PPC5668x, rather than MPC5668x or SPC5668x, until product qualifications are complete. The unpackaged device prefix is PCC, rather than SCC, until product qualification is complete. Not all configurations are available in the PPC parts. 2 The lowest ambient operating temperature (T A ) is referenced by T L ; the highest ambient operating temperature is referenced by T H. 3 Maximum speed is the maximum frequency allowed including frequency modulation (FM). 4 The 256 MAPBGA package for the MPC5668x is not intended for full production qualification, and is supplied for development use only. Freescale Semiconductor 3 PreliminarySubject to Change Without Notice Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

MPC5668x Block Diagrams 2 MPC5668x Block Diagrams Figure 1 shows a top-level block diagram of the MPC5668G device. 4 DEBUG JTAG ND Nexus3(Z6) ND Nexus2+(Z0) e200z0 Core 2 MB VLE Flash (ECC) ECSM MASTERS e200z650 Core VLE MMU(32TLB) FPU/SPE 32K Cache 4/8 Way APS(0) Bridge B 6 x esc 36 x ADC MPC5668G 16ChDMA Mux ADC Analog to Digital Converter BAM Boot Assist Module DSP Serial Peripherals nterface ECC Error Correction Code ECSM Error Correction Status Module ems Timed nput utput edma Enhanced Direct Memory Access controller esc Serial Communications nterface FEC Fast Ethernet Controller FlexCAN Controller Area Network controller FlexRay FlexRay Bus Controller FMPLL Frequency Modulated Phase Locked Loop SPP Crossbar Switch (XBAR) 2 x 2 C 2 x DSP 24 x ems 6 x FlexCAN LEGEND 32 khz XTAL 128 khz RC APS(1) Bridge A 2 x DSP 2 x 2 C 4 40 MHz XTAL FMPLL Figure 1. MPC5668G Block Diagram Semaphores PreliminarySubject to Change Without Notice 16 MHz RC FEC MLB-DM FlexRay 80 KB SRAM (ECC) ECSM 512 KB SRAM (ECC) VREG Controller RTC/AP SWT STM NTC PT BAM SU Standby RAM ECSM 2 C nter C Controller NTC nterrupt Controller JTAG Joint Test Action Group interface MLB-DM Media Local Bus Device nterface Module ND Nexus Debug nterface PT Periodic nterrupt Timer RTC Real Time Clock SU System ntegration STM System Timer Module SWT Software Watchdog Timer VREG Voltage Regulator Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

MPC5668x Block Diagrams Figure 2 shows a top level block diagram for the MPC5668E device. DEBUG JTAG ND Nexus3(Z6) ND Nexus2+(Z0) e200z0 Core 2 MB VLE Flash (ECC) ECSM MASTERS e200z650 Core VLE MMU(32TLB) FPU/SPE 32K Cache 4/8 Way APS(0) Bridge B 64 x ADC 32 x ems 8 x esc MPC5668E CTU ADC Analog to Digital Converter BAM Boot Assist Module CTU Cross Triggering Unit DSP Serial Peripherals nterface controller ECC Error Correction Code ECSM Error Correction Status Module edma Enhanced Direct Memory Access controller ems200 Timed nput utput esc Serial Communications nterface FlexCAN Controller Area Network controller FMPLL Frequency Modulated Phase Locked Loop 128 khz RC SPP Crossbar Switch (XBAR) 5 x FlexCAN 2 x DSP 2 x 2 C LEGEND 32 khz XTAL Semaphores 32ChDMA Mux 4 40 MHz XTAL FMPLL Memory Protection Unit (MPU) APS(1) Bridge A 4 x esc 2 x DSP 2 x 2 C Figure 2. MPC5668E Block Diagram 16 MHz RC 128 KB SRAM (ECC) 2 C nter C Controller NTC nterrupt Controller JTAG Joint Test Action Group interface MPU Memory Protection Unit ND Nexus Debug nterface PT Periodic nterrupt Timer RTC Real Time Clock SU System ntegration STM System Timer Module SWT Software Watchdog Timer VREG Voltage Regulator VREG Controller RTC/AP Freescale Semiconductor 5 PreliminarySubject to Change Without Notice SWT STM NTC PT BAM SU Standby RAM ECSM Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments 3 Pin Assignments 3.1 208-ball MAPBGA Pin Assignments Figure 3 shows the 208-ball MAPBGA pin assignments. 6 A B C D E F G H J K L M N P R T 1 2 3 4 5 6 7 8 9 12 13 14 15 16 V SS PD2 PD3 PD5 PD7 PD9 PD PD13 PF1 PD0 PD1 PD4 PD6 PD8 PF0 PE6 PD14 PD15 PE0 PC12 PC PC14 V DD PE1 V SS V DD PC9 PC PC13 PC7 PC8 PC5 V DDE1 PC3 V SS PB14 PC1 PC4 PB V RCCTL Note: This ballmap is preliminary and should not be used for board design. Figure 3. MPC5668x 208-ball MAPBGA (full diagram) PC0 V SS V SS V SS V SS V SS V SS V SS V SS V SS PK1 PK2 JCMP V DDEMLB V SS V SS V SS V SS V DD PG4 PG8 PG12 PK0 PF4 PF6 PF V SS PD PD12 PF2 PE7 TD TMS PE2 PE9 PC6 V DD V SS V SS V SS PB6 PB7 208 MAPBGA Ball Map (as viewed from top through the package) PB4 PB5 PreliminarySubject to Change Without Notice PA PA V DD V DD33 TEST EXTAL 1 2 3 4 5 6 7 8 9 12 13 14 15 16 PB8 PF7 PF PK4 PK6 PK8 PJ0 PJ2 PJ4 PJ6 PF9 PG1 PG0 PE3 PE4 PE5 TD PK3 PE8 V DDE2 PC15 PC2 PB13 PJ3 PB PB15 PJ5 PB12 PJ7 RESET PJ9 PJ8 V DDSYN PB9 PJ13 XTAL PB2 PB3 PA13 V RCSEL V DDE3 PB0 PB1 PA12 PA9 PA8 PA7 PG3 PG5 V SSSYN PF3 PE PE V DD PE15 PE14 PH9 PH V DDE4 PH15 PJ V SS PF12 PH3 PG15 PF8 PF5 TCK PE12 PE13 PK PH8 PH PH12 PH13 PH14 PJ PF15 PF14 PH4 PH1 PK5 PK7 PK9 PJ1 V RC V DDA V SSA PA0 PA1 PA3 PA5 PG6 PG7 PJ12 PJ14 PH5 PH6 PJ15 PG2 PF13 PH0 PG9 PG PH7 V SS V RH V RL PA14 PA15 PA2 PA4 PA6 PG PG13 PG14 PH2 V SS A B C D E F G H J K L M N P R T Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments 3.2 256-ball MAPBGA Pin Assignments Figure 4 shows the 256-ball MAPBGA pin assignments. A B C D E F G H J K L M N P R T 256 MAPBGA Ball Map (as viewed from top through the package) 1 2 3 4 5 6 7 8 9 12 13 14 15 16 V SS PD2 PD3 PD5 PD0 PD1 PD4 PD6 PC12 PC PC14 V DD PC PC7 PD7 PD8 PE0 PE1 MD0 V DDENEX V SS V SS V SS V SS V SS V SS PA PA9 PA1 PD9 PD PD13 PF1 PF0 PE6 PD14 PD15 V SS V DD PC9 PC13 PC8 PC5 V DDE1 V SS V SS PC3 V SS PB14 PC1 PC4 Note: This ballmap is preliminary and PF8 PF5 TCK PE12 PE13 PK PH8 PH PH12 PH13 PH14 PJ PF15 PF14 PH4 PH1 should not be used for board design. PF PF7 PF PK4 PK6 PK8 PJ0 PJ2 PJ4 PJ6 PJ9 PJ12 PJ14 PH5 PH6 PH2 Figure 4. MPC5668x 256-ball MAPBGA (full diagram) Freescale Semiconductor 7 PreliminarySubject to Change Without Notice PB PC0 V SS V SS V SS V SS V SS V SS V SS V SS V SS PK1 PK2 JCMP V DDEMLB MD7 V SS V SS V SS V SS V SS V DDENEX V SS V DD PG4 PG8 PG12 PK0 PF4 PF6 V SS PD PD12 PF2 PE7 PF9 PG1 PG0 PE3 PE4 PE5 TD TMS TD PK3 PE2 PE8 V DDE2 PE9 PK5 PC15 MD1 MD2 MD3 MD6 MD8 PK7 V SS MD4 MD5 PK9 PC2 PC6 PB13 PJ3 PB PB15 V SS V SS V SS V DDENEX PJ1 PJ5 PB8 PB12 V DD V SS V SS V SS PJ7 RESET V RCCTL PB6 PB7 V SS PJ8 V DDSYN PB9 PB4 PB5 PJ13 XTAL PB2 PB3 PA PA13 V DD V RCSEL V DDE3 V DD33 TEST PJ15 EXTAL PB0 PB1 PA12 PA8 PA7 PG2 PG3 PG5 PF13 PH0 V SSSYN PF3 PE PE V DD PE15 PE14 PH9 PH V DDE4 PH15 PJ V SS PF12 PH3 PG15 V RC V SS V SS V SS V SS MD9 MD MD MSE1 MSE0 MCK EVT EVT 1 2 3 4 5 6 7 8 9 12 13 14 15 16 V SS V SS V SS V SS V SS V SS V SS V SS V SS V DDA V SSA PA0 PA3 PA5 PG6 PG7 PG9 PG PH7 V SS V RH V RL PA14 PA15 PA2 PA4 PA6 PG PG13 PG14 V SS A B C D E F G H J K L M N P R T Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments 3.3 Pin Muxing and Reset States Table 2 shows the signals properties for each pin on MPC5668x. For all port pins that have an associated SU_PCRn register to control pin properties, the supported functions column lists the functions associated with the programming of the SU_PCRn[PA] bit in the order: general-purpose input/output (GP), function 1, function 2, and function 3 (see Figure 5). When an alternate function is not implemented for a value of SU_PCRn[PA], a dash is shown in the Description column and the respective value in the PA bitfield is reserved. Pin Name 1 PA0 PA1 PA2 PA3 PA4 PA5 8 Supported Functions 2 PA[0] AN[0] PA[1] AN[1] PA[2] AN[2] PA[3] AN[3] PA[4] AN[4] PA[5] AN[5] Supported Functions 2 PA[0] AN[0] GP (PCR) Num 3 PA 4 0 00 1 00 2 00 3 00 4 00 5 00 GP (PCR) PA 4 Description Num 3 0 00 Figure 5. Supported Functions Example Table 2. MPC5668x Signal Properties Description Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A (16) Type Voltage PreliminarySubject to Change Without Notice GP Function 1 Functions 2 and 3 not implemented Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDA HA D15 D15 V DDA HA E15 E15 V DDA HA F16 F16 V DDA HA F15 F15 V DDA HA G16 G16 V DDA HA G15 G15 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PA6 PA7 PA8 PA9 PA PA PA12 PA13 PA14 PA15 Supported Functions 2 PA[6] AN[6] PA[7] AN[7] PA[8] AN[8] PA[9] AN[9] PA[] AN[] PA[] AN[] PA[12] AN[12] PA[13] AN[13] PA[14] AN[14] EXTAL32 PA[15] AN[15] XTAL32 GP (PCR) Num 3 PA 4 6 00 7 00 8 00 9 00 00 00 12 00 13 00 14 00 15 00 Table 2. MPC5668x Signal Properties (continued) Description Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput Port A GP ADC Analog nput External 32 khz Crystal n Port A GP ADC Analog nput External 32 khz Crystal ut Freescale Semiconductor 9 PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDA HA H16 H16 V DDA HA G14 G14 V DDA HA F14 F14 V DDA HA E14 E14 V DDA HA D13 D13 V DDA HA E13 E13 V DDA HA D14 D14 V DDA HA F13 F13 V DDA HA D16 D16 V DDA HA E16 E16 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 Supported Functions 2 PB[0] AN[16]/ANW PB[1] AN[17]/ANX PB[2] AN[18]/ANY PB[3] AN[19]/ANZ PB[4] AN[20] PB[5] AN[21] PB[6] AN[22] PB[7] AN[23] PB[8] AN[24] PCS_A[2] PB[9] AN[25] PCS_A[3] GP (PCR) Num 3 PA 4 16 00 17 00 18 00 19 00 20 00 21 00 22 00 23 00 24 00 25 00 Table 2. MPC5668x Signal Properties (continued) Description Port B GP ADC Analog nput/mux n Port B GP ADC Analog nput/mux n Port B GP ADC Analog nput/mux n Port B GP ADC Analog nput/mux n Port B GP ADC Analog nput Port B GP ADC Analog nput Port B GP ADC Analog nput Port B GP ADC Analog nput Port B (16) Port B GP ADC Analog nput DSP_A Peripheral Chip Select Port B GP ADC Analog nput DSP_A Peripheral Chip Select Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE1 SHA B14 B14 V DDE1 SHA C14 C14 V DDE1 SHA B13 B13 V DDE1 SHA C13 C13 V DDE1 SHA C12 C12 V DDE1 SHA D12 D12 V DDE1 SHA C C V DDE1 SHA D D V DDE1 SHA A A V DDE1 SHA B12 B12 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PB PB PB12 PB13 PB14 PB15 PC0 PC1 PC2 PC3 Supported Functions 2 PB[] AN[26] PCS_B[4] PB[] AN[27] PCS_B[5] PB[12] AN[28] PCS_C[1] PB[13] AN[29] PCS_C[2] PB[14] AN[30] PCS_D[3] PB[15] AN[31] PCS_D[4] PC[0] AN[32] PC[1] AN[33] PC[2] AN[34] EVT PC[3] AN[35] EVT GP (PCR) Num 3 PA 4 26 00 27 00 28 00 29 00 30 00 31 00 32 00 33 00 34 00 35 00 Table 2. MPC5668x Signal Properties (continued) Description Port B GP ADC Analog nput DSP_B Peripheral Chip Select Port B GP ADC Analog nput DSP_B Peripheral Chip Select Port B GP ADC Analog nput DSP_C Peripheral Chip Select Port B GP ADC Analog nput DSP_C Peripheral Chip Select Port B GP ADC Analog nput DSP_D Peripheral Chip Select Port B GP ADC Analog nput DSP_D Peripheral Chip Select Port C GP ADC Analog nput Port C GP ADC Analog nput Port C GP ADC Analog nput Nexus Event n Port C GP ADC Analog nput Nexus Event ut Port C (16) Freescale Semiconductor PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE1 SHA A9 A9 V DDE1 SHA B9 B9 V DDE1 SHA C C V DDE1 SHA A8 A8 V DDE1 SHA B8 B8 V DDE1 SHA C9 C9 V DDE1 SHA D9 D9 V DDE1 SHA C8 C8 V DDE1 SHA A7 A7 V DDE1 SHA B7 B7 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PC4 PC5 PC6 PC7 PC8 PC9 PC PC PC12 PC13 PC14 12 Supported Functions 2 PC[4] AN[36] PC[5] AN[37] Z6NM PC[6] AN[38] Z0NM PC[7] AN[39] FR_DBG3 PC[8] AN[40] FR_DBG2 PC[9] AN[41] FR_DBG1 PC[] AN[42] FR_DBG0 PC[] AN[43] SCL_C PC[12] AN[44] SDA_C PC[13] AN[45] MA[0] PC[14] AN[46] MA[1] GP (PCR) Num 3 PA 4 36 00 37 00 38 00 39 00 40 00 41 00 42 00 43 00 44 00 45 00 46 00 Table 2. MPC5668x Signal Properties (continued) Description Port C GP ADC Analog nput Port C GP ADC Analog nput Z6 Core Non-Maskable nterrupt Port C GP ADC Analog nput Z0 Core Non-Maskable nterrupt Port C GP ADC Analog nput FlexRay Debug Port C GP ADC Analog nput FlexRay Debug Port C GP ADC Analog nput FlexRay Debug Port C GP ADC Analog nput FlexRay Debug Port C GP ADC Analog nput 2 C_C Serial Clock Port C GP ADC Analog nput 2 C_C Serial Data Port C GP ADC Analog nput ADC Ext. Mux Address Select Port C GP ADC Analog nput ADC Ext. Mux Address Select Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE1 SHA D8 D8 V DDE1 SHA C6 C6 V DDE1 SHA C7 C7 V DDE1 SHA A6 A6 V DDE1 SHA B6 B6 V DDE1 SHA A5 A5 V DDE1 SHA B5 B5 V DDE1 SHA B4 B4 V DDE1 SHA A4 A4 V DDE1 SHA C5 C5 V DDE1 SHA C4 C4 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PC15 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 Supported Functions 2 PC[15] AN[47] MA[2] PD[0] CNTX_A PD[1] CNRX_A PD[2] CNTX_B PD[3] CNRX_B PD[4] CNTX_C PD[5] CNRX_C PD[6] CNTX_D TXD_K SCL_B PD[7] CNRX_D RXD_K SDA_B PD[8] CNTX_E TXD_L SCL_C GP (PCR) Num 3 PA 4 47 00 48 00 49 00 50 00 51 00 52 00 53 00 54 00 55 00 56 00 Table 2. MPC5668x Signal Properties (continued) Description Port C GP ADC Analog nput ADC Ext. Mux Address Select Port D GP FlexCAN_A Transmit Port D GP FlexCAN_A Receive Port D GP FlexCAN_B Transmit Port D GP FlexCAN_B Receive Port D GP FlexCAN_C Transmit Port D GP FlexCAN_C Receive Port D GP FlexCAN_D Transmit SC_K Transmit 2 C_B Serial Clock Port D GP FlexCAN_D Receive SC_K Receive 2 C_B Serial Data Port D GP FlexCAN_E Transmit SC_L Transmit 2 C_C Serial Clock Port D (16) Freescale Semiconductor 13 PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE1 SHA D5 D5 V DDE2 SH A2 A2 V DDE2 SH B2 B2 V DDE2 SH B1 B1 V DDE2 SH C1 C1 V DDE2 SH C2 C2 V DDE2 SH D1 D1 V DDE2 SH D2 D2 V DDE2 SH E1 E1 V DDE2 SH E2 E2 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PD9 PD PD PD12 PD13 PD14 PD15 PE0 PE1 PE2 14 Supported Functions 2 PD[9] CNRX_E RXD_L SDA_C PD[] CNTX_F TXD_M SCL_D PD[] CNRX_F RXD_M SDA_D PD[12] TXD_A PD[13] RXD_A PD[14] TXD_B PD[15] RXD_B PE[0] TXD_C ems[31] PE[1] RXD_C ems[30] PE[2] TXD_D ems[29] GP (PCR) Num 3 PA 4 57 00 58 00 59 00 60 00 61 00 62 00 63 00 64 00 65 00 66 00 Table 2. MPC5668x Signal Properties (continued) Description Port D GP FlexCAN_E Receive SC_L Receive 2 C_C Serial Data Port D GP FlexCAN_F Transmit SC_M Transmit 2 C_D Serial Clock Port D GP FlexCAN_F Receive SC_M Receive 2 C_D Serial Data Port D GP esc_a Transmit Port D GP esc_a Receive Port D GP esc_b Transmit Port D GP esc_b Receive Port E GP esc_c Transmit ems Channel Port E GP esc_c Receive ems Channel Port E GP esc_d Transmit ems Channel Port E (16) Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE2 SH F1 F1 V DDE2 SH F2 F2 V DDE2 SH G1 G1 V DDE2 SH G2 G2 V DDE2 SH H1 H1 V DDE2 SH C3 C3 V DDE2 SH D3 D3 V DDE2 SH E3 E3 V DDE2 SH E4 E4 V DDE2 SH F4 F4 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE PE PE12 PE13 Supported Functions 2 PE[3] RXD_D ems[28] PE[4] TXD_E ems[27] PE[5] RXD_E ems[26] PE[6] TXD_F ems[25] PE[7] RXD_F ems[24] PE[8] TXD_G PCS_A[1] PE[9] RXD_G PCS_A[4] PE[] TXD_H PCS_B[3] PE[] RXD_H PCS_B[2] PE[12] TXD_J PCS_C[5] PE[13] RXD_J PCS_C[3] GP (PCR) Num 3 PA 4 67 00 68 00 69 00 70 00 71 00 72 00 73 00 74 00 75 00 76 00 77 00 Table 2. MPC5668x Signal Properties (continued) Description Port E GP esc_d Receive ems Channel Port E GP esc_e Transmit ems Channel Port E GP esc_e Receive ems Channel Port E GP esc_f Transmit ems Channel Port E GP esc_f Receive ems Channel Port E GP esc_g Transmit DSP_A Peripheral Chip Select Port E GP esc_g Receive DSP_A Peripheral Chip Select Port E GP esc_h Transmit DSP_B Peripheral Chip Select Port E GP esc_h Receive DSP_B Peripheral Chip Select Port E GP esc_j Transmit DSP_C Peripheral Chip Select Port E GP esc_j Receive DSP_C Peripheral Chip Select Freescale Semiconductor 15 PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE2 SH F3 F3 V DDE2 SH G3 G3 V DDE2 SH H3 H3 V DDE2 SH M2 M2 V DDE2 SH L2 L2 V DDE2 SH J4 J4 V DDE2 SH M4 M4 V DDE2 SH N3 N3 V DDE2 SH N4 N4 V DDE2 SH P4 P4 V DDE2 SH P5 P5 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PE14 PE15 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 16 Supported Functions 2 PE[14] SCL_A PCS_D[2] PE[15] SDA_A PCS_D[5] PF[0] SCK_A PF[1] SUT_A PF[2] SN_A PF[3] PCS_A[0] PCS_B[5] PCS_C[4] PF[4] SCK_B PCS_A[1] PCS_C[2] PF[5] SUT_B PCS_A[2] PCS_C[3] PF[6] SN_B PCS_A[3] PCS_C[5] PF[7] PCS_B[0] PCS_C[5] PCS_D[4] GP (PCR) Num 3 PA 4 78 00 79 00 80 00 81 00 82 00 83 00 84 00 85 00 86 00 87 00 Table 2. MPC5668x Signal Properties (continued) Description Port E GP 2 C_A Serial Clock DSP_D Peripheral Chip Select Port E GP 2 C_A Serial Data DSP_D Peripheral Chip Select Port F GP DSP_A Serial Clock Port F GP DSP_A Serial Data ut Port F GP DSP_A Serial Data n Port F (16) Port F GP DSP_A Peripheral Chip Select DSP_B Peripheral Chip Select DSP_C Peripheral Chip Select Port F GP DSP_B Serial Clock DSP_A Peripheral Chip Select DSP_C Peripheral Chip Select Port F GP DSP_B Serial Data ut DSP_A Peripheral Chip Select DSP_C Peripheral Chip Select Port F GP DSP_B Serial Data n DSP_A Peripheral Chip Select DSP_C Peripheral Chip Select Port F GP DSP_B Peripheral Chip Select DSP_C Peripheral Chip Select DSP_D Peripheral Chip Select Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE2 SH N7 N7 V DDE2 SH N6 N6 V DDE2 MH H2 H2 V DDE2 MH J1 J1 V DDE2 SH J2 J2 V DDE2 SH N2 N2 V DDE2 MH M1 M1 V DDE2 MH P2 P2 V DDE2 SH N1 N1 V DDE2 SH R2 R2 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PF8 PF9 PF PF PF12 PF13 PF14 PF15 PG0 PG1 Supported Functions 2 PF[8] SCK_C PF[9] SUT_C PF[] SN_C PF[] PCS_C[0] PCS_D[5] PCS_A[4] PF[12] SCK_D PF[13] SUT_D PF[14] SN_D PF[15] PCS_D[0] PCS_A[5] PCS_B[4] PG[0] PCS_A[4] PCS_B[3] AN[48] PG[1] PCS_A[5] PCS_B[4] AN[49] GP (PCR) Num 3 PA 4 88 00 89 00 90 00 91 00 92 00 93 00 94 00 95 00 96 00 97 00 Table 2. MPC5668x Signal Properties (continued) Description Port F GP DSP_C Serial Clock Port F GP DSP_C Serial Data ut Port F GP DSP_C Serial Data n Port F GP DSP_C Peripheral Chip Select DSP_D Peripheral Chip Select DSP_A Peripheral Chip Select Port F GP DSP_D Serial Clock Port F GP DSP_D Serial Data ut Port F GP DSP_D Serial Data n Port F GP DSP_D Peripheral Chip Select DSP_A Peripheral Chip Select DSP_B Peripheral Chip Select Port G (16) Port G GP DSP_A Peripheral Chip Select DSP_B Peripheral Chip Select ADC Analog nput Port G GP DSP_A Peripheral Chip Select DSP_B Peripheral Chip Select ADC Analog nput Freescale Semiconductor 17 PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE2 MH P1 P1 V DDE2 MH T2 T2 V DDE2 SH R1 R1 V DDE2 SH R3 R3 V DDE3 MH N14 N14 V DDE3 MH M14 M14 V DDE3 SH P14 P14 V DDE3 SH P13 P13 V DDE2 SHA B3 B3 V DDE2 SHA A3 A3 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG PG PG12 18 Supported Functions 2 PG[2] PCS_D[1] SCL_C AN[50] PG[3] PCS_D[2] SDA_C AN[51] PG[4] PCS_D[3] SCL_B AN[52] PG[5] PCS_D[4] SDA_B AN[53] PG[6] PCS_C[1] FEC_MDC AN[54] PG[7] PCS_C[2] FEC_MD AN[55] PG[8] ems[7] FEC_TX_CLK AN[56] PG[9] ems[6] FEC_CRS AN[57] PG[] ems[5] FEC_TX_ER AN[58] PG[] ems[4] FEC_RX_CLK AN[59] PG[12] ems[3] FEC_TXD[0] AN[60] GP (PCR) Num 3 PA 4 98 00 99 00 0 00 1 00 2 00 3 00 4 00 5 00 6 00 7 00 8 00 Table 2. MPC5668x Signal Properties (continued) Description Port G GP DSP_D Peripheral Chip Select 2 C_C Serial Clock ADC Analog nput Port G GP DSP_D Peripheral Chip Select 2 C_C Serial Data ADC Analog nput Port G GP DSP_D Peripheral Chip Select 2 C_B Serial Clock ADC Analog nput Port G GP DSP_D Peripheral Chip Select 2 C_C Serial Data ADC Analog nput Port G GP DSP_C Peripheral Chip Select Ethernet Mgmt. Data Clock ADC Analog nput Port G GP DSP_C Peripheral Chip Select Ethernet Mgmt. Data ADC Analog nput Port G GP ems Channel Ethernet Transmit Clock ADC Analog nput Port G GP ems Channel Ethernet Carrier Sense ADC Analog nput Port G GP ems Channel Ethernet Transmit Error ADC Analog nput Port G GP ems Channel Ethernet Receive Clock ADC Analog nput Port G GP ems Channel Ethernet Transmit Data ADC Analog nput Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE3 SHA H14 H14 V DDE3 SHA J14 J14 V DDE3 SHA K14 K14 V DDE3 SHA L14 L14 V DDE3 MHA H15 H15 V DDE3 MHA J15 J15 V DDE3 SHA K15 K15 V DDE3 SHA L15 L15 V DDE3 MHA M15 M15 V DDE3 SHA J16 J16 V DDE3 MHA K16 K16 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PG13 PG14 PG15 PH0 PH1 PH2 PH3 PH4 PH5 PH6 Supported Functions 2 PG[13] ems[2] FEC_TXD[1] AN[61] PG[14] ems[1] FEC_TXD[2] AN[62] PG[15] ems[0] FEC_TXD[3] AN[63] PH[0] ems[31] FEC_CL PH[1] ems[30] FEC_RX_DV PH[2] ems[29] FEC_TX_EN PH[3] ems[28] FEC_RX_ER PH[4] ems[27] FEC_RXD[0] PH[5] ems[26] FEC_RXD[1] PH[6] ems[25] FEC_RXD[2] GP (PCR) Num 3 PA 4 9 00 1 00 1 00 2 00 3 00 4 00 5 00 6 00 7 00 8 00 Table 2. MPC5668x Signal Properties (continued) Description Port G GP ems Channel Ethernet Transmit Data ADC Analog nput Port G GP ems Channel Ethernet Transmit Data ADC Analog nput Port G GP ems Channel Ethernet Transmit Data ADC Analog nput Port H GP ems Channel Ethernet Collision Port H (16) Port H GP ems Channel Ethernet Receive Data Valid Port H GP ems Channel Ethernet Transmit Enable Port H GP ems Channel Ethernet Receive Error Port H GP ems Channel Ethernet Receive Data Port H GP ems Channel Ethernet Receive Data Port H GP ems Channel Ethernet Receive Data Freescale Semiconductor 19 PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE3 MHA L16 L16 V DDE3 MHA M16 M16 V DDE3 MHA N16 N16 V DDE3 SH T14 T14 V DDE3 SH P16 P16 V DDE3 MH R16 R16 V DDE3 SH N15 N15 V DDE3 SH P15 P15 V DDE3 SH R14 R14 V DDE3 SH R15 R15 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PH7 PH8 PH9 PH PH PH12 PH13 PH14 PH15 PJ0 20 Supported Functions 2 PH[7] ems[24] FEC_RXD[3] PH[8] ems[23] PH[9] ems[22] PH[] ems[21] PH[] ems[20] PH[12] ems[19] PH[13] ems[18] PH[14] ems[17] PH[15] ems[16] PJ[0] ems[15] PCS_A[4] GP (PCR) Num 3 PA 4 9 00 120 00 121 00 122 00 123 00 124 00 125 00 126 00 127 00 128 00 Table 2. MPC5668x Signal Properties (continued) Description Port H GP ems Channel Ethernet Receive Data Port H GP ems Channel Port H GP ems Channel Port H GP ems Channel Port H GP ems Channel Port H GP ems Channel Port H GP ems Channel Port H GP ems Channel Port H GP ems Channel Port J (16) Port J GP ems Channel DSP_A Peripheral Chip Select Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE3 SH T15 T15 V DDE4 SH P7 P7 V DDE4 SH N8 N8 V DDE4 SH P8 P8 V DDE4 SH N9 N9 V DDE4 SH P9 P9 V DDE4 SH P P V DDE4 SH P P V DDE4 SH N N V DDE4 SH R7 R7 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PJ1 PJ2 PJ3 PJ4 PJ5 PJ6 PJ7 PJ8 PJ9 PJ PJ Supported Functions 2 PJ[1] ems[14] PCS_A[5] PJ[2] ems[13] PCS_B[1] PJ[3] ems[12] PCS_B[2] PJ[4] ems[] PCS_C[3] PJ[5] ems[] PCS_C[4] PJ[6] ems[09] PCS_D[5] PJ[7] ems[08] PCS_D[1] PJ[8] ems[07] PJ[9] ems[06] PJ[] ems[05] PJ[] ems[04] GP (PCR) Num 3 PA 4 129 00 130 00 131 00 132 00 133 00 134 00 135 00 136 00 137 00 138 00 139 00 Table 2. MPC5668x Signal Properties (continued) Description Port J GP ems Channel DSP_A Peripheral Chip Select Port J GP ems Channel DSP_B Peripheral Chip Select Port J GP ems Channel DSP_B Peripheral Chip Select Port J GP ems Channel DSP_C Peripheral Chip Select Port J GP ems Channel DSP_C Peripheral Chip Select Port J GP ems Channel DSP_D Peripheral Chip Select Port J GP ems Channel DSP_D Peripheral Chip Select Port J GP ems Channel Port J GP ems Channel Port J GP ems Channel Port J GP ems Channel Freescale Semiconductor 21 PreliminarySubject to Change Without Notice Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE4 SH T7 T7 V DDE4 SH R8 R8 V DDE4 SH T8 T8 V DDE4 SH R9 R9 V DDE4 SH T9 T9 V DDE4 SH R R V DDE4 SH T T V DDE4 SH T T V DDE4 SH R R V DDE4 SH N12 N12 V DDE4 SH P12 P12 Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PJ12 PJ13 PJ14 PJ15 PK0 PK1 PK2 PK3 PK4 PK5 22 Supported Functions 2 PJ[12] ems[03] PJ[13] ems[02] PJ[14] ems[] PJ[15] ems[00] PK[0] MLBCLK SCK_B CLKUT PK[1] MLBSG SUT_B PCS_D[4] PK[2] MLBDAT SN_B PCS_D[5] PK[3] FR_A_RX MA[0] PCS_C[1] PK[4] FR_A_TX MA[1] PCS_C[2] PK[5] FR_A_TX_EN MA[2] PCS_C[3] GP (PCR) Num 3 PA 4 140 00 141 00 142 00 143 00 144 00 145 00 146 00 147 00 148 00 149 00 Table 2. MPC5668x Signal Properties (continued) Description Port J GP ems Channel Port J GP ems Channel Port J GP ems Channel Port J GP ems Channel Port K GP Media Local Bus Clock DSP_B Serial Clock CLKUT (Test nly) Port K () Port K GP Media Local Bus Signal DSP_B Serial Data ut DSP_D Peripheral Chip Select Port K GP Media Local Bus Data DSP_B Serial Data n DSP_D Peripheral Chip Select Port K GP FlexRay A Receive Data ADC Ext. Mux Address Select DSP_C Peripheral Chip Select Port K GP FlexRay A Transmit Data ADC Ext. Mux Address Select DSP_C Peripheral Chip Select Port K GP FlexRay A Transmit Enable ADC Ext. Mux Address Select DSP_C Peripheral Chip Select Type Voltage PreliminarySubject to Change Without Notice Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA V DDE4 SH R12 R12 V DDE4 SH T12 T12 V DDE4 SH R13 R13 V DDE4 SH T13 T13 V DDEMLB F L1 L1 V DDEMLB F K1 K1 V DDEMLB F K2 K2 V DDE2 SH T3 T3 V DDE2 MH R4 R4 V DDE2 MH T4 T4 Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 PK6 PK7 PK8 PK9 PK Supported Functions 2 PK[6] FR_B_RX PCS_B[1] PCS_C[4] PK[7] FR_B_TX PCS_B[2] PCS_C[5] PK[8] FR_B_TX_EN PCS_B[3] PCS_A[1] PK[9] CLKUT PCS_D[1] PCS_A[2] BTCFG PK[] PCS_B[5] PCS_D[2] PCS_A[3] GP (PCR) Num 3 PA 4 150 00 151 00 152 00 153 00 154 00 Table 2. MPC5668x Signal Properties (continued) Description Port K GP FlexRay B Receive Data DSP_B Peripheral Chip Select DSP_C Peripheral Chip Select Port K GP FlexRay B Transmit Data DSP_B Peripheral Chip Select DSP_C Peripheral Chip Select Port K GP FlexRay B Transmit Enable DSP_B Peripheral Chip Select DSP_A Peripheral Chip Select Port K GP CLKUT (User mode) DSP_D Peripheral Chip Select DSP_A Peripheral Chip Select Boot Configuration Port K GP DSP_B Peripheral Chip Select DSP_D Peripheral Chip Select DSP_A Peripheral Chip Select Nexus Pins (17) Freescale Semiconductor 23 PreliminarySubject to Change Without Notice V DDE2 SH R5 R5 V DDE2 MH T5 T5 V DDE2 MH R6 R6 V DDE2 MH BT CFG (Pulldown) GP T6 T6 V DDE2 SH P6 P6 EVT EVT Nexus Event n V DDENEX F M EVT EVT Nexus Event ut V DDENEX F M12 MSE0 MSE[0] Nexus Message Start/End ut V DDENEX F M9 MSE1 MSE[1] Nexus Message Start/End ut V DDENEX F M8 MCK MCK Nexus Message Clock ut V DDENEX F M MD0 MD[0] Nexus Message Data ut V DDENEX F E5 MD1 MD[1] Nexus Message Data ut V DDENEX F F5 MD2 MD[2] Nexus Message Data ut V DDENEX F G5 MD3 MD[3] Nexus Message Data ut V DDENEX F H5 MD4 MD[4] Nexus Message Data ut V DDENEX F H6 MD5 MD[5] Nexus Message Data ut V DDENEX F J6 MD6 MD[6] Nexus Message Data ut V DDENEX F J5 MD7 MD[7] Nexus Message Data ut V DDENEX F K5 MD8 MD[8] Nexus Message Data ut V DDENEX F L5 MD9 MD[9] Nexus Message Data ut V DDENEX F M5 MD MD[] Nexus Message Data ut V DDENEX F M6 Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments Pin Name 1 MD MD[] Nexus Message Data ut V DDENEX F M7 EXTAL 24 Supported Functions 2 EXTAL EXTCLK GP (PCR) Num 3 PA 4 Table 2. MPC5668x Signal Properties (continued) Description Miscellaneous Pins (9) Main Crystal scillator nput External Clock nput PreliminarySubject to Change Without Notice V DDSYN A EXTAL A14 A14 XTAL XTAL Main Crystal scillator utput V DDSYN A XTAL A13 A13 TD TD JTAG Test Data nput V DDE2 SH TD (Pull Up) J3 J3 TD TD JTAG Test Data utput V DDE2 MH TD (Pull Up 8 ) M3 M3 TMS TMS JTAG Test Mode Select nput V DDE2 MH TMS (Pull Up) L3 L3 TCK TCK JTAG Test Clock nput V DDE2 SH TCK (Pull Down) P3 P3 JCMP JCMP JTAG Compliancy V DDE2 SH JCMP (Pull Down) K3 K3 TEST TEST Test Mode Select V DDE3 H TEST 9 M13 M13 RESET RESET External Reset V DDE1 MH RESET (Pull Up) A A 1 The primary signal name is used as the pin label on the BGA map for identification purposes. 2 Each line in the Signal Name column corresponds to a separate signal function on the pin. For all device pins, the primary, alternate, or GP signal functions are designated in the PA field of the System ntegration Unit (SU) PCR registers except where explicitly noted. 3 The GP number is the same as the corresponding pad configuration register (SU_PCRn) number. 4 The PA bitfield in the SU_PCRn register selects the signal function for the pin. A dash in the Description field of this table indicates that this value for PC is reserved on this pin, and should not be used. 5 The pad type is indicated by one or more of the following abbreviations: A analog, Ffast speed, H high voltage, input-only, M medium speed, S slow speed. For example, pad type SH designates a slow high-voltage pad. 6 The Status During Reset pin is sampled after the internal PR is negated. Prior to exiting PR, the signal has a high impedance. The terminology used in this column is: output, input, Up weak pull up enabled, Down weak pulldown enabled, Low output driven low, High output driven high. A dash on the left side of the slash denotes that both the input and output buffers for the pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down enabled on the pin. The signal name to the left or right of the slash indicates the pin is enabled. 7 The Function After Reset of a GP function is general purpose input. A dash on the left side of the slash denotes that both the input and output buffers for the pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down enabled on the pin. 8 Pullup is enabled only when JCMP is negated. 9 Tie to V SS for normal operation. Type Voltage Pad Type 5 During Reset 6 Status After 208 Reset 7 BGA Package Pin Locations 256 BGA Freescale Semiconductor Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

Pin Assignments 3.3.1 Power and Ground Supply Summary Pin Name Function Description Voltage 1 Table 3. MPC5668x Power/Ground 1 Nominal voltages. 2 Dedicated Nexus power pin on 256-pin package only. n the 208-pin package, VDDENEX is tied to VSS internal to the package substrate and is not available externally. 3 Base current to external NPN power transistor. Voltage may vary. Package Pin Locations 208 256 V DD nternal Logic Power 1.2 V D4, D, H4, G13, K13, N5 D4, D, H4, G13, K13, N5 V DDE1 External Power 3.3 5.0 V D6 D6 V DDE2 L4 L4 V DDE3 J13 J13 V DDE4 N N V DDA Analog Power 3.3 5.0 V B15 B15 V DD33 3.3 V Power 3.3 V L13 L13 V DDEMLB Media Local Bus Power 2.5 or 3.3 V K4 K4 2 V DDENEX Nexus Power 3.3 V E6, K, L7 V RCSEL Voltage Regulator Select V SSA / V DDA H13 H13 V RC Voltage Regulator Control Voltage 3.3 5.0 V B B V RCCTL Voltage Regulator Control utput 3 B B V DDSYN Clock Synthesizer Power 3.3 V A12 A12 V RH Analog High Voltage Reference 3.3 5.0 V B16 B16 V RL Analog Low Voltage Reference 0 V C16 C16 V SS Ground 0 V A1, A16, D7, G4, G[7:], H[7:], J[7:], K[7:], N13, T1, T16 A1, A16, D7, E[7:12], F[7:12], G4, G[6:12], H[7:12], J[7:12], K[6:], K12, L[8:], L12, N13, T1, T16 V SSA Analog Ground 0 V C15 C15 V SSSYN Clock Synthesizer Ground 0 V A15 A15 Freescale Semiconductor 25 PreliminarySubject to Change Without Notice Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages

4 Electrical Characteristics This section contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC5668x. NTE The electrical specifications are preliminary and are from previous designs or design simulations. These specifications may not be fully tested or guaranteed at this early stage of the product life cycle, however for production silicon the finalized specifications will be met. Finalized specifications will be published after complete characterization and device qualifications have been completed. 4.1 Maximum Ratings Table 4. Absolute Maximum Ratings 1 Spec Characteristic Symbol Min Max 2 Unit 1 1.2 V Core Supply Voltage V DD 0.3 1.32 3 V 2 3.3 V Clock Synthesizer Voltage V DDSYN 0.3 3.6 V 3 3.3 V Buffer Voltage V DD33 0.3 3.6 V 4 3.3 5.0 V Voltage Regulator Control Voltage V RC 0.3 5.5 V 5 3.3 5.0 V Analog Supply Voltage (reference to V SSA ) V DDA 0.3 5.5 V 6 3.3 5.0 V External Supply Voltage 4 V DDE1 5 V 5 DDE2 V 5 DDE3 5 V DDE4 7 2.5 3.3 V External Supply Voltage (MLB) 5 V DDEMLB 0.3 0.3 0.3 0.3 5.5 5.5 5.5 5.5 V 0.3 3.6 V 8 3.3 V External Supply Voltage (Nexus) V DDENEX 5 0.3 3.6 V 9 DC nput Voltage 6 V DDE1, V DDE2, V DDE3, V DDE4 V DDEMLB, V DDENEX V N 1.0 7 V DDEx + 0.3 V 8 1.0 6 V DDEx + 0.3 V 7 Analog Reference High Voltage V RH 0.3 Minimum of 5.5 or V DDA +0.3 Analog Reference Low Voltage V RL 0.3 5.5 V 12 V SS to V SSA Differential Voltage V SS V SSA 0 0 mv 13 V SS to V SSSYN Differential Voltage V SS V SSSYN 0 0 mv 14 Maximum DC Digital nput Current 9 (per pin, applies to all digital F, MH, SH, and H pins) 15 Maximum DC Analog nput Current (per pin, applies to all analog AE and A pins) MAXD 2 2 ma MAXA 3 3 ma 16 Storage Temperature Range T STG 55.0 150.0 17 Maximum Solder Temperature T SDR 235.0 o C 18 Moisture Sensitivity Level 12 MSL 3 V V o C Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages 26 PreliminarySubject to Change Without Notice Freescale Semiconductor

1 Functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima may affect device reliability or cause permanent damage to the device. 2 Absolute maximum specifications for device stress have not yet been determined. 3 2.0 V for hours cumulative time, 1.2 V +% for time remaining. 4 All functional non-supply pins are clamped to V SS and V DDEx. 5 V DDEx are separate power segments and may be powered independently with no differential voltage constraints between the power segments. 6 AC signal over and undershoot of the input voltages of up to ±2.0 V is permitted for a cumulative duration of 60 hours over the complete lifetime of the device (injection current does not need to be limited for this duration). 7 nternal structures will hold the input voltage above 1.0 V if the injection current limit of 2 ma is met. 8 nternal structures hold the input voltage below this maximum voltage on all pads powered by V DDE supplies, if the maximum injection current specification is met (25 ma for all pins) and V DDE is within perating Voltage specifications. 9 Total injection current for all pins (including both digital and analog) must not exceed 25 ma. Total injection current for all analog input pins must not exceed 15 ma. Solder profile per CDF-AEC-Q0. 12 Moisture sensitivity per JEDEC test method A2. 4.2 Thermal Characteristics Table 5. Thermal Characteristics Spec Characteristic Symbol Unit 1 Junction to Ambient 1, 2 Natural Convection (Single layer board) 2 Junction to Ambient 1, 3 Natural Convection (Four layer board 2s2p) 3 Junction to Ambient 1, 3 (@200 ft./min., Single layer board) 4 Junction to Ambient 1, 3 (@200 ft./min., Four layer board 2s2p) 5 Junction to Board 4 Freescale Semiconductor 27 PreliminarySubject to Change Without Notice Value 208 MAPBGA 256 MAPBGA R θja C/W 39 39 R θja C/W 24 24 R θjma C/W 31 31 R θjma C/W 20 20 R θjb C/W 13 13 6 Junction to Case 5 R θjc C/W 6 6 7 Junction to Package Top 6 Ψ JT C/W 2 2 Natural Convection 1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2 Per SEM G38-87 and JEDEC JESD51-2 with the single layer board horizontal. 3 Per JEDEC JESD51-6 with the board horizontal. 4 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package. 5 ndicates the average thermal resistance between the die and the case top surface as measured by the cold plate method (ML SPEC-883 Method 12.1) with the cold plate temperature used for the case temperature. 6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. Because of an order from the United States nternational Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 20: MPC5668x products in 208 and 256 MAPBGA packages