Testing Power Factor Correction Circuits For Stability

Similar documents
New Techniques for Testing Power Factor Correction Circuits

Practical Testing Techniques For Modern Control Loops

Testing and Stabilizing Feedback Loops in Today s Power Supplies

Testing Power Sources for Stability

Minimizing Input Filter Requirements In Military Power Supply Designs

Specify Gain and Phase Margins on All Your Loops

Op Amp Booster Designs

Using the EVM: PFC Design Tips and Techniques

Improving the Power Factor of Isolated Flyback Converters for Residential ENERGY STAR LED Luminaire Power Supplies

UNITRODE CORPORATION APPLICATION NOTE THE UC3902 LOAD SHARE CONTROLLER AND ITS PERFORMANCE IN DISTRIBUTED POWER SYSTEMS by Laszlo Balogh Unitrode Corp

CMOS Inverter & Ring Oscillator

ME 365 EXPERIMENT 7 SIGNAL CONDITIONING AND LOADING

Experiment 1: Instrument Familiarization (8/28/06)

Laboratory 6. Lab 6. Operational Amplifier Circuits. Required Components: op amp 2 1k resistor 4 10k resistors 1 100k resistor 1 0.

ELC224 Final Review (12/10/2009) Name:

Using an automated Excel spreadsheet to compensate a flyback converter operated in current-mode. Christophe Basso, David Sabatié

DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE MASSACHUSETTS INSTITUTE OF TECHNOLOGY CAMBRIDGE, MASSACHUSETTS 02139

EE 368 Electronics Lab. Experiment 10 Operational Amplifier Applications (2)

Figure 1: Closed Loop System

10: AMPLIFIERS. Circuit Connections in the Laboratory. Op-Amp. I. Introduction

Advanced Regulating Pulse Width Modulators

Experiment 1: Instrument Familiarization

Power Factor Pre-regulator Using Constant Tolerance Band Control Scheme

3 Circuit Theory. 3.2 Balanced Gain Stage (BGS) Input to the amplifier is balanced. The shield is isolated

Chapter 10 Switching DC Power Supplies

ECE4902 C Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load

Inverting input R 2. R 1 Output

TL082 Wide Bandwidth Dual JFET Input Operational Amplifier

Lab 4: Analysis of the Stereo Amplifier

662 Switching Power Supply Design

Lecture 4 ECEN 4517/5517

THE K FACTOR: A NEW MATHEMATICAL TOOL FOR STABILITY ANALYSIS AND SYNTHESIS

A Simple Notch Type Harmonic Distortion Analyzer

Single Supply, Rail to Rail Low Power FET-Input Op Amp AD820

DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE MASSACHUSETTS INSTITUTE OF TECHNOLOGY CAMBRIDGE, MASSACHUSETTS 02139

OPERATIONAL AMPLIFIER PREPARED BY, PROF. CHIRAG H. RAVAL ASSISTANT PROFESSOR NIRMA UNIVRSITY

Measurement and Analysis for Switchmode Power Design

Physics 120 Lab 6 (2018) - Field Effect Transistors: Ohmic Region

ECE3204 D2015 Lab 1. See suggested breadboard configuration on following page!

The measurement of loop gain in feedback seismometers Brett M. Nordgren April 9, 1999 Rev.

CS101. Conducted Susceptibility CS101. CS101 Maximum Current. CS101 Limits. Basis For CS101 Limits. Comparison To MIL-STD Vdc or Less

Designer Series XV. by Dr. Ray Ridley

DLVP A OPERATOR S MANUAL

LF353 Wide Bandwidth Dual JFET Input Operational Amplifier

AN increasing number of video and communication applications

Laboratory 9. Required Components: Objectives. Optional Components: Operational Amplifier Circuits (modified from lab text by Alciatore)

High Current, High Power OPERATIONAL AMPLIFIER

BLOCK DIAGRAM OF THE UC3625

An Electronic Watt-Watt-Hour Meter

PURPOSE: NOTE: Be sure to record ALL results in your laboratory notebook.

High Performance ZVS Buck Regulator Removes Barriers To Increased Power Throughput In Wide Input Range Point-Of-Load Applications

Advanced Regulating Pulse Width Modulators

Week 8 AM Modulation and the AM Receiver

6. HARDWARE PROTOTYPE AND EXPERIMENTAL RESULTS

Operational Amplifiers

Features MIC2193BM. Si9803 ( 2) 6.3V ( 2) VDD OUTP COMP OUTN. Si9804 ( 2) Adjustable Output Synchronous Buck Converter

Application Notes High Performance Audio Amplifiers

AVERAGE CURRENT MODE CONTROL IN POWER ELECTRONIC CONVERTERS ANALOG VERSUS DIGITAL. K. D. Purton * and R. P. Lisner**

Verification of competency for ELTR courses

EQUIVALENT EQUIPMENT CIRCUITS

Lecture 8 ECEN 4517/5517

Low Cost, General Purpose High Speed JFET Amplifier AD825

Hot Swap Controller Enables Standard Power Supplies to Share Load

TL082 Wide Bandwidth Dual JFET Input Operational Amplifier

e-issn: p-issn:

Operational Amplifier as A Black Box

Input Stage Concerns. APPLICATION NOTE 656 Design Trade-Offs for Single-Supply Op Amps

An active filter offers the following advantages over a passive filter:

R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder

High Speed BUFFER AMPLIFIER

Experiment 8 Frequency Response

GATE: Electronics MCQs (Practice Test 1 of 13)

LF411 Low Offset, Low Drift JFET Input Operational Amplifier

CHAPTER IV DESIGN AND ANALYSIS OF VARIOUS PWM TECHNIQUES FOR BUCK BOOST CONVERTER

PowerAmp Design. PowerAmp Design PAD541 COMPACT POWER OP AMP

Current-mode PWM controller

Fast IC Power Transistor with Thermal Protection

11. Chapter: Amplitude stabilization of the harmonic oscillator

Constant Current Control for DC-DC Converters

When input, output and feedback voltages are all symmetric bipolar signals with respect to ground, no biasing is required.

High Power Monolithic OPERATIONAL AMPLIFIER

PowerAmp Design. PowerAmp Design PAD112 HIGH VOLTAGE OPERATIONAL AMPLIFIER

1) Consider the circuit shown in figure below. Compute the output waveform for an input of 5kHz

For the filter shown (suitable for bandpass audio use) with bandwidth B and center frequency f, and gain A:

EK307 Active Filters and Steady State Frequency Response

EXPERIMENT 5 : THE DIODE

BUCK Converter Control Cookbook

Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc.

Dual FET-Input, Low Distortion OPERATIONAL AMPLIFIER

Current Rebuilding Concept Applied to Boost CCM for PF Correction

Combo Hot Swap/Load Share Controller Allows the Use of Standard Power Modules in Redundant Power Systems

The Pearl II Phono Stage. By Wayne Colburn. Introduction

CHARACTERIZATION OF OP-AMP

EE 233 Circuit Theory Lab 3: First-Order Filters

2.0 AC CIRCUITS 2.1 AC VOLTAGE AND CURRENT CALCULATIONS. ECE 4501 Power Systems Laboratory Manual Rev OBJECTIVE

EE 501 Lab 10 Output Amplifier Due: December 10th, 2015

DESIGN AND ANALYSIS OF FEEDBACK CONTROLLERS FOR A DC BUCK-BOOST CONVERTER

High Power Monolithic OPERATIONAL AMPLIFIER

OBSOLETE. Parameter AD9621 AD9622 AD9623 AD9624 Units

1. An engineer measures the (step response) rise time of an amplifier as. Estimate the 3-dB bandwidth of the amplifier. (2 points)

Transcription:

Keywords Venable, frequency response analyzer, impedance, injection transformer, oscillator, feedback loop, Bode Plot, power supply design, switching power supply, PFC, boost converter, flyback converter, voltage loop, injection resistor, voltmeter APPLICATION NOTE: Testing Power Factor Correction Circuits For Stability Abstract: Power factor correction has become an increasingly necessary feature in new power supply designs. In a power factor correction circuit there are two feedback control loops. One loop operates by using the input voltage as a reference to control the input current. This loop is fast and makes the input current instantaneously proportional to input voltage as it would be with a resistive load. A second loop, which is much slower, controls the constant of proportionality to make the average current correct to keep the output voltage of the power factor correction circuit constant. Testing the slow loop for stability is easy with the proper equipment, but testing the faster loop is much more difficult. The operating point of the faster loop is dynamically changing from near zero to the peak value of the input current. This paper discusses the techniques necessary to measure the stability of each of these loops and specifies necessary equipment and procedures to perform these tests. Introduction What is power factor correction, and why is it necessary? Figure 1. Capacitive Input Line Filter Most switching power supplies operate from a 50 or 60 Hertz AC line with a capacitive input filter, as shown in Figure 1. This type of filter draws current from the line only when the line voltage exceeds the filter capacitor voltage, and the filter capacitor is charged to near the peak level of the input line voltage as shown in Figure 2. This means that the input current only flows for a short period near the peak of the input voltage waveform, causing the current to flow as a series of short, narrow pulses rather that the smooth, sinusoidal current that would result from a resistive load. 1

Figure 2. Input current with capacitive filter. The root-mean-square (rms) value of this series of current pulses is much higher than the average value. The output power is approximately proportional to the average value of the current, but the rms value determines line losses, fuse ratings, and similar power quality related issues. Improving the power factor brings three benefits: 1. Power distribution costs for the electric company are reduced, making the power company much happier. A side benefit is to reduce the tendency of the current peaks to "flatten" the tops of the input voltage sinusoidal waveform as shown in Figure 3. 2. More power can be drawn from a line of a given current rating, allowing more powerful equipment to be connected without having to re-wire a building, saving time and money. 3. Various governmental and quasi-governmental agencies are passing laws requiring improved power factors on certain types of equipment, especially those which draw a lot of power. These laws make it illegal to sell certain types of equipment without testing and certification of a minimum power factor. To continue to sell medium-tohigh power supplies in the future, power supply manufacturers will have to deal withpower factor correction. Although the first reason is nice and the second reason saves money, it is the third reason that has given all the impetus to power factor correction development. 2

Figure 3. Effect of line IR drop on voltage waveform. How Does PFC Work? The goal of power factor correction is to make input current look like input voltage on a moment-bymoment basis, the same as it would with a resistive load. Figure 4 shows line voltage and line current with and without power factor correction. There are two ways of correcting power factor, passive and active. Figure 4. Effect of PFC on line current. The passive approach uses filters to eliminate harmonic currents and phase-shifting inductors or capacitors to bring the current into phase with the voltage. The passive approach is large, heavy, and expensive, and therefore is not popular with equipment manufacturers. Active power factor correction uses switching regulator technology to draw current from the power line proportional to input voltage. This is accomplished with a fast feedback loop that uses input voltage as a reference to control input current. The output of a power factor correction circuit is usually a fixed DC voltage. A second, slow feedback loop senses the value of the output voltage and uses this voltage to change the constant of proportionality between input voltage and input current so that the 3

average current is right for the load drawn from the output of the circuit. This loop keeps the output voltage constant. This means that in general there is a multiplier in the reference for the fast loop. The Unitrode UC3854 also has a divider whose function is to keep the voltage error amplifier operating point constant with changing input voltage. Variety of Topologies Any topology of switching regulator can be used, since the only requirement is to close a fast current loop around the input current and make it look like input voltage. The most popular topology seems to be the boost converter, since the input current flows through an inductor and is relative smooth and easy to control and also easy to measure with a resistor in the power return. Another popular approach, especially at lower power levels, is the flyback, converter. This approach allows isolation and output voltage amplitude scaling as part of the power factor correction process. Figure 5 shows three possible topologies. Figure 5. Various possible circuit topologies for power factor correction. Variety of IC Vendors Because of the popularity of power factor correction, a number of companies now manufacture power factor correction integrated circuits. These include: Cherry Semiconductor Corp. IXYS Corp. Linear Technology Corp. Micro Linear Corp. Motorola, Inc. (Tempe, AZ) Unitrode Corp. The Unitrode UC3854 family is typical and will be used for the examples in this paper. This chip uses boost topology. Figure 6 is from the Unitrode data sheet and shows the UC3854 connected in a typical 250-watt power factor corrected pre-regulator. 4

Figure 6. Schematic of 250 watt pre-regulator from Unitrode data sheet. Current Loop Figure 7 shows the UC3854 pre-regulator circuit re-drawn to emphasize the loops and signal paths. The current loop in a Unitrode UC3854 regulates the voltage across the 0.25-ohm current sense resistor in exactly the same manner as a conventional voltage-mode converter. There is an error amplifier to compare the actual current level to a reference (which happens to be dynamic, i.e., changing with time), and then the error amplifier output (pin 3) is compared to a fixed-amplitude ramp (pin 14) to generate a pulse width modulated waveform to drive the power transistor (pin 16). Unfortunately, the power section inverts the signal at DC, requiring a noninverting op-amp in this particular chip design. Non-inverting op-amps do not have the flexibility of inverting op-amps since the gain can never fall below one. The reference comes from the circuit that multiplies the output error voltage by the absolute value of the instantaneous line voltage. The reference takes the form of a current that is injected into the non-inverting input of the current error amplifier (pin 5). The bandwidth of this particular loop needs to be quite high, since the objective is to accurately follow a rectified 100 or 120 Hertz sine wave with minimal amplitude or phase distortion. 5

Figure 7. Simplified schematic of pre-regulator showing signal paths and loops. Voltage Loop The voltage loop is necessary to accommodate changing line and load conditions. It needs to be a slow loop with approximately a 10-Hertz bandwidth. The bandwidth of this loop is critical, since too slow a loop with result in large output voltage transients with changing line and load conditions, and too fast a loop will interfere with and distort the fast current loop and change the input current wave shape so that it is no longer sinusoidal and does not match the input voltage wave shape. With the UC3854, Unitrode has chosen to limit the low-frequency gain of the voltage error amplifier to a relatively low value. This would normally make the output voltage regulation quite poor, but Unitrode has built in an open loop compensation circuit (the X2 circuit between pin 8 of the chip and input C of the multiplier-divider), which senses the average value of the input voltage and uses this signal to change the gain of the multiplier stage. From a first-order standpoint the operating point of the voltage error amplifier (the voltage on pin 7) does not have to change. This allows the voltage error amplifier to maintain reasonable output voltage regulation in spite of its low gain. Testing the Voltage Loop The voltage loop in a power factor correction circuit is the loop that keeps the output of the circuit at a constant voltage. In boost topology converters operating from 120 or 240 volts AC, this voltage is usually 400 volts DC The principle of feedback loop measurements is to: 1. Find a place in the loop where the signal is confined to a single path and where the source is a low impedance and the load is a high impedance. In the voltage loop of the UC3854, this is the point where the output voltage connects to the 499K resistor at the top of the resistive voltage divider string that connects to Vsense, pin 11 of the UC3854. 6

2. Place an injection resistor in series with the loop at this point. The resistor value should be much, much smaller than the input impedance of the circuit. In the case of the voltage loop of a UC3854, 1000 ohms is an appropriate value, since it is much, much smallerthan 499K. 3. Connect a floating sinusoidal oscillator across the injection resistor, turning the resistor into a floating, sinusoidal error voltage in series with the loop. This oscillator is normally the output of the frequency response analyzer used to perform the test. Use an injection transformer to block the 400 volt common mode voltage. 4. Connect a frequency selective voltmeter (normally the inputs of the frequency response analyzer) from each side of the injection resistor to ground. The voltmeter should read voltage at the frequency of the injection oscillator, rejecting all other frequencies and noise. Use a capacitor to block the DC voltage or use 10:1 oscilloscope probes to avoid exceeding the normal mode signal range of the voltmeter (instrument inputs). 5. Sweep the injection oscillator across the frequency band of interest, typically 0.1 to 1000 Hz. Measure the amplitude and phase relative to the oscillator of the voltage to ground from each side of the injection point at each frequency. 6. Divide the input voltage (the point where the 1000 ohm injection resistor connects to the 499K resistor at the top of the divider string) by the output voltage (the 400 volt bus), and plot the ratio of these two voltages as a function of frequency for both amplitude and phase. This produces a Bode plot of the open loop gain versus frequency of the feedback loop. All of the above functions are performed automatically with measurement systems such as the Venable Industries Model 350 Frequency Response Analysis System. The voltage loop should be tailored by adjusting the value of the compensation components around the voltage error amplifier (the 0.047 µf capacitor and 240K resistor) connected between pins 7 and 11 of a UC3854. A good value of loop crossover frequency is 10 Hz and a good value of phase margin is 60. This is fast enough to maintain reasonable transient response, yet slow enough to not distort the current regulating loop significantly. Distortion of the current regulating loop causes reduced power factor and increased harmonic content in the input current. Testing the Current Loop The current loop is more difficult to test than the voltage loop because it is dynamic, i.e., it changes from essentially zero current to the peak value of current 100 or 120 times a second. If conventional measuring techniques are used, the result is an average of all the transfer functions from very low current to very high current. Loop stability may appear satisfactory, but the current loop may still oscillate near zero current or near the peak current even though the average of all the Bode plots shows a stable condition. In order to accurately test the current loop, the operating point must be "frozen" by using DC power supplies to simulate the correct bias conditions for an instantaneous point in time and then measuring 7

the stability of the current loop at that point. This test must be done at least at low current and high current. It is a good idea to test the stability at a medium current also to assure that the extremes have been bracketed. "Freezing" the operating point of the UC3854, means that you have to: 1. Connect a variable DC power supply to the input to the power factor correction circuit (across the output of the main bridge rectifier). The input of the circuit is of course not connected to the AC line. The supply has to be able to put out as much voltage and current as the peak of the line voltage. Leave the sense divider (the 620Kresistor into Iac, pin 6 of the UC3854) in place. 2. Connect an 18-volt DC source to power the UC3854 (from pin 15 to pin 1). This supply may not be necessary if the bias winding across the main energy storage inductor is still sufficient to power the chip at low input voltage. 3. Connect pin 7 of the UC3854 to pin 11. This will fix the output of the voltage error amplifier (input A of the multiplier-divider) at 7.5 volts. It is not necessary to disconnect the compensation components already connected to these pins. 4. Connect a 0-10 volt DC variable power supply to pin 8, the Vrms terminal of the UC3854. It is not necessary to disconnect the components connected to this terminal except it may be necessary to add a small pre-load to the power supply if it has no ability to sink current. The purpose of this supply is to adjust the gain of the multiplier-divider circuit to adjust the circuit output current for the proper value given the input voltage. Once set, this voltage will not change between low line and high line. The current feedback loop should track the input voltage and supply thecorrect current proportional to voltage. 5. Connect a load across the output of the power factor correction circuit. This load can take the form of a 400-volt shunt regulator or a resistive load connected to a 400-volt power supply. The resistive load should draw 1.4 times the normal output current to allow for testing at the peak value of the output. Similarly, the shunt regulator must be rated for 1.4 times the maximum DC output current of the circuit. All other connections to the circuit can remain. As before, you have to measure the loop. The steps to do this are: 1. Find a place in the loop where the signal is confined to a single path and where the source is a low impedance and the load is a high impedance. In the current loop of the UC3854, this is the point where the 0.025-ohm current sense resistor connects to the 4K resistor that connects to MULT OUT, pin 5 of the UC3854. 8

2. Place an injection resistor in series with the loop at this point. The resistor value should be much, much smaller than the input impedance of the circuit. In the case of the current loop of a UC3854, 100 ohms is an appropriate value and is much, much smaller than 4000 ohms. 3. Connect a floating sinusoidal oscillator across the 100-ohm injection resistor, turning the resistor into a floating, sinusoidal error voltage in series with the loop. In this case the voltage at the injection point is just a few volts and there are no special precautions for connecting there except that the source must be floating. Use of an injection transformer such as the Venable Industries Model 200-002 will satisfy the floating requirement and also minimize the capacitive coupling to ground. 4. Connect a frequency selective voltmeter (again, the inputs of the frequency response analyzer) from each side of the 100-ohm injection resistor to ground. A point near pin 1 of the UC3854 is the best place to pick up ground. The voltmeters should read voltage at the frequency of the injection oscillator, rejecting all other frequencies and noise. Again, the voltages are low and no special precautions are required to protect the equipment except that ground should really be at or near building ground, not a floating signal merely called "ground". This is normally not a problem when the circuit is powered from a conventional DC power supply. 5. Sweep the injection oscillator across the frequency band of interest, typically 100 Hz to just under the circuit switching frequency. Measure the amplitude and phase relative to the oscillator of the voltage to ground from each side of the injection point at each frequency. 6. Divide the input voltage (the point where the 100 ohm injection resistor connects to the 4K resistor going into MULT OUT) by the output voltage (the point where the 100 ohm injection resistor connects to the 0.25 ohm current sense resistor), and plot the ratio of these two voltages as a function of frequency for both amplitude and phase. This produces a Bode plot of the open loop gain versus frequency of the current loop. This loop needs to have a bandwidth of several kilohertz, the higher the better, and phase margin of at least 60. The gain of this loop can be tailored by changing the compensation components (the 62pF and 620pF capacitors and the 24K resistor) connected between pins 3 and 4 of the UC3854. A complete frequency response analysis workstation such as the Venable Industries Model 350 system will aid greatly in the proper selection of these components. Summary In this paper, it was demonstrated that power factor correction has become an increasingly necessary feature in new power supply designs. It was pointed out that a power factor correction circuit has two feedback control loops. One loop operates by using the input voltage as a reference to control the input current. This loop is fast and makes the input current instantaneously proportional to input voltage as it would be with a resistive load. This loop is normally dynamic, constantly changing operating point as the line voltage changes. By fixing or "freezing" the operating point, a family of Bode 9

plots can be run at various operating points to verify circuit operation across the entire operating range. Techniques for fixing the operating point and also making the measurement were discussed. Techniques were demonstrated for testing the stability of the second, much slower loop that controls the constant of proportionality between input voltage and input current. This loop keeps the output voltage of the power factor correction circuit constant. It is not necessary to "freeze" the operating point of this loop since the bandwidth is much lower than the variation rate of the faster loop. The variations of the faster loop are averaged out. Even though the faster loop forms a gain block that is inside the slow loop, an "averaged" transfer function of the faster loop is sufficient for loop gain measurements and stability analysis. Step-by-step instructions for "freezing" the current loop and for testing both the voltage loop and the current loop for the Unitrode UC3854 power factor correction chip were presented. The principles are the same for all chips and the author welcomes questions or comments about other approaches to power factor correction. References 1. Venable, H. Dean, "Testing Power Sources for Stability", Proceedings of the 1984 Power Sources Conference, pp. S12/1-1:14. 2. Venable, H. Dean, "Integrated Frequency Response Modeling and Measurement System with File Math", Proceedings of the 1985 Power Electronic Design Conference, pp. 195-202. 3. Venable, H. Dean, "Specify Gain and Phase Margins on All Your Loops", Proceedings of the 1987 Power Electronics Conference, pp. 41-46. 4. "How to Instantly Become an Expert on Power Factor Correction," a White Paper Presented by Power Components Company. 5. "Unitrode UC3854 Data Sheet, Unitrode Integrated Circuits, Merrimack, NH. 10