TrilithIC BTS 78 K Data Sheet Overview. Features Quad D-MOS switch Free configurable as bridge or quad-switch Optimized for DC motor management applications ow R DS ON : 26 mω high-side switch, 4 mω low-side switch (typical values @ 25 C) Maximum peak current: typ. 42 A @ 25 C= Very low quiescent current: typ. 4 µa @ 25 C= Small outline, thermal optimized PowerPak oad and GND-short-circuit-protection Operates up to 4 V Status flag for over temperature Open load detection in Off-mode Overtemperature shut down with hysteresis Internal clamp diodes Isolated sources for external current sensing Under-voltage detection with hysteresis P-TO263-5- Type Ordering Code Package BTS 78 K Q676-S629 P-TO263-5-.2 Description The BTS 78 K is part of the TrilithIC family containing three dies in one package: One double high-side switch and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated leadframes. The sources are connected to individual pins, so the BTS 78 K can be used in H-bridge- as well as in any other configuration. The double high-side is manufactured in SMART SIPMOS technology which combines low R DS ON vertical DMOS power stages with CMOS control circuit. The high-side switch is fully protected and contains the control and diagnosis circuit. To achieve low R DS ON and fast switching performance, the low-side switches are manufactured in S-FET 2 logic level technology. The equivalent standard product is the SPD3N6S2-3. Data Sheet 23-3-
BTS 78 K.3 Pin Configuration (top view) Molding Compound NC S I 2 3 8 Heat-Slug D NC 4 IH ST 5 6 Heat-Slug 2 SH 7 DHVS 8 7 DHVS GND 9 IH2 ST2 SH2 I2 S2 2 3 4 6 Heat-Slug 3 D2 NC 5 Figure Data Sheet 2 23-3-
BTS 78 K.4 Pin Definitions and Functions Pin No. Symbol Function NC Not connected 2 S Source of low-side switch 3 I Analog input of low-side switch 4 NC Not connected 5 IH Digital input of high-side switch 6 ST Status of high-side switch ; open Drain output 7 SH Source of high-side switch 8 DHVS Drain of high-side switches and power supply voltage 9 GND Ground of high-side switches IH2 Digital input of high-side switch 2 ST2 Status of high-side switch 2; open Drain output 2 SH2 Source of high-side switch 2 3 I2 Analog input of low-side switch 2 4 S2 Source of low-side switch 2 5 NC Not connected 6 D2 Drain of low-side switch 2 Heat-Slug 3 7 DHVS Drain of high-side switches and power supply voltage Heat-Slug 2 8 D Drain of low-side switch Heat-Slug Pins written in bold type need power wiring. Data Sheet 3 23-3-
BTS 78 K.5 Functional Block Diagram DHVS ST 6 8, 7 ST2 Diagnosis Biasing and Protection IH IH2 GND 5 9 Driver IN OUT H H H H R O R O2 2 6 SH2 D2 7 SH 8 D I 3 I2 3 2 4 S S2 Figure 2 Block Diagram Data Sheet 4 23-3-
BTS 78 K.6 Circuit Description Input Circuit The control inputs IH,2 consist of TT/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs I and I2 are connected to the gates of the standard N-channel vertical power-mos-fets. Output Stages The output stages consist of a low R DS ON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body diodes can be used for freewheeling when commutating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes. Short Circuit Protection The outputs are protected against output short circuit to ground overload (load short circuit). An internal OP-amp controls the Drain-Source-voltage by comparing the DS-voltagedrop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. In the case of overloaded high-side switches the status output is set to low. Overtemperature Protection The high-side switches incorporate an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. Undervoltage-ockout (UVO) When V S reaches the switch-on voltage V UVON the IC becomes active with a hysteresis. The high-side output transistors are switched off if the supply voltage V S drops below the switch off value V UVOFF. Open oad Detection Open load is detected by voltage measurement in off state. If the output voltage exceeds a specified level the error flag is set with a delay. Data Sheet 5 23-3-
BTS 78 K Status Flag The two status flag outputs are an open drain output with Zener-diode which require a pull-up resistor, c.f. the application circuit on page 5. ST and ST2 provide separate diagnosis for each high-side switch. Various errors as listed in the table Diagnosis are detected by switching the open drain output ST/2 to low. Forward current in the integrated body diode of the highside switch may cause undefined voltage levels at the corresponding status output. The open load detection can be used to detect a short to Vs as long as both lowside switches are off and R O is disconnected from 5V by BCR92W. 2 Truthtable and Diagnosis (valid only for the High-Side-Switches) Flag IH IH2 SH SH2 ST ST2 Remarks Inputs Outputs Normal operation; identical with functional truth table Open load at high-side switch Open load at high-side switch 2 Overtemperature high-side switch Overtemperature high-side switch2 Overtemperature both high-side switches H H Z H H H Z H stand-by mode switch2 active switch active both switches active detected detected detected detected detected detected Undervoltage not detected Note: * multiple simultaneous errors are not shown in this table Inputs: Outputs: Status: = ogic OW Z = Output in tristate condition = No error = ogic HIGH = Output in sink condition = Error = don t care H = Output in source condition = Voltage level undefined Data Sheet 6 23-3-
BTS 78 K 3 Electrical Characteristics 3. Absolute Maximum Ratings 4 C < T j < 5 C Parameter Symbol imit Values Unit Remarks min. max. High-Side-Switches (Pins DHVS, IH,2 and SH,2) Supply voltage V S.3 42 V Supply voltage for full short V S(SCP) 28 V circuit protection HS-drain current I S * A T C = 25 C; DC HS-input current I IH 5 5 ma Pin IH and IH2 HS-input voltage V IH 6 V Pin IH and IH2 Note: * internally limited Status Output ST (Pins ST and ST2) Status pull up voltage V ST.3 5.4 V Status Output current I ST 5 5 ma Pin ST or ST2 ow-side-switches (Pins D,2, I,2 and S,2) Drain- source break down V DS 55 V V I =V; I D ma voltage S-drain current I D 2 2 A T C = 25 C; DC S-drain current I D 25 A t p < ms; ν <. T C = 85 C A t p < ms; ν <. S-input voltage V I 2 2 V Pin I and I2 Temperatures Junction temperature T j 4 5 C Storage temperature T stg 55 5 C Data Sheet 7 23-3-
BTS 78 K 3. Absolute Maximum Ratings (cont d) 4 C < T j < 5 C Parameter Symbol imit Values Unit Remarks min. max. Thermal Resistances (one HS-S-Path active) S-junction case R thjc.6 K/W HS-junction case R thjc H.75 K/W Junction ambient R thja = T j(hs) /(P (HS) +P (S) ) R thja 35 K/W device soldered to reference PCB with 6cm 2 cooling area ESD Protection (Human Body Model acc. MI STD 883D, method 35.7 and EOS/ ESD assn. standard S5. - 993) Input S-Switch V ESD.5 kv Input HS-Switch V ESD kv Status HS-Switch V ESD 2 kv Output S and HS-Switch V ESD 4 kv all other pins connected to Ground Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. 3.2 Operating Range 4 C < T j < 5 C Parameter Symbol imit Values Unit Remarks min. max. Supply voltage V S V UVOFF 42 V After V S rising above V UVON Input voltages HS V IH.3 5 V Input voltages S V I.3 2 V Status output current I ST 2 ma Junction temperature T jhs 4 5 C Note: In the operating range the functions given in the circuit description are fulfilled. Data Sheet 8 23-3-
BTS 78 K 3.3 Electrical Characteristics I SH = I SH2 = I S = I S2 = A; 4 C < T j < 5 C; 8 V < V S < 8 V unless otherwise specified Parameter Symb ol imit Values Unit Test Condition min. typ. max. Current Consumption HS-switch Quiescent current I S Q 4 9 µa IH = IH2 = V T j = 85 C 2 µa IH = IH2 = V Supply current I S 2.5 4.5 ma IH or IH2 = 5 V 5 9 ma IH and IH2 = 5 V eakage current of highside switch eakage current through logic GND in free wheeling condition I SH K 7 µa V IH = V SH = V T j = 85 C I KC = 2.2 ma I FH =5 A I FH + I SH Current Consumption S-switch Input current I I na V I = 2 V V DS = V eakage current of lowside switch I D K 2 µa V I = V V DS = 4 V T j = 85 C Under Voltage ockout (UVO) HS-switch Switch-ON voltage V UVON 5 V V S increasing Switch-OFF voltage V UVOFF.8 4.5 V V S decreasing Switch ON/OFF hysteresis V UVHY V V UVON V UVOFF Data Sheet 9 23-3-
BTS 78 K 3.3 Electrical Characteristics (cont d) I SH = I SH2 = I S = I S2 = A; 4 C < T j < 5 C; 8 V < V S < 8 V unless otherwise specified Parameter Symb imit Values Unit Test Condition ol min. typ. max. Output stages Inverse diode of highside switch; Forwardvoltage Inverse diode of lowside switch; Forward-voltage Static drain-source on-resistance of highside switch Static drain-source on-resistance of lowside switch V FH.8.2 V I FH = 5 A V F.8.2 V I F = 5 A R DS ON H 26 35 mω I SH =5A T j = 25 C R DS ON 4 7 mω I S =5A; V I = 5 V T j = 25 C Static path on-resistance R DS ON mω R DS ON H +R DS ON I SH =5A; Short Circuit of highside switch to GND Initial peak SC current I SCP H 35 48 65 A T j = 4 C Initial peak SC current I SCP H 3 42 54 A T j = + 25 C Initial peak SC current I SCP H 25 32 42 A T j = + 5 C Note: Integrated protection functions are designed to prevent IC destruction under fault conditions. Protection functions are not designed for continuous or repetitive operation. Peak SC current is significantly lower at V S > 8V Short Circuit of highside switch to V S Output pull-down-resistor R O 7 4 42 kω V DS = 3 V Data Sheet 23-3-
BTS 78 K 3.3 Electrical Characteristics (cont d) I SH = I SH2 = I S = I S2 = A; 4 C < T j < 5 C; 8 V < V S < 8 V unless otherwise specified Parameter Symb imit Values Unit Test Condition ol min. typ. max. Thermal Shutdown Thermal shutdown junction temperature Thermal switch-on junction temperature T j SD 55 8 9 C T j SO 5 7 8 C Temperature hysteresis T C T = T jsd T jso Status Flag Output ST of highside switch ow output voltage V ST.2.6 V I ST =.6 ma eakage current I ST K 5 µa V ST = 5 V Zener-limit-voltage V ST Z 5.4 V I ST =.6 ma Status change after t d(stoffo+) 2 µs positive input slope with open load Status change after t d(stoffo-) 7 µs negative input slope with open load Status change after t d(stofft+).6 µs R ST = 47 kω positive input slope with overtemperature Status change after negative input slope with overtemperature t d(stofft-) 4 µs R ST = 47 kω Note: times are not subject to production test - specified by design Open load detection in Off condition Open load detection voltage V OUT(O) 2 3 4 V Data Sheet 23-3-
BTS 78 K 3.3 Electrical Characteristics (cont d) I SH = I SH2 = I S = I S2 = A; 4 C < T j < 5 C; 8 V < V S < 8 V unless otherwise specified Parameter Symb ol imit Values Unit Test Condition min. typ. max. Switching times of highside switch Turn-ON-time; to 9% V SH t ON 22 µs R oad = 2 Ω V S = 2 V Turn-OFF-time; to % V SH t OFF 2 25 µs R oad = 2 Ω V S = 2 V Slew rate on to 3% V SH Slew rate off 7 to 4% V SH dv/ dt ON.5. V/µs R oad = 2 Ω V S = 2 V -dv/.7.3 V/µs R oad = 2 Ω dt OFF V S = 2 V Note: switching times are not subject to production test - specified by design Switching times of low-side switch Turn-ON delay time; V I = 5V; R Gate = 6Ω Switch-ON time; V I = 5V; R Gate = 6Ω Switch-OFF delay time; V I = 5V; R Gate = 6Ω Switch-OFF time; V I = 5V; R Gate = 6Ω t d_on_ 4 ns resistive load I S = A; V S = 2 V t ON_ 7 ns resistive load I S = A; V S = 2 V t d_off_ ns resistive load I S = A; V S = 2 V t OFF_ 2 ns resistive load I S = A; V S = 2 V Input to source charge; Q IS 4.5 6 nc I S = A; V S = 4 V Input to drain charge; Q ID 6 24 nc I S = A; V S = 4 V Input charge total; Q I 55 69 nc I S = A; V S = 4 V V I = to V Input plateau voltage; V (plateau) 2.6 V I S = A; V S = 4 V Note: switching times and input charges are not subject to production test - specified by design Data Sheet 2 23-3-
BTS 78 K 3.3 Electrical Characteristics (cont d) I SH = I SH2 = I S = I S2 = A; 4 C < T j < 5 C; 8 V < V S < 8 V unless otherwise specified Parameter Symb imit Values Unit Test Condition ol min. typ. max. Control Inputs of highside switches IH, 2 H-input voltage V IH High 2.5 V -input voltage V IH ow V Input voltage hysterese V IH HY.5 V H-input current I IH High 5 3 6 µa V IH = 5 V -input current I IH ow 5 4 25 µa V IH =.4 V Input series resistance R I 2.7 4 6 kω Zener limit voltage V IH Z 5.4 V I IH =.6 ma Control Inputs I, 2 Gate-threshold-voltage I D = ma V I th.9 2.6 V T j = 4 C.7 T j = + 25 C.8. T j = + 5 C Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at T A = 25 C and V S = 2 V. Data Sheet 3 23-3-
BTS 78 K V S I S C S 47nF C µf I FH,2 I ST K DHVS I ST ST 6 8, 7 V DSH2 V DSH I ST K2 -V FH2 -V FH I ST2 ST2 Diagnosis Biasing and Protection V ST V ST V STZ V ST2 I IH IH 5 Gate Driver V ST2 V STZ2 V IH I IH IH2 Gate Driver R O R O2 2 6 SH2 D2 I SH2 I D2 V IH2 GND 6 I D K 2 V UVON I GND 7 SH I SH V UVOFF I KC 8 D I D I D K I I I 3 V I I I2 I2 3 V I th V I2 2 4 V DS V DS2 V I th 2 S S2 -V F -V F2 I SCP I SCP 2 I S I S2 Figure 3 Test Circuit HS-Source-Current Named during Short Circuit Named during eakage- Cond. I SH,2 I SCP H I D K Data Sheet 4 23-3-
BTS 78 K Watchdog Reset Q TE 4278G I V S =2V R Q kω R Q kω C Q 22µF D C D 47nF D Z39 C S µf WD R V CC R S kω RS ST 6 ST2 Diagnosis DHVS 8, 7 Biasing and Protection to µc BCR92W Can be replaced by diode when Short to Vs detection is not needed kω R O 56Ohm IH 5 Gate Driver optional for open load in off IH2 Gate Driver R O R O2 2 6 SH2 D2 µp GND 9 7 SH M 8 D I 3 I2 3 2 4 GND S S2 Figure 4 Application Circuit Data Sheet 5 23-3-
BTS 78 K 4 Package Outlines P-TO263-5- (Plastic Transistor Single 2.6 ±.2 2, ) 8.3 4.4 5.56 ±.5.27 ±., ) 4.8 ±.2 8.8 ±.5 A ±.3 B..5 (5) 9.25 ±.2 7.65 ) 4.7±.5 2.7±.3 2.4 4 x.4...5.8 ±. 8 MA..5 ±..25 M A B. B ) Typical Metal surface min. = 3.57, 2 = 7.3, Y = 6.9 All metal surfaces tin plated, except area of cut. Footprint.8 2.6 8.4 4 6 9.5.4 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information. SMD = Surface Mounted Device Dimensions in mm Data Sheet 6 23-3-
BTS 78 K Edition 23- Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-8669 München, Germany Infineon Technologies AG 3/3/3. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. ife support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 7 23-3-