PIIPS traparent -type latch datasheet http://www.manuallib.com/philips/74lvt16373a-traparent-d-type-latch-datasheet.html The is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is a 16-bit traparent -type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When enable () input is igh, the outputs follow the data () inputs. When enable is taken ow, the outputs are latched at the levels of the inputs one setup time prior to the igh-to-ow traition. Manualib.com collects and classifies the global product itrunction manuals to help users access anytime and anywhere, helping users make better use of products. http://www.manuallib.com
INTGRAT CIRCUITS 3.3V VT 16-bit traparent -type latch (3-State) Supersedes data of 1994 ec 15 IC23 ata andbook 1998 Feb 19
3.3V 16-bit traparent -type latch (3-State) FATURS 16-bit traparent latch 3-State buffers Output capability: +64mA/-32mA TT input and output switching levels Input and output interface capability to systems at 5V supply Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs ive iertion/extraction permitted Power-up reset Power-up 3-State No bus current loading when output is tied to 5V bus atch-up protection exceeds 500mA per JC Std 17 S protection exceeds 200 per MI ST 883 Method 3015 and 20 per Machine Model SCRIPTION The is a high-performance BiCMOS product designed for V CC operation at 3.3V. This device is a 16-bit traparent -type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When enable () input is igh, the outputs follow the data () inputs. When enable is taken ow, the outputs are latched at the levels of the inputs one setup time prior to the igh-to-ow traition. UICK RFRNC ATA SYMBO t P t P Propagation delay nx to nx PARAMTR C = 50pF; V CC = 3.3V CONITIONS T amb = 25 C TYPICA UNIT 1.9 C IN Input capacitance V I = or 3. 3 pf C OUT Output capacitance Outputs disabled; V O = or 3. 9 pf I CCZ Total supply current Outputs disabled; V CC = 3.6V 70 µa ORRING INFORMATION PACKAGS TMPRATUR RANG OUTSI NORT AMRICA NORT AMRICA WG NUMBR 48-Pin Plastic SSOP Type III 40 C to +85 C VT16373A SOT370-1 48-Pin Plastic TSSOP Type II 40 C to +85 C GG VT16373A GG SOT362-1 OGIC SYMBO 47 46 44 43 41 40 38 37 PIN SCRIPTION PIN NUMBR SYMBO FUNCTION 47, 46, 44, 43, 41, 40, 38, 37, 36, 35, 33, 32, 30, 29, 27, 26 10 17 20 27 ata inputs 48 10 11 12 13 1 14 15 16 17 2, 3, 5, 6, 8, 9, 11, 12, 13, 14, 16, 17, 19, 20, 22, 23 10 17 20 27 ata outputs 1 1O 10 11 12 13 14 15 16 17 1, 24 1O, 2O Output enable inputs (active-ow) 2 3 5 6 8 9 11 12 48, 25 1, 2 nable inputs (active-igh) 36 35 33 32 30 29 27 26 4, 10, 15, 21, 28, 34, 39, 45 Ground () 20 221 22 23 24 25 26 27 7, 18, 31, 42 V CC Positive supply voltage 25 2 24 2O 20 21 22 23 24 25 26 27 13 14 16 17 19 20 22 23 SA00044 1998 Feb 19 2 853-1780 18989
3.3V 16-bit traparent -type latch (3-State) OGIC SYMBO (I/IC) PIN CONFIGURATION 1O 1 2O 2 1 48 24 25 1N C3 2N C4 1O 10 11 1 2 3 4 48 47 46 45 1 10 11 11 12 13 14 15 16 17 18 21 22 23 24 25 26 27 28 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 3 4 1 2 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 11 12 13 14 15 16 17 18 21 22 23 24 25 26 27 28 12 13 V CC 14 15 16 17 20 21 22 23 V CC 24 25 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 12 13 V CC 14 15 16 17 20 21 22 23 V CC 24 25 SW00010 26 21 22 28 27 26 27 23 26 27 2O 24 25 2 SA00043 OGIC IAGRAM n0 n1 n2 n3 n4 n5 n6 n7 n no n0 n1 n2 n3 n4 n5 n6 n7 SA00046 1998 Feb 19 3
3.3V 16-bit traparent -type latch (3-State) FUNCTION TAB INPUTS INTRNA OUTPUTS no n nx l h RGISTR n0 n7 X NC NC old X nx NC nx = igh voltage level h = igh voltage level one set-up time prior to the igh-to-ow traition = ow voltage level l = ow voltage level one set-up time prior to the igh-to-ow traition NC= No change X = on t care Z = igh impedance off state = igh-to-ow traition Z Z nable and read register atch and read register isable outputs OPRATING MO ABSOUT MAXIMUM RATINGS 1, 2 SYMBO PARAMTR CONITIONS RATING UNIT V CC C supply voltage 0.5 to +4.6 V I IK C input diode current V I < 0 50 ma V I C input voltage 3 0.5 to +7.0 V I OK C output diode current V O < 0 50 ma V OUT C output voltage 3 Output in Off or igh state 0.5 to +7.0 V Output in ow state 128 I OUT C output current Output in igh state 64 ma T stg Storage temperature range 65 to +150 C NOTS: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. xposure to absolute-maximum-rated conditio for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RCOMMN OPRATING CONITIONS IMITS SYMBO PARAMTR MIN MAX UNIT V CC C supply voltage 2.7 3.6 V V I Input voltage 0 5.5 V V I igh-level input voltage 2.0 V V I Input voltage 0.8 V I O igh-level output current 32 ma I O ow-level output current 32 ma ow-level output current; current duty cycle 50%; f 1kz 64 t/ v Input traition rise or fall rate; Outputs enabled 10 /V T amb Operating free-air temperature range 40 +85 C 1998 Feb 19 4
3.3V 16-bit traparent -type latch (3-State) C CTRICA CARACTRISTICS IMITS SYMBO PARAMTR TST CONITIONS Temp = -40 C to +85 C UNIT MIN TYP 1 MAX V IK Input clamp voltage V CC = ; I IK = 18mA.85 1.2 V V CC = 2.7 to 3.6V; I O = 100µA V CC -0.2 V CC V O igh-level output voltage V CC = ; I O = 8mA 2.4 2.5 V V CC = 3.; I O = 32mA 2.0 2.3 V CC = ; I O = 100µA 0.07 0.2 V CC = ; I O = 24mA 0.3 0.5 V O ow level output voltage V CC = 3.; I O = 16mA 0.25 0.4 V V CC = 3.; I O = 32mA 0.3 0.5 V CC = 3.; I O = 64mA 0.4 0.55 V RST Power-up output ow voltage 5 V CC = 3.6V; I O = 1mA; V I = or V CC 0.1 0.55 V I I Input leakage current V CC = 3.6V; V I = V CC or Control pi 0.1 ±1 V CC = 0 or 3.6V; V I = 5.5V 0.4 10 V CC = 3.6V; V I = V CC pi 0.1 1 ata 4 V CC = 3.6V; V I = 0-0.4-5 I OFF Output off current V CC = ; V I or V O = 0 to 4.5V 0.1 ±100 µa V CC = 3V; V I = 0.8V 75 135 I O Bus old current inputs 7 V CC = 3V; V I = 2. 75-135 µa I X I PU/P V CC = to 3.6V; V CC = 3.6V ±500 Current into an output in the igh state when V O > V CC V O = 5.5V; V CC = 3. 50 125 µa Power up/down 3-State output V CC 1.2V; V O = 0.5V to V CC ; V I = or V CC ; current 3 O/O = on t care µa 1 ±100 µa I OZ 3-State output igh current V CC = 3.6V; V O = 3.; V I = V I or V I 0.5 5 I OZ 3-State output ow current V CC = 3.6V; V O = 0.5V; V I = V I or V I 0.5 5 I CC V CC = 3.6V; Outputs igh, V I = or V CC, I O = 0 0.07 0.12 I CC uiescent supply current V CC = 3.6V; Outputs ow, V I = or V CC, I O = 0 4.0 6 ma I CCZ V CC = 3.6V; Outputs isabled; V I = or V CC, I O = 0 6 0.07 0.12 I CC Additional supply current per input pin 2 V CC = 3V to 3.6V; One input at V CC -0.6V, Other inputs at V CC or µa 0.1 0.2 ma NOTS: 1. All typical values are at V CC = 3.3V and T amb = 25 C. 2. This is the increase in supply current for each input at the specified voltage level other than V CC or. 3. This parameter is valid for any V CC between and 1.2V with a traition time of up to 10msec. From V CC = 1.2V to V CC = 3.3V ± 0.3V a traition time of 100µsec is permitted. This parameter is valid for T amb = 25 C only. 4. Unused pi at V CC or. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. I CCZ is measured with outputs pulled to V CC or. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 5
3.3V 16-bit traparent -type latch (3-State) AC CARACTRISTICS = ; t R = t F = 2.5; C = 50pF; R = 500Ω; T amb = 40 C to +85 C. IMITS SYMBO PARAMTR WAVFORM V CC = 3.3V ±0.3V V CC = UNIT t P t P t P t P t PZ t PZ t PZ t PZ Propagation delay nx to nx Propagation delay n to nx Output enable time to igh and ow level Output disable time from igh and ow evel NOT: 1. All typical values are at V CC = 3.3V and T amb = 25 C. AC STUP RUIRMNTS = ; t R = t F = 2.5; C = 50pF; R = 500Ω; T amb = 40 C to +85 C. 2 1 4 5 4 5 MIN TYP 1 MAX MAX 0.5 0.5 0.5 0.5 0.1 0.1 0.1 0.1 1.8 1.9 2.1 2.2 2.8 2.6 3.3 3.0 IMITS SYMBO PARAMTR WAVFORM V CC = 3.3V ±0.3V V CC = UNIT t S () t S () t h () t h () t W () Setup time nx to n old time nx to n n pulse width igh 3 3 3.9 3.9 4.8 4.8 4.5 4.3 4.5 4.3 4.5 4.5 5.4 5.4 5.1 4.7 5.1 4.7 MIN TYP MIN 1.5 2.0 1.0 1.5 0.1 0.2 0 0 1.0 2.0 1.0 2.0 1 1.5 0.5 1.5 AC WAVFORMS For all waveforms, = 1.5V. n nx ÉÉÉ ÉÉ ÉÉÉÉÉ ÉÉÉÉ ÉÉÉ ÉÉÉ t s () t h () t s () t h () nx t w () t P t P V O V O n NOT: The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 1. Propagation elay, nable to Output, and nable Pulse Width SW00011 Waveform 3. ata Setup and old Times SW00013 nx t P t P V O nx V O SW00012 Waveform 2. Propagation elay for ata to Outputs no nx t PZ t PZ V O -0.3V V O SW00014 Waveform 4. 3-State Output nable time to igh evel and Output isable Time from igh evel 1998 Feb 19 6
3.3V 16-bit traparent -type latch (3-State) no t PZ t PZ 3V nx V O +0.3V V O SW00015 Waveform 5. 3-State Output nable Time to ow evel and Output isable Time from ow evel TST CIRCUIT AN WAVFORMS V CC 6V t W 90% 90% AMP (V) PUS GNRATOR V IN.U.T. V OUT R OPN NGATIV PUS 10% 10% t T (t F ) t T (t R ) R T C Test Circuit for 3-State Outputs SWITC POSITION TST SWITC t PZ /t PZ t PZ /t PZ 6V t P /t P open R POSITIV PUS 90% 90% t T (t R ) t T (t F ) 10% t 10% W = 1.5V Input Pulse efinition AMP (V) FINITIONS R = oad resistor; see AC CARACTRISTICS for value. C = oad capacitance includes jig and probe capacitance; see AC CARACTRISTICS for value. R T = Termination resistance should be equal to Z OUT of pulse generators. INPUT PUS RUIRMNTS FAMIY Amplitude Rep. Rate t W t R t F 74VT16 10Mz 500 2.5 2.5 SW00003 1998 Feb 19 7
ow Voltage Products 3.3V VT 16-bit traparent -type latch (3-State) SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 1998 Feb 19 8
ow Voltage Products 3.3V VT 16-bit traparent -type latch (3-State) TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1 1998 Feb 19 9
3.3V VT 16-bit traparent -type latch (3-State) ata sheet status ata sheet status Product status efinition [1] Objective specification Preliminary specification Product specification evelopment ualification Production This data sheet contai the design target or goal specificatio for product development. Specification may change in any manner without notice. This data sheet contai preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contai final specificatio. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please coult the most recently issued datasheet before initiating or completing a design. efinitio Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. imiting values definition imiting values given are in accordance with the Absolute Maximum Rating System (IC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditio above those given in the Characteristics sectio of the specification is not implied. xposure to limiting values for extended periods may affect device reliability. Application information Applicatio that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applicatio will be suitable for the specified use without further testing or modification. isclaimers ife support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applicatio do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no respoibility or liability for the use of any of these products, conveys no licee or title under any patent, copyright, or mask work right to these products, and makes no representatio or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 ast Arques Avenue P.O. Box 3409 Sunnyvale, California 94088 3409 Telephone 800-234-7381 Copyright Philips lectronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code ate of release: 05-96 ocument order number: 9397-750-03554 yyyy mmm dd 10