TPS76130, TPS76132, TPS76133, TPS76138, TPS76150 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS

Similar documents
description/ordering information

GENERAL-PURPOSE LOW-VOLTAGE COMPARATORS

Data sheet acquired from Harris Semiconductor SCHS083B Revised March 2003

150-mA LOW-NOISE LDO WITH IN-RUSH CURRENT CONTROL FOR USB APPLICATION

description/ordering information

ua9637ac DUAL DIFFERENTIAL LINE RECEIVER

SN74LVC1G32-Q1 SINGLE 2-INPUT POSITIVE-OR GATE

SN75150 DUAL LINE DRIVER

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

description/ordering information

Data sheet acquired from Harris Semiconductor SCHS038C Revised October 2003

TPS76901, TPS76912, TPS76915, TPS76918, TPS76925 TPS76927, TPS76928, TPS76930, TPS76933, TPS76950 ULTRALOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS

LOW INPUT VOLTAGE, CAP FREE 50-mA LOW-DROPOUT LINEAR REGULATORS

LF411 JFET-INPUT OPERATIONAL AMPLIFIER


1 to 4 Configurable Clock Buffer for 3D Displays

SN75157 DUAL DIFFERENTIAL LINE RECEIVER

74ACT11244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Dual Voltage Detector with Adjustable Hysteresis

AVAILABLE OPTIONS PACKAGE VIOmax SMALL OUTLINE. PLASTIC DIP at 25 C (D) (P) 0 C to 70 C 5 mv LM306D LM306P

description block diagram

SN74LV04A-Q1 HEX INVERTER

AVAILABLE OPTIONS PACKAGE SMALL OUTLINE (D) The D package is available taped and reeled. Add the suffix R to the device type (i.e., LT1030CDR).

TL780 SERIES POSITIVE-VOLTAGE REGULATORS

SN75124 TRIPLE LINE RECEIVER

SN74CBT3861DWR 10-BIT FET BUS SWITCH. description. logic diagram (positive logic)

SINGLE 2-INPUT POSITIVE-AND GATE

ORDERING INFORMATION T A PACKAGE ORDERABLE PART NUMBER. SOIC D Tape and reel SN74CBTD3306DR 40 C to85 C

ORDERING INFORMATION ORDERABLE PART NUMBER SN74CBTS3306PWR

PRECISION VOLTAGE REGULATORS

description logic diagram (positive logic) logic symbol

1.2 to 5.5 V TPS79101DBVRQ1(1) PEU1 1.8 V SOT23 TPS79118DBVRQ1(1) PER1 3.3 V (DBV) TPS79133DBVRQ1(1) PES1 4.7 V TPS79147DBVRQ1(1)(2) PET1

CD74HC4017-Q1 HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS

LP324, LP2902 ULTRA-LOW-POWER QUADRUPLE OPERATIONAL AMPLIFIERS

3.3 V Dual LVTTL to DIfferential LVPECL Translator

TL4581 DUAL LOW-NOISE HIGH-DRIVE OPERATIONAL AMPLIFIER

SN75471 THRU SN75473 DUAL PERIPHERAL DRIVERS

This device contains a single 2-input NOR gate that performs the Boolean function Y = A B or Y = A + B in positive logic. ORDERING INFORMATION

LOW-DROPOUT VOLTAGE REGULATORS

SN54ALS139, SN74ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

SN75158 DUAL DIFFERENTIAL LINE DRIVER

TPPM mA LOW-DROPOUT REGULATOR WITH AUXILIARY POWER MANAGEMENT AND POK

LM2900, LM3900 QUADRUPLE NORTON OPERATIONAL AMPLIFIERS

5-V PECL-to-TTL Translator

SN74LVC1G00-EP SINGLE 2-INPUT POSITIVE-NAND GATE

SN74AUC1G14-EP SINGLE SCHMITT-TRIGGER INVERTER

SN74LVC1G14-EP SINGLE SCHMITT-TRIGGER INVERTER SCES674 MARCH 2007

SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS

PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE

5-V Dual Differential PECL Buffer-to-TTL Translator

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

SN74LVC1G08-EP SINGLE 2-INPUT POSITIVE-AND GATE

CD54/74AC283, CD54/74ACT283

SN54ALS38B, SN74ALS38B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

CD54HC7266, CD74HC7266

SN74AUC1G86 SINGLE 2-INPUT EXCLUSIVE-OR GATE SCES389J MARCH 2002 REVISED NOVEMBER 2007

CD54HC4015, CD74HC4015

RC4136, RM4136, RV4136 QUAD GENERAL-PURPOSE OPERATIONAL AMPLIFIERS

SN74AUC1G02 SINGLE 2-INPUT POSITIVE-NOR GATE

P-Channel NexFET Power MOSFET

ORDERING INFORMATION. SOIC DW Tape and reel SN74CBT3384ADWR

CD74AC251, CD74ACT251

±24-mA Output Drive at 3.3 V Operates from 1.65 V to 3.6 V Latch-Up Performance Exceeds 250 ma Per Max t pd of 3.4 ns at 3.

MC3486 QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS

ORDERING INFORMATION. QFN RGY Tape and reel SN74CBT3257RGYR CU257. SOIC D Tape and reel SN74CBT3257DR

74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

AM26C31-EP QUADRUPLE DIFFERENTIAL LINE DRIVER

OUTPUT INPUT ADJUSTMENT INPUT INPUT ADJUSTMENT INPUT

SN74LV374A-Q1 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS

SN74LVC2G32-EP DUAL 2-INPUT POSITIVE-OR GATE

description/ordering information

TPA W MONO AUDIO POWER AMPLIFIER WITH HEADPHONE DRIVE

LM317M 3-TERMINAL ADJUSTABLE REGULATOR

SN74LVC138A-Q1 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCAS708B SEPTEMBER 2003 REVISED FEBRUARY 2008

SN54AC04, SN74AC04 HEX INVERTERS

A733C...D, N, OR NS PACKAGE (TOP VIEW) ORDERING INFORMATION

1OE 1Y1 1A1 1A2 1Y2 1Y3 1A3 1A4 1Y4 2OE 2Y1 2A1 2Y2 2A2 2A3 2Y3 2Y4 2A4 POST OFFICE BOX DALLAS, TEXAS 75265

ORDERING INFORMATION. QFN RGY Tape and reel SN74CBT3253RGYR CU253. SOIC D Tape and reel SN74CBT3253DR

description/ordering information

SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS

DUAL BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS

High-Side, Bidirectional CURRENT SHUNT MONITOR

ORDERING INFORMATION. TOP-SIDE MARKING PDIP N Tube SN74S1051N SN74S1051N

description Because the PMOS device behaves as a low-value

Technical Documents. SLPS532A MARCH 2015 REVISED DECEMBER 2017 CSD18536KCS 60 V N-Channel NexFET Power MOSFET

ORDERING INFORMATION PACKAGE

description/ordering information

SN74AUC1G125 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

CD54HC280, CD74HC280, CD54HCT280, CD74HCT280

AVAILABLE OPTIONS CERAMIC DIP (J) 6 mv ua747cd ua747cn. 5 mv ua747mj ua747mw ua747mfk

CD54HC147, CD74HC147, CD74HCT147

description TPS3836, TPS3838 DBV PACKAGE (TOP VIEW) V DD GND RESET TPS3837 DBV PACKAGE (TOP VIEW)

description logic diagram (positive logic) logic symbol

description logic diagram (positive logic) logic symbol

SN74AUC1G00 SINGLE 2-INPUT POSITIVE-NAND GATE

SN54ACT16244, 74ACT BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

CD54HC283, CD74HC283, CD54HCT283, CD74HCT283

Supports Partial-Power Down Mode 4.5-V to 5.5-V V Operation. (Output Ground Bounce) <0.8 V at V ESD Protection Exceeds JESD 22

SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS

Transcription:

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS SLVS178B DECEMBER 1998 REVISED MAY 2001 100-mA Low-Dropout Regulator Fixed Output Voltage Options: V, 3.8 V, 3.3 V, 3.2 V, and 3 V Dropout Typically 170 mv at 100-mA Thermal Protection Less Than 1 µa Quiescent Current in Shutdown 40 C to 12 C Operating Junction Temperature Range -Pin SOT-23 (DBV) Package ESD Protection Verified to 1. KV Human Body Model (HBM) per MIL-STD-883C EN GND IN 3 2 1 4 NC DBV PACKAGE (TOP VIEW) OUT NC No internal connection description The TPS761xx is a 100 ma, low dropout (LDO) voltage regulator designed specifically for battery-powered applications. A proprietary BiCMOS fabrication process allows the TPS761xx to provide outstanding performance in all specifications critical to battery-powered operation. The TPS761xx is available in a space-saving SOT-23 (DBV) package and operates over a junction temperature range of 40 C to 12 C. AVAILABLE OPTIONS TJ VOLTAGE PACKAGE PART NUMBER SYMBOL 40 C to 12 C 3 V TPS76130DBVR TPS76130DBVT PAEI 3.2 V 3.3 V 3.8 V SOT-23 (DBV) TPS76132DBVR TPS76132DBVT PAFI TPS76133DBVR TPS76133DBVT PAII TPS76138DBVR TPS76138DBVT PAKI V TPS7610DBVR TPS7610DBVT PALI The DBVR passive indicates tape and reel of 3000 parts. The DBVT passive indicates tape and reel of 20 parts. functional block diagram IN CS OUT EN Vref + Thermal Sense Current Limit GND Current sense Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2001, Texas Instruments Incorporated POST OFFICE BOX 6303 DALLAS, TEXAS 726 1

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS SLVS178B DECEMBER 1998 REVISED MAY 2001 Terminal Functions TERMINAL NAME NO. I/O EN 3 I Enable input GND 2 Ground IN 1 I Input voltage NC 4 No connection OUT O Regulated output voltage DESCRIPTION absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Input voltage range, V I (see Note 1)....................................................... 0.3 V to 16 V Voltage range at EN................................................................. 0.3 V to V I + 0.3 V Peak output current............................................................... internally limited Continuous total dissipation............................................ See Dissipation Rating Table Operating junction temperature range, T J........................................... 40 C to 10 C Storage temperature range, T stg......................................................... 6 C to 10 C ESD rating, HBM......................................................................... 1. kv Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to device GND pin. BOARD PACKAGE RθJC RθJA DISSIPATION RATING TABLE DERATING FACTOR ABOVE TA = 2 C TA 2 C POWER RATING TA = 70 C POWER RATING TA = 8 C POWER RATING Low K DBV 6.8 C/W 29 C/W 3.9 mw/ C 386 mw 212 mw 14 mw High K DBV 6.8 C/W 180 C/W.6 mw/ C mw 30 mw 222 mw The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. recommended operating conditions MIN NOM MAX UNIT TPS76130 3.3 16 TPS76132 3.8 16 Input voltage, VI TPS76133 3.68 16 V TPS76138 4.18 16 TPS7610.38 16 Continuous output current, IO 0 100 ma Operating junction temperature, TJ 40 12 C 2 POST OFFICE BOX 6303 DALLAS, TEXAS 726

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS SLVS178B DECEMBER 1998 REVISED MAY 2001 electrical characteristics over recommended operating free-air temperature range, V I = V O(typ) + 1 V, I O = 1 ma, EN = V I, C o = 4.7 µf (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TJ = 2 C 2.96 3 3.04 TPS76130 TJ = 2 C, 1 ma < IO < 100 ma 2.9 3.04 V 1 ma < IO < 100 ma 2.89 3.07 TJ = 2 C 3.16 3.2 3.24 TPS76132 TJ = 2 C, 1 ma < IO < 100 ma 3.11 3.24 V 1 ma < IO < 100 ma 3.08 3.3 TJ = 2 C 3.26 3.3 3.34 VO Output voltage TPS76133 TJ = 2 C, 1 ma < IO < 100 ma 3.21 3.34 V 1 ma < IO < 100 ma 3.18 3.4 TJ = 2 C 3.76 3.8 3.84 TPS76138 TJ = 2 C, 1 ma < IO < 100 ma 3.71 3.84 V 1 ma < IO < 100 ma 3.68 3.9 TJ = 2 C 4.9.0 TPS7610 TJ = 2 C, 1 ma < IO < 100 ma 4.88.0 V 1 ma < IO < 100 ma 4.86.1 II(standby) Standby current EN = 0 V 1 µa Quiescent current (GND current) IO = 0 ma, TJ = 2 C 90 11 IO = 0 ma 130 IO = 1 ma, TJ = 2 C 100 130 IO = 1 ma 170 IO = 10 ma, TJ = 2 C 190 220 IO = 10 ma 260 IO = 0 ma, TJ = 2 C 80 1100 IO = 0 ma 1200 IO = 100 ma, TJ = 2 C 2600 3600 IO = 100 ma 4000 TPS76130 4 V < VI < 16, IO = 1 ma 3 10 TPS76132 4.2 V < VI < 16, IO = 1 ma 3 10 Input regulation TPS76133 4.3 V < VI < 16, IO = 1 ma 3 10 mv TPS76138 4.8 V < VI < 16, IO = 1 ma 3 10 TPS7610 6 V < VI < 16 IO = 1 ma 3 10 Vn Output noise voltage BW = 300 Hz to 0 khz Co = 10 µf, TJ = 2 C 190 µvrms Ripple rejection f = 1 khz, Co = 10 µf, TJ = 2 C 63 db µa POST OFFICE BOX 6303 DALLAS, TEXAS 726 3

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS SLVS178B DECEMBER 1998 REVISED MAY 2001 electrical characteristics over recommended operating free-air temperature range, V I = V O(typ) + 1 V, I O = 1 ma, EN = V I, C o = 4.7 µf (unless otherwise noted) (continued) II PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IO = 0 ma, TJ = 2 C 1 3 IO = 0 ma IO = 1 ma, TJ = 2 C 7 10 IO = 1 ma 1 Dropout voltage IO = 10 ma, TJ = 2 C 40 60 IO = 10 ma 90 mv IO = 0 ma, TJ = 2 C 120 10 IO = 0 ma 180 IO = 100 ma, TJ = 2 C 170 240 IO = 100 ma 280 Peak output current/current limit 100 12 13 ma High level enable input 2 V Low level enable input 0.8 V Input current (EN) EN = 0 V 1 0 1 EN = VI 2. µa TYPICAL CHARACTERISTICS Table of Graphs FIGURE VO Output voltage Output current 1, 2, 3 Free-air temperature 4,, 6 Ground current Free-air temperature 7, 8, 9 Output noise Frequency 10 Zo Output impedance Frequency 11 VDO Dropout voltage Free-air temperature 12 Line transient response 13, 1 Load transient response 14, 16 4 POST OFFICE BOX 6303 DALLAS, TEXAS 726

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS TYPICAL CHARACTERISTICS SLVS178B DECEMBER 1998 REVISED MAY 2001 3.02 TPS76130 OUTPUT VOLTAGE OUTPUT CURRENT 3.32 TPS76133 OUTPUT VOLTAGE OUTPUT CURRENT 3.01 3 VI = 4 V CI = CO = 4.7 µf TA = 2 C 3.31 3.3 VI = 4.3 V CI = CO = 4.7 µf TA = 2 C V O Output Voltage V 2.99 2.98 2.97 2.96 V O Output Voltage V 3.29 3.28 3.27 3.26 2.9 3.2 2.94 0 20 40 60 80 100 120 IO Output Current ma Figure 1 3.24 0 20 40 60 80 100 120 IO Output Current ma Figure 2 TPS7610 OUTPUT VOLTAGE OUTPUT CURRENT TPS76130 OUTPUT VOLTAGE FREE-AIR TEMPERATURE.03 3.02.02 VI = 6 V CI = CO = 4.7 µf TA = 2 C 3.01 3 IL = 1 ma V O Output Voltage V.01 4.99 4.98 4.97 4.96 V O Output Voltage V 2.99 2.98 2.97 2.96 2.9 2.94 2.93 2.92 VI = 4 V CI = CO = 4.7 µf 4.9 0 20 40 60 80 100 120 IO Output Current ma Figure 3 2.91 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 4 POST OFFICE BOX 6303 DALLAS, TEXAS 726

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS SLVS178B DECEMBER 1998 REVISED MAY 2001 TYPICAL CHARACTERISTICS TPS76133 OUTPUT VOLTAGE FREE-AIR TEMPERATURE TPS7610 OUTPUT VOLTAGE FREE-AIR TEMPERATURE 3.32.02 3.31 3.3 IL = 1 ma IL = 1 ma V O Output Voltage V 3.29 3.28 3.27 3.26 3.2 3.24 V O Output Voltage V 4.98 4.96 4.94 3.23 3.22 VI = 4.3 V CI = CO = 4.7 µf 3.21 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 4.92 VI = 6 V CI = CO = 4.7 µf 4.9 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 6 104 TPS76130 GROUND CURRENT FREE-AIR TEMPERATURE VI = 4 V CI = CO = 4.7 µf 104 TPS76133 GROUND CURRENT FREE-AIR TEMPERATURE VI = 4.3 V CI = CO = 4.7 µf Ground Current µ A 103 102 IL = 0 ma IL = 1 ma Ground Current µ A 103 102 IL = 0 ma IL = 1 ma 101 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 7 101 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 8 6 POST OFFICE BOX 6303 DALLAS, TEXAS 726

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS TYPICAL CHARACTERISTICS SLVS178B DECEMBER 1998 REVISED MAY 2001 104 TPS7610 GROUND CURRENT FREE-AIR TEMPERATURE VI = 6 V CI = CO = 4.7 µf V/ Hz 10 OUTPUT NOISE FREQUENCY CL = 2.2 µf IL = 1 ma CL = 2.2 µf Ground Current µ A 103 102 IL = 0 ma IL = 1 ma Output Voltage Noise 10 6 10 7 CL = 10 µf CL = 10 µf IL = 1 ma V n 101 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 9 10 8 102 103 104 10 f Frequency Hz Figure 10 Zo Output Impedance Ω 103 102 101 100 10 1 OUTPUT IMPEDANCE FREQUENCY C L = 10 µf I L = 1 ma C L = 10 µf I L = 100 ma C L = 2.2 µf I L = 1 ma 10 2 101 102 103 104 10 106 f Frequency Hz Figure 11 C L = 10 µf I L = 0 ma C L = 2.2 µf I L = 0 ma C L = 2.2 µf I L = 100 ma V DO Dropout Voltage mv 300 20 200 10 100 0 TPS76130 DROPOUT VOLTAGE FREE-AIR TEMPERATURE VI = EN = 2.9 V CI = CO = 4.7 µf IL = 0 ma IL = 0 ma IL = 1 ma 0 60 40 20 0 20 40 60 80 100 120 140 TA Free-Air Temperature C Figure 12 POST OFFICE BOX 6303 DALLAS, TEXAS 726 7

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS SLVS178B DECEMBER 1998 REVISED MAY 2001 TYPICAL CHARACTERISTICS TPS76130 LINE TRANSIENT RESPONSE TPS76130 LOAD TRANSIENT RESPONSE Input Voltage V V I 7 6 4 20 CO = 4.7 µf I O Output Current ma 40 30 20 10 100 CO = 4.7 µf VO Change in Output Voltage mv 10 0 10 20 0 0 0 100 10 200 20 300 30 400 40 t Time µs Figure 13 V O Change in Output Voltage mv 0 0 0 100 300 200 100 0 100 200 300 400 00 600 700 t Time µs Figure 14 VO Change in V I Input Voltage V Output Voltage mv 8 7 6 30 20 10 0 10 20 TPS7610 LINE TRANSIENT RESPONSE CO = 4.7 µf 30 0 0 0 100 10 200 20 300 30 400 40 t Time µs Figure 1 I O Output Current ma VO Change in Output Voltage mv 30 20 10 0 100 0 0 0 TPS7610 LOAD TRANSIENT RESPONSE CO = 4.7 µf 100 300 200 100 0 100 200 300 400 00 600 700 t Time µs Figure 16 8 POST OFFICE BOX 6303 DALLAS, TEXAS 726

TPS76130, TPS76132, TPS76133, TPS76138, TPS7610 LOW-POWER 100-mA LOW-DROPOUT LINEAR REGULATORS APPLICATION INFORMATION SLVS178B DECEMBER 1998 REVISED MAY 2001 IN 1 OUT CI = 1 µf TPS761xx Co = 4.7 µf EN 3 2 GND over current protection Figure 17. TPS761xx Typical Application The over current protection circuit forces the TPS761xx into a constant current output mode when the load is excessive or the output is shorted to ground. Normal operation resumes when the fault condition is removed. NOTE: An overload or short circuit may also activate the over temperature protection if the fault condition persists. over temperature protection The thermal protection system shuts the TPS761xx down when the junction temperature exceeds 160 C. The device recovers and operates normally when the temperature drops below 10 C. input capacitor A 1-µF or larger ceramic decoupling capacitor with short leads connected between IN and GND is recommended. The decoupling capacitor may be omitted if there is a 1 µf or larger electrolytic capacitor connected between IN and GND and located reasonably close to the TPS761xx. However, the small ceramic device is desirable even when the larger capacitor is present, if there is a lot of high frequency noise present in the system. output capacitor Like all low dropout regulators, the TPS761xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 4.7 µf and the ESR (equivalent series resistance) must be between 0.1 Ω and 10 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7-µF surface-mount solid-tantalum capacitors, including devices from Sprague, Kemet, and Nichicon, meet the ESR requirements stated above. Multilayer ceramic capacitors should have minimum values of 4.7 µf over the full operating temperature range of the equipment. enable (EN) A logic zero on the enable input shuts the TPS761xx off and reduces the supply current to less than 1 µa. Pulling the enable input high causes normal operation to resume. If the enable feature is not used, EN should be connected to IN to keep the regulator on all of the time. The EN input must not be left floating. reverse current path The power transistor used in the TPS761xx has an inherent diode connected between IN and OUT as shown in the functional block diagram. This diode conducts current from the OUT terminal to the IN terminal whenever IN is lower than OUT by a diode drop. This condition does not damage the TPS761xx provided the current is limited to 10 ma. POST OFFICE BOX 6303 DALLAS, TEXAS 726 9

PACKAGE OPTION ADDENDUM www.ti.com 12-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan TPS76130DBVR ACTIVE SOT-23 DBV 3000 Green (RoHS TPS76130DBVT ACTIVE SOT-23 DBV 20 Green (RoHS TPS76130DBVTG4 ACTIVE SOT-23 DBV 20 Green (RoHS TPS76132DBVR ACTIVE SOT-23 DBV 3000 Green (RoHS TPS76132DBVT ACTIVE SOT-23 DBV 20 Green (RoHS TPS76132DBVTG4 ACTIVE SOT-23 DBV 20 Green (RoHS TPS76133DBVR ACTIVE SOT-23 DBV 3000 Green (RoHS TPS76133DBVRG4 ACTIVE SOT-23 DBV 3000 Green (RoHS TPS76133DBVT ACTIVE SOT-23 DBV 20 Green (RoHS TPS76133DBVTG4 ACTIVE SOT-23 DBV 20 Green (RoHS TPS76138DBVR ACTIVE SOT-23 DBV 3000 Green (RoHS TPS76138DBVT ACTIVE SOT-23 DBV 20 Green (RoHS TPS7610DBVR ACTIVE SOT-23 DBV 3000 Green (RoHS TPS7610DBVRG4 ACTIVE SOT-23 DBV 3000 Green (RoHS TPS7610DBVT ACTIVE SOT-23 DBV 20 Green (RoHS TPS7610DBVTG4 ACTIVE SOT-23 DBV 20 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking (4/) CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAEI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAEI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAEI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAFI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAFI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAFI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAII CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAII CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAII CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAII CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAKI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PAKI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PALI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PALI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PALI CU NIPDAU Level-1-260C-UNLIM -40 to 12 PALI Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 12-Jul-2016 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS : TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. () Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com -Jul-2018 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TPS76130DBVR SOT-23 DBV 3000 180.0 9.0 3.1 3.2 1.4 4.0 8.0 Q3 TPS76130DBVT SOT-23 DBV 20 180.0 9.0 3.1 3.2 1.4 4.0 8.0 Q3 TPS76132DBVR SOT-23 DBV 3000 180.0 9.0 3.1 3.2 1.4 4.0 8.0 Q3 TPS76132DBVT SOT-23 DBV 20 180.0 9.0 3.1 3.2 1.4 4.0 8.0 Q3 TPS76133DBVR SOT-23 DBV 3000 180.0 9.0 3.1 3.2 1.4 4.0 8.0 Q3 TPS76133DBVT SOT-23 DBV 20 180.0 9.0 3.1 3.2 1.4 4.0 8.0 Q3 TPS76138DBVR SOT-23 DBV 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS76138DBVT SOT-23 DBV 20 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS7610DBVR SOT-23 DBV 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS7610DBVT SOT-23 DBV 20 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com -Jul-2018 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS76130DBVR SOT-23 DBV 3000 182.0 182.0 20.0 TPS76130DBVT SOT-23 DBV 20 182.0 182.0 20.0 TPS76132DBVR SOT-23 DBV 3000 182.0 182.0 20.0 TPS76132DBVT SOT-23 DBV 20 182.0 182.0 20.0 TPS76133DBVR SOT-23 DBV 3000 182.0 182.0 20.0 TPS76133DBVT SOT-23 DBV 20 182.0 182.0 20.0 TPS76138DBVR SOT-23 DBV 3000 210.0 18.0 3.0 TPS76138DBVT SOT-23 DBV 20 210.0 18.0 3.0 TPS7610DBVR SOT-23 DBV 3000 210.0 18.0 3.0 TPS7610DBVT SOT-23 DBV 20 210.0 18.0 3.0 Pack Materials-Page 2

SCALE 4.000 PACKAGE OUTLINE DBV000A SOT-23-1.4 mm max height SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C PIN 1 INDEX AREA 1.7 1.4 B A 1.4 MAX 1 1.9 2X 0.9 2 1.9 3.0 2.7 X 0. 3 0.3 0.2 C A B 4 (1.1) 0.1 TYP 0.00 0.2 GAGE PLANE 0.22 TYP 0.08 8 0 TYP 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. www.ti.com

DBV000A EXAMPLE BOARD LAYOUT SOT-23-1.4 mm max height SMALL OUTLINE TRANSISTOR X (1.1) PKG 1 X (0.6) 2 SYMM (1.9) 2X (0.9) 3 4 (R0.0) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:1X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) 0.07 MIN ARROUND SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4. Publication IPC-731 may have alternate designs.. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

DBV000A EXAMPLE STENCIL DESIGN SOT-23-1.4 mm max height SMALL OUTLINE TRANSISTOR X (0.6) 1 X (1.1) PKG 2X(0.9) 2 SYMM (1.9) 3 4 (R0.0) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.12 mm THICK STENCIL SCALE:1X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-72 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com

SCALE 4.000 PACKAGE OUTLINE DBV000A SOT-23-1.4 mm max height SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C PIN 1 INDEX AREA 1.7 1.4 B A 1.4 MAX 1 1.9 2X 0.9 2 1.9 3.0 2.7 X 0. 3 0.3 0.2 C A B 4 (1.1) 0.1 TYP 0.00 0.2 GAGE PLANE 0.22 TYP 0.08 8 0 TYP 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. www.ti.com

DBV000A EXAMPLE BOARD LAYOUT SOT-23-1.4 mm max height SMALL OUTLINE TRANSISTOR X (1.1) PKG 1 X (0.6) 2 SYMM (1.9) 2X (0.9) 3 4 (R0.0) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:1X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) 0.07 MIN ARROUND SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4. Publication IPC-731 may have alternate designs.. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

DBV000A EXAMPLE STENCIL DESIGN SOT-23-1.4 mm max height SMALL OUTLINE TRANSISTOR X (0.6) 1 X (1.1) PKG 2X(0.9) 2 SYMM (1.9) 3 4 (R0.0) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.12 mm THICK STENCIL SCALE:1X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-72 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com

IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and services. Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyers and others who are developing systems that incorporate TI products (collectively, Designers ) understand and agree that Designers remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products used in or for Designers applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will thoroughly test such applications and the functionality of such TI products as used in such applications. TI s provision of technical, application or other design advice, quality characterization, reliability data or other services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, TI Resources ) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any way, Designer (individually or, if Designer is acting on behalf of a company, Designer s company) agrees to use any particular TI Resource solely for this purpose and subject to the terms of this Notice. TI s provision of TI Resources does not expand or otherwise alter TI s applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED AS IS AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements. Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S. TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer s noncompliance with the terms and provisions of this Notice. Mailing Address: Texas Instruments, Post Office Box 6303, Dallas, Texas 726 Copyright 2018, Texas Instruments Incorporated