SimpliPHY Transformerless Ethernet Designs

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ENT-AN0114 Application Note SimpliPHY Transformerless Ethernet Designs June 2018

Contents 1 Revision History... 1 1.1 Revision 2.0... 1 1.2 Revision 1.2... 1 1.3 Revision 1.1... 1 1.4 Revision 1.0... 1 2 Overview... 2 2.1 Typical Ethernet Application using Transformers... 2 2.2 Transformerless Applications... 2 3 Transformerless Design... 4 3.1 Connecting Two SimpliPHYs Together... 4 3.2 Connecting a SimpliPHY to an External Common-Mode PHY... 4 ENT-AN0114 Application Note Revision 2.0

1 Revision History The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication. 1.1 Revision 2.0 Revision 2.0 was published in June 2018. There were no changes to technical content in this revision. 1.2 Revision 1.2 Revision 1.2 was published in May 2016. In revision 1.2 the following changes were made: Diagrams of third-party PHY termination were corrected. Details about backplane applications were updated in the Transformerless Applications section. 1.3 Revision 1.1 Revision 1.1 was published in November 2007. In revision 1.1 of this document, the Connecting a SimpliPHY to an Externally Biased Line Driver (Preferred Method) diagram was updated. 1.4 Revision 1.0 Revision 1.0 was published in July 2006. It is the first publication of this document. ENT-AN0114 Application Note Revision 2.0 1

2 Overview This application note describes a specific application called Transformerless Ethernet. Transformerless Ethernet is used, primarily, for two purposes: To support backplane applications (such as PICMG) To support point-to-point on-board copper media Ethernet connections Microsemi s copper PHY line driver technology is a key feature in the SimpliPHY product portfolio, making these devices ideal for use in transformerless applications. 2.1 Typical Ethernet Application using Transformers In a typical Ethernet application, connections between PHYs are made over unshielded twisted pair (UTP), 100 Ω, category 5E cable. The front-end interface components consist of a transformer, an RJ-45 connector, as well as several termination resistors and bypass capacitors. One purpose of the transformer is to eliminate the incoming DC signal component introduced in the transmitted signals as a result of different ground references between the two communicating entities. The transformer is not required if the communicating devices share a common ground and/or the transceivers do not use the magnetics for any other purpose (such as sourcing current or providing a common-mode voltage into the transceiver), which is typical of current-mode line driver PHYs. The following figure shows the typical Ethernet application using a transformer. Figure 1 Typical Ethernet Application Using a Transformer 2.2 Transformerless Applications When two copper PHYs are interconnected through printed circuit board traces (as opposed to a UTP cable), there is no longer any need for a transformer. This interconnection can be either two PHYs on the same board (permanently linked together through signal traces), or it can be PHYs on blade cards connected together via backplane bus within a single chassis system. The removal of the transformer and the RJ45 connector allows for Bill of Material (BOM) cost savings and can simplify the PCB layout. The following image shows the trasformerless Ethernet application. Figure 2 Transformerless Ethernet Application ENT-AN0114 Application Note Revision 2.0 2

It is important to note that specifications developed by the PCI Industrial Computers Manufacturers Group (PICMG group) use Gigabit Ethernet transceivers over backplanes. As an example application, the AdvancedTCA Base Interface specified in PICMG 3.0 could use a transformerless interface to implement board-to-board 10/100/1000 Mbps connectivity. For more information about the PICMG specification, see http://www.picmg.org. ENT-AN0114 Application Note Revision 2.0 3

3 Transformerless Design Output line drivers of transceivers can be classified as current-mode or voltage-mode-based. Typical current-mode PHYs generate their output waveforms by sinking a current through the center tap of the primary winding of the transformer. The transformer is also used to provide the necessary common mode voltage for the PHY. On the other hand, SimpliPHY transceivers use voltage-mode drivers where the center taps of the transformer are not used to generate the common-mode volatage and the sink current. Therefore, SimpliPHY transceivers support transformerless 10/100/1000BASE-T operation without any additional circuitry. For more information about the differences between voltage-mode and current-mode-based PHYs, please refer to the SimpliPHY Architecture Advantages white paper. It is important to differentiate the two line driver architectures used by PHYs because the methods of connecting them together require slightly different design techniques, as described in the following sections. 3.1 Connecting Two SimpliPHYs Together If two Microsemi SimpliPHY devices are on the same design, then the copper interfaces of the two PHYs can be directly connected with 100 Ω differential signal traces through DC blocking capacitors to prevent common-mode voltage mismatches. Figure 3 Connecting Two SimpliPHYs Together 3.2 Connecting a SimpliPHY to an External Common-Mode PHY Unlike a SimpliPHY device, a current-mode PHY is an example of a PHY requiring an externally generated common-mode voltage. These PHYs have a distinct disadvantage with transformerless applications because of this legacy architecture. The following illustrations show two acceptable methods, the latter being the preferred method, employed to address this issue. Warning: A suitable common-mode termination strategy (as reflected in the figure below) must be verified by the non-microsemi PHY vendor. ENT-AN0114 Application Note Revision 2.0 4

Figure 4 Connecting a SimpliPHY to an Externally Biased Line Driver (Acceptable Method) Figure 5 Connecting a SimpliPHY to an Externally Biased Line Driver (Preferred Method) Both solutions address the need of the current-mode PHY requiring a common-mode voltage on its differential interface. The acceptable method may use pull-up resistors to emulate the use of the center tap of the transformer. Depending on the circuit topology inside the non-microesmi PHY's line driver, additional circuit connections may be required. In order to better balance the connection, thus mitigating a differential-mode noise source and increasing link robustness, the preferred method still employs a transformer. Because EMI and other issues usually corrected by a magnetic when used with a twisted pair cable are not present, a very simple 4-core (single core on 4-pairs) transformer can be used (as opposed to a standard 8- or 12-core magnetic). If the two PHYs are on different boards (for instance, in a backplane application), then DC-blocking series capacitors are needed between the SimpliPHY device and the backplane connector. The 4-core transformer should be located on the card with the current-mode PHY. ENT-AN0114 Application Note Revision 2.0 5

Microsemi Headquarters One Enterprise, Aliso Viejo, CA 92656 USA Within the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Sales: +1 (949) 380-6136 Fax: +1 (949) 215-4996 Email: sales.support@microsemi.com www.microsemi.com 2018 Microsemi. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer's responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided "as is, where is" and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice. Microsemi, a wholly owned subsidiary of Microchip Technology Inc. (Nasdaq: MCHP), offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions; security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, California, and has approximately 4,800 employees globally. Learn more at www microsemi.com. VPPD-01534 ENT-AN0114 Application Note Revision 2.0 6