Using the V5.x Integrator

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Using the V5.x Integrator This document explains how to produce the Bode plots for an electromagnetic guitar pickup using the V5.x Integrator. Equipment: Test coil 50-100 turns of 26 AWG coated copper magnet wire on a non-magnetic bobbin such as plastic or wood. V5.x integrator board computer audio interface such as the Scarlett Focusrite 2i2 or equivalent RightMark audio test software or equivalent Overview: The test setup consists of an audio loop, where signals produced by the test software suite are sent from the headphone jack of the audio device, to the test coil. The field from the test coil induces a voltage in the pickup, which is connected to the input of the integrator. The integrator output is connected to the input of the audio device, where it is converted to digital format and returned to the audio test software suite for recording and analysis.

Here is a photograph of a typical test bench layout: Illustration 1: Test Bench Layout The V5.x integrator circuit provides a high impedance preamplifier, an integrator, and an output amplifier. It also has terminals for switches to control input and output gain, and to select between internally provided test loads. One of the loads is a large capacitor, to measure inductance, and the other is an RC load to simulate a typical guitar circuit. A three way switch can select between these two loads, or neither load in order to make an unloaded (actually minimally loaded) measurement. An auxiliary ground wire connects to a workbench shield (not shown). In the photo above, it is a large piece of aluminum foil underneath the paper surface that supports the test apparatus. This is for hum reduction. To prepare for the test, the test coil must be placed against the pickup housing. The leads are connected to the integrator input. If the pickup is shielded, the shield connection should also be connected to the input ground (black). Connecting IN to the shield will result in bad measurements. Otherwise the polarity does not matter. Ensure that 9V power is applied to the integrator and that connections to and from the computer interface are complete. Launch the software suite and configure the sound interface options, select the option to perform Bode plots, and any other settings that are permanently required. Ensure that any monitor loopback in the computer DAC is disabled. Procedure: Launch the analysis software suite. For RightMark, you can click on a "Run Tests" button. It will show you the following display, if no pickup is connected:

This is what you would see with no pickup connected to the integrator. The software adjusts levels by sending a 1 Khz pilot tone, which you can see is absent here. Also, you can see a huge 60 Hz signal which is the electrostatic hum picked up Illustration 2: Input with no valid connections by the very high impedance input terminals when they are not connected to anything. After connecting the pickup, the levels should be adjusted so that the SUMMARY box is green, the "recorded level" bars come up, and the displayed level should be approximately -1 db as indicated. In practice, a level between -1 and -3 will usually be okay. First, we will do an unloaded measurement. For this, the load switch should be set to the center position. Here is a resulting calibration screen: The pilot tone is now visible at 1 Khz. You can see evidence of distortion in the harmonic overtone peaks at multiples of the test tone frequency. Illustration 3: Distorted Input

To obtain the best signal to noise, it is good to increase the drive to the test coil as much as possible, and then adjust the audio interface input level until the right level is attained, and there is not too much distortion or 60 Hz interference as it appears in the previous two illustrations. As a rule of thumb, neither the distortion products, nor the hum, should exceed -50 db or so. It is possible to run tests with greater than this, but the accuracy will be impaired. Here is a good calibration screen, when you see this you can press the "Start Test" button: Illustration 4: Typical acceptable calibration screen When the frequency sweep is completed, you will be prompted to save the plot. It is a good idea to name it at this point by typing in the name field. In this case, I'm calling it "No load".

Illustration 5: Name the slot Click on "OK". Now your first sweep will be recorded in the first of 8 possible slots: Illustration 6: First slot Move the load select switch on the integrator to the "test load" position. Click again on the "Run Tests" button. Adjust the levels as before, and complete another sweep. You will again be prompted and you can name this sweep "loaded" for example (You can also include the pickup name or any data you want to appear on the final plot). Finally, Move the load select switch on the integrator to the "Inductance test" position. Click again on the "Run Tests" button. After running and naming the sweeps, you will now have three sweeps stored:

Illustration 7: All test slots filled The HINT suggests Right clicking, but I find that a normal left click on the results box on the right hand side, will bring up a plot: Illustration 8: Raw Plot Notice that the plots are not centered on 0dB. Pickups actually have a uniform response at low frequencies, so we choose an arbitrary frequency of 220 Hz, and use the tool at the bottom that looks like a wrench, to align them. It is easier to do this by making the plot full screen, before restoring it to a convenient size.

By examining the values at 200 Hz, we can figure out an offset to add using the "wrench" tool. Here I found that the first graph needed 1.2 db and the second graph needed 0.8 db to place them on the 0 db line. The inductance test does not need adjustment because the level is not important: This is the result: Illustration 9: Adjusting level Illustration 10: Corrected levels

Now that the levels are corrected, we can use the zoom tools in Rightmark to collect data. Here we place the cursor on the peak of the unloaded measurement, and the frequency is displayed in a text box at the lower left, as well as it being possible to read with reference to the marking grid. Illustration 11: Capturing measurement data After the peak amplitude and frequency of the loaded and unloaded plots, and the frequency of the inductance test are recorded, the plots can be selected and scaled in various ways to highlight different aspects or display a useful overall graph. With eight slots available, more than one pickup can be compared with another, or changes in the pickup can be documented. I have found that it is useful to have a spreadsheet that can be used to enter the data that is produced by the plots, and automatically calculates key values, such as the inductance. Ken Willmott 2016/09/26

Input Frequency Response Calibration The input circuit consists of an RC voltage divider, as is used in most oscilliscope probes. Just as with the probes, stray capacitances in the circuit require that the capacitor values be adjusted to achieve a balanced divider. Probes have an adjustable capacitor to allow user adjustment, but this feature was omitted from the integrator design for simplicity, and because it is a one time adjustment that can be done at build time. Consequently, it is desirable to measure the circuit, and replace or add capacitors in parallel to C2, until the circuit is equalized. The values of C1 and C2 are chosen somewhat empirically to match the present layout and input capacitance of the LT1058 op amp, which influences the circuit. The 4pF/30pF (V5.6) or 4pF/40pF (V5.7) combination comes quite close, but it isn't perfect. The difference shows up as an inaccuracy in amplitude values as measured here with an arbitrary pickup: On an oscilliscope, the frequency response can be monitored by looking at the "squareness" of a test signal while adjusting the probe capacitor. I found another method so that the calibration can be performed without a scope, using only the integrator circuitry. The key is that the -20dB/decade slope of the integrator is combined with the input circuit slope. So, if the circuit is not balanced, a slighly different slope will be observed. By appying the sweep test generator output directly to the input, it is possible to measure and graph the integrator slope, and adjust the capacitor values until it is closer to the desired -20dB response.

Since the grounds are usually common on the computer DAC interface, I found that I could just connect the input to the DAC output where it appears on the test coil (before the 100 ohm resistor!). Running some test sweeps produces a plot that has useful slopes above 200 Hz or so. Below that, the huge gain distorts the curve but we can ignore that. By choosing two values that are a decade apart, the plot should show a -20dB difference. Choose 500 Hz as a low frequency, normalize it to 0dB and then examine the response at 5000 Hz. Adding capacitance to C2 will increase the slope, decreasing it will decrease the slope. In this case, I got lucky and hit -20 exactly with a 4pF in parallel the first time, but some trial and error may be necessary, using different values.

Appendix V5.6 Integrator Schematic: Reference only. Not recommended for new builds! Use V5.7.

Note: The schematic shows IC1 as a TL084P. This part will work, but the preferred part is the Linear Technologies LT1058ACN. The LT part has better GBP, which results in more accurate integrator response at higher frequencies. The input circuit is sensitive, so the test leads as well as the switch connections LD/COM/IT should be as short as possible. The circuit must be in a shielded enclosure, and the test surface must be grounded. It can be conveniently connected to one of the auxiliary ground points G1/G2 by running an additional wire and clip lead for that purpose. The output gain switch S3 is usually not needed, and with V5.6 it is recommended to install a jumper from K1 to K2 to bypass it instead. Circuit V5.7 does not need a jumper, Those pads are left unconnected. In some cases, it makes sense to connect the input to COM instead of IN via the load select switch, to simplify and reduce the number of input wires. Because of the sensitivity of the circuit to small capacitances, the final device calibration which must be performed before use, should be performed with the entire device fully assembled, in its case with all covers secure. When you are choosing a compensation capacitor to parallel with C2, you can estimate it by allowing about 1pF for every 0.1dB of slope error. V5.5 Integrator PCB Parts Layout:

The V5.6 circuit has been upgraded to V5.7. Both those versions are still compatible with the V5.5 PCB. The V5.7 circuit has an improved low frequency response of 100Hz compared with the 200Hz of the V5.6. All new devices should be built as V5.7. Some component values have changed, R10 is now depopulated, and pads K1 and K2 are now left disconnected. Here is a view of an assembled V5.7 board: Here is a recommended housing layout:

V5.7 Integrator Schematic: