PLL Synthesizer with I 2 C Bus for TV Tuner

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Transcription:

PLL Synthesizer with I 2 C Bus for TV Tuner DESCRIPTION The NJW1504/1508 are a PLL frequency synthesizer especially designed for TV and VCR tuning systems and consists of PLL circuit and a prescaler which operates up to 1.0GHz, built into one chip. The NJW1504/1508 are controlled through an I 2 C-bus. FEATURES Operating Voltage 5V Low Operating Current : 15mA typ. @Vcc=5V Prescaler accepts frequencies up to 1GHz on chip Reference Signal : NJW1504: Reference Signal Oscillator with peripheral of Xtal on chip NJW1508: Buffer Amplifier for External Reference Signal on chip 34V max. tuning voltage output Package Outline: SSOP16 PACKAGE OUTLINE NJW1504V/NJW1508V BLOCK DIAGRAM BS0-BS3 VCC3 VCC1 5V GND BAND SW 4bit 4bit Latch I2C Bus Receive r ADRS SDA SCL HF IN 1/8 Programmable Divider 15bit 15bit Latch CP VCC2 PreAMP 8bit Latch AMPOUT AMP Phase OUT Phase Comp. 1/1024 1/512 (1/640) Ref. Divider X tal OSC OSCOUT XTAL (Note) Purchase of I 2 C components of New Japan RadioCo.,Ltd or one of its sublicensed Associated Companies conveys a license under the Philips I 2 C Patent Rights to use these components in an I 2 C system, provided that the system conforms to the I 2 C standard specification as definedby by Philips. - 1 -

ABSOLUTE MAXIMUM RATINGS (T A =25 C) Parameter Symbol Ratings Unit Supply Voltage (Vcc1, 3) Vcc1, Vcc3-0.3 to +6.5 V Supply Voltage (Vcc2) Vcc2-0.3 to +36 V Input Voltage (except I 2 C bus) Vi -0.3 to Vcc+0.3 V Output Voltage (except I 2 C bus) Vo -0.3 to Vcc+0.3 V I 2 C bus Input Voltage Viiic -0.3 to 6.5 V Power Dissipation PD 300 mw Operating Temperature Range T opr -20 to +85 C Storage Temperature Range T stg -40 to +125 C RECOMMENDED OPERATING CONDITION (T A =25 C) Parameter Condition Symbol Min. Typ. Max. Unit Operating Voltage Vcc1, Vcc3 Vcc1, Vcc3 4.5 5 5.5 V Operating Voltage Vcc2 Vcc2 0-34 V X tal Operating Range fxtal 3.15 4 4.05 MHz HF Input Frequency Input= -20dBm fhf 80-1000 MHz Clock Frequency f SCL 0-100 KHz Bus Free Time t BUF 4.7 - - us Data Hold Time t HDSTA 2 - - us SCL Low Hold Time t LOW 4.7 - - us SCL High Hold Time t HIGH 2 - - us Set-up Time Refer to I 2 C bus Timing Chart tsusta 2 - - us Data Hold Time thddat 0 - - us Data Set-up Time tsudat 250 - - ns Rise Time tr - - 1000 ns Fall Time tf - - 300 ns Data Set-up Time tsusto 4 - - us SDA t BUF t LOW t HIGH t SU;DAT t HD;STA SCL t HD;STA t R t HD;DAT t F t SU;STA t S U;STO I 2 C bus Timing Chart V IH min(0.7 Vcc1) and V IL max(0.3 Vcc1) - 2 -

ELECTRICAL CHARACTERISTICS (Vcc1,3=5V,Vcc2=34V,T A =25 C) Parameter Condition Symbol Min. Typ. Max. Unit Operating Current 1 f HF =100MHz I CC 12 15 21 ma Operating Current 2 AMPOUT: Low Level I CC 2-1.6 - ma AMP Input Current Phase OUT: High Imp (2.5V) I IN (-50) 0.1 (50) na AMP Output Current ANP OUT: Low Level AMPOUT Input=5V I OUT - - -2 ma AMP Gain f=1khz AV 40 50 60 db Phase Comparator Output Current Current Source I sourse 190 280 400 ua Phase Comparator Output Current Current Sink I sink -400-280 -190 ua Band Switch L Output Current BS0=BS1=0.3V I OBS0-1L -2.0-1 0 ma H Output Current BS0=BS1=4.7V I OBS0-1H 11.0 15.0 - ma L Output Current BS2=BS3=0.3V I OBS2-3L -2.0-1.0 0 ma H Output Current BS2=BS3=4.7V I OBS2-3H 5.5 7.5 - ma I 2 C bus H Input Current SCL, SDA Terminal I IN H -5 0 5 ua L Input Current SCL, SDA Terminal I IN L -5 0 5 ua H Input Voltage Range SCL, SDA Terminal V IH 3.5-5.3 V L Input Voltage Range SCL, SDA Terminal V IL 0-1.5 V ACK Sink Current ACK Output, SDA=0.4V V ACK 3 - - ma - 3 -

TEST CIRCUIT 5V SDA SCL 34V VS3 5V 2mV 1kHz VS2 2.5V OSC OUT 270 18p 4MHz 100 316k 16 15 14 13 12 11 10 9 HF GND VCC1 VCC3 BS3 BS2 BS1 BS0 XTAL ADRS SDA SCL OSC OUT VCC2 AMP OUT CP 1 2 3 4 5 6 7 8 1n 50 SG -20dBm 5V COUNTER VS1 4.7V or 0.3V - 4 -

I 2 C bus Protocols The input information, which consists of chip address and next two or four byte data, is received by I 2 C bus receiver. The allowable I 2 C bus protocols are as follows. (1) STA CA CB BB STO (2) STA CA D1 D2 STO (3) STA CA CB BB D1 D2 STO (4) STA CA D1 D2 CB BB STO STA: Start Condition STO: Stop Condition CA: Chip Address CB: Control Byte BB: Band switch Byte D1: Divider Byte 1 D2: Divider Byte 2 For suitable circuit operation,5-byte data should have chip address, 2-byte control data, band data, and 2-byte divider byte. Following chip address. 2-byte data is received. For distinction of each data, first and third data byte has a function bit. As function bit, divider byte has 1 and control/band data has 0. S DA SCL STA 1-7 8 9 1-7 8 9 9 ADDRESS R/W ACK DATA ACK ACK STO - 5 -

Data Format Parameter Symbol MSB LSB Chip Address CA 1 1 0 0 0 CA1 CA0 0 A Divider Byte 1 D1 0 N14 N13 N12 N11 N10 N9 N8 A Divider Byte 2 D2 N7 N6 N5 N4 N3 N2 N1 N0 A Control Byte CB 1 CP T2 T1 T0 RD1 RD0 A Band switch Byte BB BS3 BS2 BS1 BS0 A Data specifications : don t care ;0 or 1 CA1, CA0 : Programmable address bits ADRS Voltage CA1 CA0 Always valid 0 1 0 to 0.1 Vcc1 0 0 0.4 Vcc1 to 0.6 Vcc1 1 0 0.9 Vcc1 to Vcc1 1 1 BS0 to BS3 : Band switch buffers Control bits, BSn=1 then ON N0 to N14 : Control of Programmable divider bits, N14=MSB N0=LSB Dividing ratio : N=2 14 N14+2 13 N13+ +2 1 N1+N0 Maximum division ratio 32767 Minimum division ratio 256 CP : Charge Pump Current CP Charge Pump Current Conditions 1 280µA Normal, Default 0 60µA Test T0 to T2 :Test mode bits T0,T1,T2 :Phase Comparator Output bits T2 T1 T0 Phase Comparator, Band Switch Conditions 0 0 Normal Output Normal, Default 1 0 1 Phase Comparator (High Impedance) Test 1 1 0 Phase Comparator (Sink) Test 1 1 1 Phase Comparator (Source) Test RD1,RD0 : Reference Divider bits RD1 RD2 Reference Divider Conditions 0 640 1 1 512 Default 0 1 1024 (Note) Default : Power on reset - 6 -

TERMINAL CHARACTERISTICS No. Symbol Typ.DC Voltage (V) Equivalent Circuit Function 1 HF 3.2 1 High Frequency Signal Input 2 GND 0 3 GND 3 VCC1 5 2 Power Supply 4 VCC3 5 4 2 Band Switch Power Supply 5 6 BS3 BS2 0 5,6 Band Switch (Typ: 7.5mA) 7 8 BS1 BS0 0 7,8 Band Switch (Typ: 15mA) 9 CP - 9 Charge Pump Output - 7 -

No. Symbol Typ.DC Voltage (V) Equivalent Circuit Function 10 AMPOUT - 11 10 Amplifier Output 11 VCC2 34 Amplifier Power Supply 12 OSCOUT 4.1 12 Reference Oscillator Output 13 SCL - 13 SCL Input (I 2 C bus) 14 SDA - 14 SCL Input (I 2 C bus) 15 ADRS - 15 ADRS Input (I 2 C bus) 16 XTAL 3.3 Crystal Input 16-8 -

TYPICAL CHARACTERISTICS T A =25 C 40.0 VCC1 Supply Current Curve 0 XTAL Input Sensitivity Curve NJW1508 XTAL:50ome/0.1uF 35.0 Supply Current [ma] 30.0 25.0 20.0 15.0 10.0 5.0 Input Level [dbm] -10-20 -30-40 0.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 VCC1 Supply Voltage [V] -50 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Frequency [MHz] 50.0 BS0-BS1 Output Current Curve VCC1=VCC3=5.0V 25.0 BS3 Output Current Curve VCC1=VCC3=5.0V Output Current [ma] 40.0 30.0 20.0 Output Current [ma] 20.0 15.0 10.0 10.0 5.0 0.0 3.0 3.5 4.0 4.5 5.0 Output Voltage [V] 0.0 3.0 3.5 4.0 4.5 5.0 Output Voltage [V] - 9 -

MEMO [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.