2N7632UC IRHLUC767Z4 RADIATION HARDENED 6V, Combination N-P-CHANNEL LOGIC LEVEL POWER MOSFET TECHNOLOGY SURFACE MOUNT (LCC-6) Product Summary Part Number Radiation Level R DS(on) I D CHANNEL IRHLUC767Z4 IRHLUC763Z4 K Rads (Si) 3K Rads (Si).75Ω.75Ω.89A.89A N N.6Ω.6Ω -.65A -.65A P P International Rectifier s R7 TM Logic Level Power MOSFETs provide simple solution to interfacing CMOS and TTL control circuits to power devices in space and other radiation environments.the threshold voltage remains within acceptable operating limits over the full operating temperature and post radiation.this is achieved while maintaining single event gate rupture and single event burnout immunity. The device is ideal when used to interface directly with most logic gates, linear IC s, micro-controllers, and other device types that operate from a 3.3-5V source. It may also be used to increase the output current of a PWM, voltage comparator or an operational amplifier where the logic level drive signal is available. Absolute Maximum Ratings (Per Die) Parameter N-Channel P-Channel Units ID@ VGS = ±4.5V, TC= 25 C Continuous Drain Current.89 -.65 ID@ VGS = ±4.5V, TC= C Continuous Drain Current.56 -.4 IDM Pulsed Drain Current À 3.56-2.6 LCC-6 Features: n 5V CMOS and TTL Compatible PD-97268A n Low RDS(on) n Fast Switching n Single Event Effect (SEE) Hardened n Low Total Gate Charge n Simple Drive Requirements n Ease of Paralleling n Hermetically Sealed n Light Weight PD @ TC = 25 C Max. Power Dissipation.. W Linear Derating Factor.. W/ C VGS Gate-to-Source Voltage ± ± V EAS Single Pulse Avalanche Energy 2 Á 34 ² mj IAR Avalanche Current À.89 -.65 A EAR Repetitive Avalanche Energy À mj dv/dt Peak Diode Recovery dv/dt 4.7 Â -5.6 ³ V/ns TJ Operating Junction -55 to 5 TSTG Storage Temperature Range C Pckg. Mounting Surface Temp. 3 (for 5s) Weight.2 (Typical) g A For footnotes refer to the last page www.irf.com /8/
IRHLUC767Z4, 2N7632UC Electrical Characteristics For N-Channel Die @Tj = 25 C (Unless Otherwise specified) Parameter Min Typ Max Units Test Conditions BVDSS Drain-to-Source Breakdown Voltage 6 V VGS = V, ID = 25µA BVDSS/ TJ Temperature Coefficient of Breakdown.7 V/ C Reference to 25 C, ID =.ma Voltage RDS(on) Static Drain-to-Source On-State.75 Ω Resistance VGS = 4.5V, ID =.56A Ã VGS(th) Gate Threshold Voltage. 2. V VDS = VGS, ID = 25µA VGS(th)/ TJ Gate Threshold Voltage Coefficient -4.5 mv/ C gfs Forward Transconductance.25 S VDS = V, IDS =.56A Ã IDSS Zero Gate Voltage Drain Current. VDS= 48V,VGS= V µa VDS = 48V, VGS = V, TJ =25 C IGSS Gate-to-Source Leakage Forward VGS = V IGSS Gate-to-Source Leakage Reverse - na VGS = -V Qg Total Gate Charge 3.6 VGS = 4.5V, ID =.89A Qgs Gate-to-Source Charge.5 nc VDS = 3V Qgd Gate-to-Drain ( Miller ) Charge.8 td(on) Turn-On Delay Time 8. VDD = 3V, ID =.89A, tr Rise Time 5 ns VGS = 5.V, RG = 24Ω td(off) Turn-Off Delay Time 3 tf Fall Time 2 LS + LD Total Inductance 33 Ciss Input Capacitance 45 VGS = V, VDS = 25V Coss Output Capacitance 43 pf f =.MHz Crss Reverse Transfer Capacitance 2.5 nh Measured from the center of drain pad to center of source pad Rg Gate Resistance 8.2 Ω f =.MHz, open drain Source-Drain Diode Ratings and Characteristics (Per N Channel Die) Parameter Min Typ Max Units Test Conditions IS Continuous Source Current (Body Diode).89 ISM Pulse Source Current (Body Diode) À 3.56 A VSD Diode Forward Voltage.2 V Tj = 25 C, IS =.89A, VGS = V Ã trr Reverse Recovery Time 65 ns Tj = 25 C, IF =.89A, di/dt A/µs QRR Reverse Recovery Charge 67 nc VDD 25V Ã ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. Thermal Resistance (Per N Channel Die) Parameter Min Typ Max Units Test Conditions RthJA Junction-to-Ambient 25 Typical socket mount C/W Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page 2 www.irf.com
IRHLUC767Z4, 2N7632UC Electrical Characteristics For P-Channel Die @Tj = 25 C (Unless Otherwise specified) Parameter Min Typ Max Units Test Conditions BVDSS Drain-to-Source Breakdown Voltage -6 V VGS = V, ID = -25µA BVDSS/ TJ Temperature Coefficient of Breakdown -.6 V/ C Reference to 25 C, ID = -.ma Voltage RDS(on) Static Drain-to-Source On-State.6 Ω Resistance VGS = -4.5V, ID = -.4A Ã VGS(th) Gate Threshold Voltage -. -2. V VDS = VGS, ID = -25µA VGS(th)/ TJ Gate Threshold Voltage Coefficient 3.6 mv/ C gfs Forward Transconductance.5 S VDS = -V, IDS = -.4A Ã IDSS Zero Gate Voltage Drain Current -. VDS= -48V,VGS= V - µa VDS = -48V, VGS = V, TJ =25 C IGSS Gate-to-Source Leakage Forward - VGS = -V IGSS Gate-to-Source Leakage Reverse na VGS = V Qg Total Gate Charge 3.6 VGS = -4.5V, ID = -.65A Qgs Gate-to-Source Charge.5 nc VDS = -3V Qgd Gate-to-Drain ( Miller ) Charge.8 td(on) Turn-On Delay Time 23 VDD = -3V, ID = -.65A, tr Rise Time 22 ns VGS = -5.V, RG = 24Ω td(off) Turn-Off Delay Time 32 tf Fall Time 26 LS + LD Total Inductance 33 Ciss Input Capacitance 47 VGS = V, VDS = -25V Coss Output Capacitance 46 pf f =.MHz Crss Reverse Transfer Capacitance 8. nh Measured from the center of drain pad to center of source pad Rg Gate Resistance 52 Ω f =.MHz, open drain Source-Drain Diode Ratings and Characteristics (Per P Channel Die) Parameter Min Typ Max Units Test Conditions IS Continuous Source Current (Body Diode) -.65 ISM Pulse Source Current (Body Diode) À -2.6 A VSD Diode Forward Voltage -5. V Tj = 25 C, IS = -.65A, VGS = V Ã trr Reverse Recovery Time 35 ns Tj = 25 C, IF = -.65A, di/dt -A/µs QRR Reverse Recovery Charge 9.8 nc VDD -25V Ã ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. Thermal Resistance (Per P Channel Die) Parameter Min Typ Max Units Test Conditions RthJA Junction-to-Ambient 25 Typical socket mount C/W Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page www.irf.com 3
IRHLUC767Z4, 2N7632UC Radiation Characteristics International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-39 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics For N-Channel Device @Tj = 25 C, Post Total Dose Irradiation ÄÅ Parameter Upto 3K Rads (Si) Units Test Conditions Min Max BV DSS Drain-to-Source Breakdown Voltage 6 V V GS = V, I D = 25µA VGS(th) Gate Threshold Voltage. 2. VGS = V DS, I D = 25µA I GSS Gate-to-Source Leakage Forward na V GS = V I GSS Gate-to-Source Leakage Reverse - V GS = -V I DSS Zero Gate Voltage Drain Current. µa V DS = 48V, V GS = V R DS(on) Static Drain-to-Source On-State Resistance (TO-39).6 Ω VGS = 4.5V, I D =.56A R DS(on) Static Drain-to-Source On-state Resistance (LCC-6).75 Ω VGS = 4.5V, I D =.56A V SD Diode Forward Voltage.2 V VGS = V, I D =.89A. Part numbers IRHLUC767Z4, IRHLUC763Z4 International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area LET Energy Range VDS (V) (MeV/(mg/cm 2 )) (MeV) (µm) @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= V -2V -4V -5V -6V -7V 38 ± 5% 3 ± 7.5% 38 ± 7.5% 6 6 6 6 6 35 62 ± 5% 355 ± 7.5% 33 ± 7.5% 6 6 6 6 3-85 ± 5% 38 ± 7.5% 29 ± 7.5% 6 6 6 4 - - VDS 7 6 5 4 3 2 - -2-3 -4 VGS -5-6 -7 LET=38 ± 5% LET=62 ± 5% LET=85 ± 5% For footnotes refer to the last page Fig a. Typical Single Event Effect, Safe Operating Area 4 www.irf.com
Radiation Characteristics IRHLUC767Z4, 2N7632UC International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-39 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics For P-Channel Device @Tj = 25 C, Post Total Dose Irradiation ÄÅ Parameter Upto 3K Rads (Si) Units Test Conditions Min Max BV DSS Drain-to-Source Breakdown Voltage -6 V V GS = V, I D = -25µA VGS(th) Gate Threshold Voltage -. -2. VGS = V DS, I D = -25µA I GSS Gate-to-Source Leakage Forward - na V GS = -V I GSS Gate-to-Source Leakage Reverse V GS = V I DSS Zero Gate Voltage Drain Current -. µa V DS = -48V, V GS = V R DS(on) Static Drain-to-Source On-State Resistance (TO-39).4 Ω VGS = -4.5V, I D = -.4A R DS(on) Static Drain-to-Source On-state Resistance (LCC-6).6 Ω VGS = -4.5V, I D = -.4A V SD Diode Forward Voltage -5. V VGS = V, I D = -.65A. Part numbers IRHLUC767Z4, IRHLUC763Z4 International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area LET Energy Range VDS (V) (MeV/(mg/cm 2 )) (MeV) (µm) @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= V 2V 4V 5V 6V 7V 38 ± 5% 3 ± 7.5% 38 ± 7.5% -6-6 -6-6 -6-5 62 ± 5% 355 ± 7.5% 33 ± 7.5% -6-6 -6-6 -6-85 ± 5% 38 ± 7.5% 29 ± 7.5% -6-6 -6-6 - - Bias VDS (V) -7-6 -5-4 -3-2 - 2 3 4 5 6 7 Bias VGS (V) LET=38 ± 5% LET=62 ± 5% LET=85 ± 5% For footnotes refer to the last page Fig a. Typical Single Event Effect, Safe Operating Area www.irf.com 5
R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRHLUC767Z4, 2N7632UC N-Channel Die VGS TOP V 7.V 5.V 4.V 3.5V 3.V 2.75V BOTTOM 2.5V VGS TOP V 7.V 5.V 4.V 3.5V 3.V 2.75V BOTTOM 2.5V 2.5V 2.5V 6µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) 6µs PULSE WIDTH Tj = 5 C V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 2. I D =.89A I D, Drain-to-Source Current (A) T J = 5 C T J = 25 C V DS = 25V 6µs PULSE WIDTH.5..5 V GS = 4.5V 2 2.5 3 3.5 4 4.5 5 V GS, Gate-to-Source Voltage (V). -6-4 -2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 6 www.irf.com
V (BR)DSS, Drain-to-Source Breakdown Voltage (V) V GS(th) Gate threshold Voltage (V) R DS (on), Drain-to -Source On Resistance ( Ω) IRHLUC767Z4, 2N7632UC N-Channel Die R DS(on), Drain-to -Source On Resistance ( Ω) 3..6 2.5 I D =.89A.4 2..2 T J = 5 C.5 T J = 5 C...8 T J = 25 C.5 T J = 25 C.6 Vgs = 4.5V 2 3 4 5 6 7 8 9 2.4.5..5 2. 2.5 3. V GS, Gate -to -Source Voltage (V) I D, Drain Current (A) Fig 5. Typical On-Resistance Vs Gate Voltage Fig 6. Typical On-Resistance Vs Drain Current 75 3. I D =.ma 2.5 2. 65.5..5 I D = 5µA I D = 25µA I D =.ma I D = 5mA 55-6 -4-2 2 4 6 8 2 4 6 T J, Temperature ( C ). -6-4 -2 2 4 6 8 2 4 6 T J, Temperature ( C ) Fig 7. Typical Drain-to-Source Breakdown Voltage Vs Temperature Fig 8. Typical Threshold Voltage Vs Temperature www.irf.com 7
I D, Drain Current (A) C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) IRHLUC767Z4, 2N7632UC N-Channel Die 28 24 2 V GS = V, f = MHz C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 2 8 I D =.89A V DS = 48V V DS = 3V V DS = 2V 6 2 C iss C oss 6 8 4 4 C rss 2 FOR TEST CIRCUIT SEE FIGURE 7.5.5 2 2.5 3 3.5 4 V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Fig 9. Typical Capacitance Vs. Drain-to-Source Voltage Fig. Typical Gate Charge Vs. Gate-to-Source Voltage. I SD, Reverse Drain Current (A) T J = 5 C T J = 25 C.8.6.4.2. V GS = V.5..5 2. 2.5 V SD, Source-to-Drain Voltage (V) 25 5 75 25 5 T C, Case Temperature ( C) Fig. Typical Source-to-Drain Diode Forward Voltage Fig 2. Maximum Drain Current Vs. Case Temperature 8 www.irf.com
I D, Drain-to-Source Current (A) E AS, Single Pulse Avalanche Energy (mj) IRHLUC767Z4, 2N7632UC N-Channel Die OPERATION IN THIS AREA LIMITED BY R DS (on) µs 48 4 32 I D TOP.4A.56A BOTTOM.89A ms 24 ms 6 Tc = 25 C Tj = 5 C DC Single Pulse. V DS, Drain-to-Source Voltage (V) 8 25 5 75 25 5 Starting T J, Junction Temperature ( C) Fig 3. Maximum Safe Operating Area Fig 4. Maximum Avalanche Energy Vs. Drain Current Thermal Response ( Z thja ).2 D =.5..5 SINGLE PULSE.2 ( THERMAL RESPONSE ). P DM t Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc. E-5... t, Rectangular Pulse Duration (sec) t 2 Fig 5. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 9
IRHLUC767Z4, 2N7632UC N-Channel Die V (BR)DSS 5V tp V DS L DRIVER R G 2V V GS tp. D.U.T I AS.Ω + - V DD A I AS Fig 6a. Unclamped Inductive Test Circuit Fig 6b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 4.5V Q GS Q G Q GD 2V.2µF 5KΩ.3µF D.U.T. + V - DS V G V GS 3mA Charge Fig 7a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 7b. Gate Charge Test Circuit V GS V DS R D V DS 9% R G D.U.T. + - V DD V GS Pulse Width µs Duty Factor % % V GS t d(on) t r t d(off) t f Fig 8a. Switching Time Test Circuit Fig 8b. Switching Time Waveforms www.irf.com
-I D, Drain-to-Source Current (A) -I D, Drain-to-Source Current ( Α) R DS(on), Drain-to-Source On Resistance (Normalized) -I D, Drain-to-Source Current (A) IRHLUC767Z4, 2N7632UC P-Channel Die 2 VGS TOP -V -5.V -4.V -3.5V -3.V -2.5V -2.25V BOTTOM -2..V VGS TOP -V -5.V -4.V -3.5V -3.V -2.5V -2.25V BOTTOM -2..V -2.V -2.V 6µs PULSE WIDTH Tj = 25 C. -V DS, Drain-to-Source Voltage (V) 6µs PULSE WIDTH Tj = 5 C -V DS, Drain-to-Source Voltage (V) Fig 9. Typical Output Characteristics Fig 2. Typical Output Characteristics 2. I D = -.65A T J = 25 C.5 T J = 5 C. V DS = -25V 6µs PULSE WIDTH 2 2.5 3 3.5 4 4.5 -V GS, Gate-to-Source Voltage (V) V GS = -4.5V.5-6 -4-2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 2. Typical Transfer Characteristics Fig 22. Normalized On-Resistance Vs. Temperature www.irf.com
-V (BR)DSS, Drain-to-Source Breakdown Voltage (V) -V GS(th) Gate threshold Voltage (V) R DS (on), Drain-to -Source On Resistance ( Ω) IRHLUC767Z4, 2N7632UC P-Channel Die 2 R DS(on), Drain-to -Source On Resistance ( Ω) 4 3.2 3.5 I D = -.65A 2.8 3 2.5 2 T J = 5 C 2.4 2. T J = 5 C.5.6.5 T J = 25 C.2 T J = 25 C Vgs = -4.5V 2 3 4 5 6 7 8 9 2.8.5..5 2. 2.5 3. -V GS, Gate -to -Source Voltage (V) -I D, Drain Current (A) Fig 23. Typical On-Resistance Vs Gate Voltage Fig 24. Typical On-Resistance Vs Drain Current 8 2.5 I D = -.ma 2. 7.5. 6.5 I D = -5µA I D = -25µA I D = -.ma I D = -5mA 5-6 -4-2 2 4 6 8 2 4 6 T J, Temperature ( C ). -6-4 -2 2 4 6 8 2 4 6 T J, Temperature ( C ) Fig 25. Typical Drain-to-Source Breakdown Voltage Vs Temperature Fig 26. Typical Threshold Voltage Vs Temperature 2 www.irf.com
C, Capacitance (pf) -I SD, Reverse Drain Current (A) -I D, Drain Current (A) -V GS, Gate-to-Source Voltage (V) P-Channel Die 2 IRHLUC767Z4, 2N7632UC 24 2 V GS = V, f = MHz C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 2 I D = -.65A V DS = -48V V DS = -3V V DS = -2V 6 C iss 8 2 6 C oss 8 4 4 C rss -V DS, Drain-to-Source Voltage (V) 2 FOR TEST CIRCUIT SEE FIGURE 35.5.5 2 2.5 3 3.5 4 4.5 Q G, Total Gate Charge (nc) Fig 27. Typical Capacitance Vs.Drain-to-Source Voltage Fig 28. Typical Gate Charge Vs. Gate-to-Source Voltage.7.6 T J = 5 C.5.4 T J = 25 C.3.2 V GS = V..5.5 2 2.5 3 3.5 4 4.5 5. -V SD, Source-to-Drain Voltage (V) 25 5 75 25 5 T C, Case Temperature ( C) Fig 29. Typical Source-Drain Diode Forward Voltage Fig 3. Maximum Drain Current Vs. Case Temperature www.irf.com 3
-I D, Drain-to-Source Current (A) E AS, Single Pulse Avalanche Energy (mj) IRHLUC767Z4, 2N7632UC P-Channel Die 2 OPERATION IN THIS AREA LIMITED BY R DS (on) 8 7 6 5 TOP BOTTOM I D -.29A -.4A -.65A ms 4. Tc = 25 C Tj = 5 C Single Pulse ms DC -V DS, Drain-to-Source Voltage (V) 3 2 25 5 75 25 5 Starting T J, Junction Temperature ( C) Fig 3. Maximum Safe Operating Area Fig 32. Maximum Avalanche Energy Vs. Drain Current Thermal Response ( Z thja ).2 D =.5..5 SINGLE PULSE.2 ( THERMAL RESPONSE ). P DM t. E-5... t, Rectangular Pulse Duration (sec) t 2 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc Fig 33. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 4 www.irf.com
+ - IRHLUC767Z4, 2N7632UC P-Channel Die 2 V DS L I AS R G D.U.T. V DD -2V V GS tp I AS.Ω DRIVER A 5V tp V (BR)DSS Fig 34a. Unclamped Inductive Test Circuit Fig 34b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. -4.5V Q G 2V.2µF 5KΩ.3µF Q GS Q GD D.U.T. - + V DS V G V GS -3mA Charge Fig 35a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 35b. Gate Charge Test Circuit R D RG V GS V DS D.U.T. V DD V GS t d(on) t r t d(off) t f % V GS Pulse Width µs Duty Factor % 9% V DS Fig 36a. Switching Time Test Circuit Fig 36b. Switching Time Waveforms www.irf.com 5
IRHLUC767Z4, 2N7632UC Footnotes: À Repetitive Rating; Pulse width limited by maximum junction temperature. Á VDD = 25V, starting TJ = 25 C, L= 5.4mH, Peak IL =.89A, VGS = V Â ISD.89A, di/dt 2A/µs, VDD 6V, TJ 5 C Ã Pulse width 3 µs; Duty Cycle 2% Ä Total Dose Irradiation with VGS Bias. ± volt VGS applied and VDS = during irradiation per MIL-STD-75, method 9, condition A Å Total Dose Irradiation with VDS Bias. ± 48 volt VDS applied and VGS = during irradiation per MlL-STD-75, method 9, condition A ² VDD = -25V, starting TJ = 25 C, L= 6mH, Peak IL = -.65A, VGS = -V ³ ISD -.65A, di/dt -5A/µs, VDD -6V, TJ 5 C Case Outline and Dimensions LCC-6 ±..245.8 MAX..65 ±.8.9 ±..5 7 PIN. 4 PIN 5 6.25 3 2 NOTES: DIE ( N Ch ) DIE 2 ( P Ch ). OUTLINE CONFORMS TO MIL-PRF-95/255L 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 3. CONTROLLING DIMENSION: INCH. PIN NAME PIN # PIN NAME PIN # DRAIN - DRAIN - 4 GATE - 2 GATE - 5 SOURCE - 6 SOURCE - 3 IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 252-75 IR LEOMINSTER : 25 Crawford St., Leominster, Massachusetts 453, USA Tel: (978) 534-5776 TAC Fax: (3) 252-793 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. /2 6 www.irf.com