International Journal of Advanced Research in Engineering and Technology (IJARET) Volume 7, Issue 4, July-August 2016, pp. 72 78, Article ID: IJARET_07_04_010 Available online at http://www.iaeme.com/ijaret/issues.asp?jtype=ijaret&vtype=7&itype=4 ISSN Print: 0976-6480 and ISSN Online: 0976-6499 IAEME Publication THREE PHASE SEVENTEEN LEVEL SINGLE SWITCH CASCADED MULTILEVEL INVERTER FED INDUCTION MOTOR S. Naresh Assistant Professor, EEE Department, Siddhartha Institute of Engineering & Technology, JNTUH, Ibrahimpatnam, R.R.Dist, Telangana, India B. Dhanadeepika Associate Professor, EEE Department, Siddhartha Institute of Engineering & Technology, JNTUH, Ibrahimpatnam, R.R.Dist., Telangana, India M. Nagaraju Assistant Professor, EEE Department, Siddhartha Institute of Engineering & Technology, JNTUH, Ibrahimpatnam, R.R.Dist, Telangana, India ABSTRACT Induction motors are widely used in industries, because they are rugged, reliable and economical. Induction motor drive requires suitable converters to get the required speed and torque without or negligible ripples. In recent years, multilevel inverters are becoming increasingly popular for high-power applications due to their improved harmonic profile and increased power ratings. Several studies have been reported in the literature on multilevel inverters topologies, control techniques, and applications. Multilevel inverters produce a staircase output voltage from DC voltage sources. Requiring great number of semiconductor switches and this is main disadvantage of the multilevel inverters. Application of multilevel inverter for high power equipments in industry has become popular because of its high-quality output waveform. In this paper, a three phase seventeen level singe switch cascaded multilevel inverter is proposed with reduced number of switches, harmonic content and losses. An algorithm has been generated on the basis of optimized harmonic stepped waveform technique (OHSWT) to find out firing angle for multilevel inverter with unequal DC sauces to reduce harmonic content present in output. The main attention behind the objective of proposed project seventeen level Single Switch Cascade multilevel inverter topology is to achieve the high power quality, low total harmonic distortion and better power factor which is connected to 3-Phase induction motor. The THD and speed torque analysis of 3-phase IM are simulated using MATLAB/SIMULINK software. http://www.iaeme.com/ijaret/index.asp 72 editor@iaeme.com
Three Phase Seventeen Level Single Switch Cascaded Multilevel Inverter Fed Induction Motor Key words: Total harmonic distortion, Optimized harmonic stepped waveform, Cascaded H-bridge inverter, Voltage-source inverter, Multilevel inverters, Single Switch Cascade multilevel inverter, Fast Fourier analysis, insulated gate bipolar transistor, induction motor. Cite this article S.Naresh, B.Dhanadeepika and M.Nagaraju. Three Phase Seventeen Level Single Switch Cascaded Multilevel Inverter Fed Induction Motor. International Journal of Advanced Research in Engineering and Technology, 7(4), 2016, pp 72 78. http://www.iaeme.com/ijaret/issues.asp?jtype=ijaret&vtype=7&itype=4 1. INTRODUCTION MULTILEVEL voltage-source inverters are intensively studied for many industrial (J. Ebrahimi et al, 2011) high-power applications in the recent years and standard drives for medium-voltage industrial applications have become available Solutions with a higher number of output voltage levels have the capability to synthesize waveforms with a better harmonic spectrum and to limit the motor winding insulation stress. Many studies have been conducted toward improving multilevel inverter Medium power motor drives and utilities require medium voltage and higher power level. In a medium voltage grid, connecting only one power semiconductor switch directly will create problem. To overcome this problem, a multilevel inverter topology has been introduced as an alternative in medium voltage and high power situations. A multilevel inverter use renewable energy as source and can achieve high power rating. So, renewable energy sources such as solar, fuel cells and wind can be easily interfaced to a multilevel inverter structure for a high power application Multilevel inverter includes an array of semiconductors and dc voltage sources, the output of which generate voltages with stepped waveforms (N Yousefpoor et al, 2009). In comparison with a two-level voltage-source inverter (VSI), the multilevel VSI enables to synthesize output voltages with reduced harmonic distortion and lower electromagnetic interference (Ebrahim Babaei et al, 2008). By increasing the number of levels in the multilevel inverters, the output voltages have more steps in generating a staircase waveform, which has a reduced harmonic distortion (E. Babaei et al, 2007). However, a larger number of levels increase the number of devices that must be controlled and the control complexity. (Morteza Farsadi et al, 2013). The multilevel inverter concept has been used since past three decades (M. Malinowski et al, 2010). The multilevel inverter begins with a three-level inverter. Thereafter, many multilevel inverter topologies have been developed. However, the main concept of a multilevel inverter is to achieve high power with use of many power semiconductor switches and numerous low voltage dc sources to obtain the power conversion that lookalike a staircase voltage waveform. The dc voltage sources for multilevel (M. Farhadi Kangarlu et al, 2013), inverter are given by battery, renewable energy and capacitor voltage sources. The proper switching of the power switches combines these multiple dc sources to achieve high power output voltage. The voltage rating of the power semiconductor devices depends only upon the total peak value of the dc voltage source that is connected to the device. Three major classification of multilevel inverter structures are cascaded H-bridge inverter with separate dc source, diode clamped (neutral-clamped), and flying capacitor (capacitor clamped). 2. THE PROPOSED PROJECT THREE PHASE SEVENTEEN LEVEL SINGLE SWITCH CASCADED MULTILEVEL INVERTER A new Single Switch Cascade multilevel inverter (SSCMI) has proposed and illustrated in Figure 2.1. The Single switch cascaded multilevel inverter (SSCMLI) consists of an H bridge inverter that is used to change the direction of current through the load to obtain an alternating current flow across the load. It consists of parallel connection of switches connected parallel to H bridge inverter with a unequal DC voltage source in between them. Fig 2.1 Single switch cascaded H- Bridge multilevel inverter Initially, switch s1 and s2 are turned on for supplying power in the positive direction across load. After positive cycle is finished switches s1 and s2 http://www.iaeme.com/ijaret/index.asp 73 editor@iaeme.com
S.Naresh, B.Dhanadeepika and M.Nagaraju are turned off. Now for reversing the direction of flow of power across load, switches s3 and s4 are turned on. At the end of negative cycle, switches s3 and s4 are turned off. There is a period of gap is left between positive to negative cycle and negative to positive cycle, in that period switch R is turned on and turned off for continuous conduction of current across the load that is stored in the load if its inductive and this switch is useful in reducing voltage ripple that occur in between cycles due to inductive loads. Figure 2.1 Single switch cascaded H- Bridge multilevel inverter Fig. 2.1 shows topology of a sinl switch cascade multilevel inverter with isolated dc-voltage sources. An output phase-voltage waveform is obtained by summing the bridges output voltages Vo (t) = Vo 1 (t) + Vo, 2 (t) + + Vo, n (t) Table 2.1 Comparison of Cascaded multi level inverter and Single switch Cascaded multi level inverter Parameter Cascaded multi level inverter SSCMLI No of switches required 4N 4+N No of sources required N N Maximum output voltage N*V dc - 4NVsd N*V dc - (4+N)Vsd 3. OPTIMIZED HARMONIC STEPPED WAVE FORM TECHNIQUE The objective here is to determine the switching angles 0 o < θ 1 < θ 2 <... < θ s < 90 o so as to eliminate (S-1) certain lower frequency harmonics from the output voltage waveform while generating the desired fundamental component, V f. This necessitates, mathematically, solving S equations derived from equation (1). The mathematical statement of these conditions is as follows: [V 1 cos(θ 1 )+V 2 cos(θ 2 ) +... + V S cos(θ S )]= m a [V 1 cos(3θ 1 )+V c cos(3θ 2 )+...+ V S cos(3θ S )]= 0 [V 1 cos (5θ 1 ) +V2 2 cos (5θ 2 ) +. + V S cos(5θ S )]= 0 [V 1 cos(hθ 1 )+V 2 cos(hθ 2 )+...+ V S cos(hθ S )]= 0 http://www.iaeme.com/ijaret/index.asp 74 editor@iaeme.com
Three Phase Seventeen Level Single Switch Cascaded Multilevel Inverter Fed Induction Motor In which h is the highest order of the harmonics to be eliminated, Note that for three-phase, three-wire systems, and the triplen harmonics in each phase need not to be eliminated, as they are automatically cancelled in the line- to-line voltage. Assuming V dc =V 1 +V 2 + +V S, m a= V f / (4.Vdc/pi) V 1dc =V 1 /V dc, V 2dc =V 2 /V dc V Sdc =V S /V dc., equations (1) can be rewritten as: [V 1dc cos(θ 1 )+V 2dc cos(θ 2 ) +... + V Sdc cos(θ S )]= m a [V 1dc cos(3θ 1 )+ V 2dc cos(3θ 2 )+... + V Sdc cos(3θ S )]= 0 [V 1dc cos (5θ 1 ) +V 2dc cos (5θ 2 ) +...... + V Sdc cos(5θ S )]= 0 (2) [V 1dc cos (hθ 1 ) +V 2dc cos (hθ 2 ) +... + V Sdc cos(hθ S )]= 0 Equations have been set up, from which, the switching angles θ 1, θ2...θ n can be calculated. These equations are nonlinear as well as transcendental in nature, which suggests a possibility of multiple solutions. Usually, the Newton-Raphson method, mathematical Resultant theory, and Homotopy algorithm are used to solve such nonlinear equation systems. In this paper, Homotopy algorithm is used, which solves the transcendental equations with a much simpler formulation. The optimized harmonic stepped waveform (OHSW) technique was used in this paper. When OHSW technique is employed along with the multilevel topology, THD of output waveform is reduced without using any filter circuit is possible. Switching devices are turn on and turn off only one time in a complete cycle. Thus, switching loss and EMI problem can be overcome. Fig. 4 shows a simulation circuit for proposed project three phase seventeen level single switch cascaded multi inverter simulation diagram. 4. SIMULATION RESULTS A. Three phase seventeen-level single switch cascaded multi level inverter fed three phase IM is shown in figure 4.1. Figure 4.1 Simulation circuit for proposed project three phase seventeen level single switch cascaded multilevel inverter fed 3-phase IM http://www.iaeme.com/ijaret/index.asp 75 editor@iaeme.com
S.Naresh, B.Dhanadeepika and M.Nagaraju Figure 4.3 Speed and Torque of the three phase IM driven by the SSCMLI Figure 4.2 Stator current of the three phase IM driven by the SSCMLI Figure 4.4 Output Voltage waveform of Three Phase Single switch cascaded multilevel inverter fed three phase IM in MATLAB http://www.iaeme.com/ijaret/index.asp 76 editor@iaeme.com
Three Phase Seventeen Level Single Switch Cascaded Multilevel Inverter Fed Induction Motor 5. CONCLUSION The output voltage waveform for Single switch cascaded multilevel inverter fed three phase IM as shown in figure 4.4 and FFT Analysis on output current waveform is shown in the figure 5.1 and Total Harmonic Distortion in MATLAB is 7.16%. The modelling of single switch cascaded multilevel inverter fed induction motor drive was done and simulated using Simulink. The total harmonic distortion is very low compared to that of classical multilevel inverter. The simulation result shows that the harmonics have been reduced considerably. The multilevel inverter fed induction motor system has been successfully simulated and the results of voltage waveforms, current waveforms, motor speed, electromagnetic torque and frequency spectrum for the output were obtained. The inverter system can be used for industries where the adjustable speed drives are required. Figure 5.1 THD (Total Harmonic Distortion) current for the proposed three phase seventeen level SSCMI fed 3 phase IM The main advantages of the Single Switch Cascade multilevel inverter (SSCMI) are: Improve the output voltage quality Reduced number of switching devices, cost & complexity Improves the power factor Small on-state voltage drop and conduction losses Reduction of dv/dt stresses on the load Using optimized harmonic stepped waveform technique. The total harmonic content present in the output current of proposed circuit after applying OHSW is 7.16% in MATLAB. REFERENCES [1] Malinowski, M. Gopakumar, K. Rodriguez, J. and Perez, M. (2010), A Survey On Cascaded Multilevel Inverter, IEEE transaction on Industrial Electronics, 57(7), pp. 2197 2206. [2] Farhadi Kangarlu, M. Babaei, E. (2013),A generalized cascaded multilevel inverter using series connection of submultilevel inverter, IEEE Transaction on Power Electronics, 28(2), pp. 625 636. [3] Ebrahimi, J. Babaei, E. and Gharehpetian, G.B.(2011), A new topology of cascaded multilevel converters with reduced number of components for high-voltage applications, IEEE Transaction on Power Electronics, 26(11), pp. 3119 3130. [4] Ebrahim Babaei (2008), A cascade multilevel converter topology with reduced number of switches, IEEE Transaction on Power Electronics, 23(6), pp. 2657 2664. [5] Manjrekar, M. Lipo, T.A. (1998), A hybrid multilevel inverter topology for drive application, Proceedings of APEC, pp. 523-529. [6] Babaei, E. Hosseini, S.H. Gharehpetian, G.B. Tarafdar Haque, M. and Sabahi, M. (2007), Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology, Electric Power System Research, 77(8), pp. 1073 1085. http://www.iaeme.com/ijaret/index.asp 77 editor@iaeme.com
S.Naresh, B.Dhanadeepika and M.Nagaraju [7] Babaei E. and Moeinian, M. S.(2010), Asymmetric cascaded multilevel inverter with charge balance control of a low resolution symmetric subsystem, Energy Conversion and Management, 51(11), pp. 2272 2278. [8] Zahra Bayat (2012) and Ebrahim Babaei, A New Cascaded Multilevel Inverter with Reduced Number of Switches, IEEE conference on power electronics. [9] Yousefpoor, N. Fathi, S. H. Farokhnia N. and Sadeghi, S. H. (2009), Application of OHSW technique in cascaded multi-level inverter with adjustable dc sources, International Conference on Electric Power and Energy Conversion System, pp.1 6. [10] Pradeep B Jyoti, Dr. J Amarnath and Dr. Subba Rayadu, Carrier Based Hybrid PWM Algorithm with Reduced Common Mode Voltage For Three Phase Voltage Source Inverter Fed Induction Motor Drives. International Journal of Electrical Engineering and Technology, 7(4), 2016, pp 72 78. [11] P.H. Zope, Prashant Sonare, Avnish Bora and Rashmi Kalla, Simulation and Implementation o0f Control Strategy For Z-Source Inverter In The Speed Control of Induction Motor. International Journal of Electrical Engineering and Technology, 3(1), 2012, pp 21 30. [12] A.O.Amalkar and Prof.K.B.Khanchandani, Simulation and Implementation o0f Control Strategy For Z-Source Inverter In The Speed Control of Induction Motor. International Journal of Advanced Research in Engineering and Technology, 3(1), 2012, pp 21 30. [13] Manisha M. Patel and Dr. Anil Kumar Sharma, Modeling & Simulation of Volt/Hz Speed Control For Induction Motor Using Dspace Platform. International Journal of Electrical Engineering & Technology, 7(3), 2016, pp. 145 156 [14] Rufer, A. Veenstra, M. and Gopakumar, A. (1999), Asymmetric multilevel converter for high resolution voltage phasor generation, in Proc. Eur. Conf. Power Electron. Appl, Lausanne, Switzerland, pp. 1 10. AUTHORS PROFILE S NARESH Received B. Tech degree in Electrical & Electronics Engineering from Visvesvaraya College of Engineering & Technology, Hyderabad, M.Tech in Power Electronics and Electrical Drives from JNTUH, Hyderabad, Presently working at Siddhartha Institute of Engineering Technology, Hyderabad (T.S) as an Assistant Professor in the Department of EEE. Interested area of Power Electronics, Machines, Power Systems, Power Quality and FACTS. B.DHANADEEPIKA has obtained B.Tech. Degree in Electrical & Electronics Engineering from JNTU, Hyderabad University, M.Tech in Electrical Power System from JNTUH. Presently she is working at Siddhartha Institute of Engineering Technology, Hyderabad (T.S) as an Associate Professor in the Department of EEE. Areas of interest are Power systems, Power Quality, Power Electronics and Microgrids. M. NAGRAJU Received B. Tech degree in Electrical & Electronics Engineering from Vivekananda Institute of Engineering & Technology, JNTUH. M.Tech in Electrical Power Systems from JNTUH. Presently He is working at Siddhartha Institute of Engineering & Technology, Hyderabad (T.S) as an Assistant Professor in the Department of EEE. Interested areas of Machines, Power Systems, Power Quality and FACTS. http://www.iaeme.com/ijaret/index.asp 78 editor@iaeme.com