Grid Power Quality Analysis of 3-Phase System Using Low Cost Digital Signal Processor Sravan Vorem, Dr. Vinod John Department of Electrical Engineering Indian Institute of Science Bangalore 56002 Email: sravanvorem29@gmail.com Abstract This paper presents a power quality monitoring system for 3-phase (3-wire and 4-wire) power system operating under balanced and unbalanced conditions. It acquires voltage and current signals from the grid and calculates frequency, magnitude and phase angle of voltage and current signals, active power, reactive power, power factor, harmonics and Total Harmonic Distortion (THD) in a fast, low cost, low power Digital Signal Processor(DSP). It sends those calculated data to Personal Computer (PC) via RS-232 serial link and displays the data into a Graphical User interface (GUI) built in Visual Basic(VB) environment. The timing analysis of algorithm indicates that it is feasible to interprate these along with the control algorithm of a power converter. This is a single controller used for controlling, monitoring and diagnostic purpose. keywords: powerquality(pq), DigitalSignalProcessor(DSP), PhaseLockedLoop(PLL), Unbalance, Fast FourierTransform(FFT), GraphicalUserInterface(GUI). A. Calculation of frequency Measurement of fundamental quantities such as phase and frequency is carried out using Phase Locked Loop (PLL)[], [2]. According to this method the phase voltages V a,v b,v c are transformed to V α,v β using 3-phase to 2-phase transformation. These stationary reference frame voltages are then transformed to voltages V d,v q frame of reference synchronized to the utility frequency. The transformations are shown below VR VOLTAGES VY FROM VB GRID Voltage and Current sensing card Scaling and isolation VR VY VB IR IY IB voltage and current signals to DSP DSP PROCESSOR Communication via RS 232 PC Display on PC I. INTRODUCTION Fig.. Block Diagram Representation of the System Today most of the algorithms for controlling medium to high power electronic equipment are implemented in high performance digital controllers. The DSP s are low cost, low power and have high performance capability. The memory and time required for implementing power quality algorithms can be designed to be less, the additional computing power and memory available is used for implementing the algorithms to control the system. The advantage of this system is we can have continuous monitoring of the system without any additional devices in the system. We can also program it to display an error message if there is a fault in the system. This paper presents methods to obtain various parameters related to system power quality. The experimental results indicate that the power quality evaluation can be performed at a lower frequency compared to the control sampling rate required by typical power converters. Three phase voltages from the grid are given by Where θ =(ωt + θ 0 ) V a = V m cos (θ) () V b = V m cos (θ 20) (2) V c = V m cos (θ 240) (3) Transformation from 3-Phase to 2-Phase can be carried out as Vc V β II. CALCULATION OF DISPLAY QUANTITIES Va Monitoring power quality requires a wide range of quantities in the system to be monitored. These variables include voltage and current amplitudes, phase angles, frequency, active power, reactive power, power factor, harmonics etc. The following section describes the algorithms used to evaluate these quantities. Vb Fig. 2. 3-Phase to 2-Phase Transformation Vα 07
V α = V a (4) = V m cos (θ) (5) V THD = I THD = ΣVk 2/V () Σi 2 k /i Where k =2, 3...,N/2 (2) V β = (V c V b ) 3 (6) = V m sin (θ) (7) This is then transformed to synchronous frame (V d, V q ) given by [ Vq ] = V d [ cos (θ ) sin (θ ) sin (θ ) cos(θ ) ][ Vα V β ] substituting for V α and V β we get [ ] [ ] [ ] Vq cos (θ = V θ) cos (Δθ) V m d sin (θ = V θ) m sin (Δθ) The angle θ used in these transformations is obtained by integrating a frequency command ω as shown in Fig.3. If the frequency command ω is identical to the utility frequency, the voltages V d,v q appear as dc values depending on the angle θ. If the error Δθ between the utility angle θ and the PLL output θ is set to zero, V q = V m and V d = 0. This offers immediate possibility to lock onto the utility voltage by regulation of V d to zero. Va Vb Vc 3 phase to 2 phase(α, β) Transformation Fig. 3. α, β to d, q Tranformation Vq Vd V d * =0 Kp + STp STp + STs ω ff + + Block diagram representation of PLL Using this algorithm it is possible to monitor the system frequency and the phase angle of the positive sequence of the fundamental voltage. B. Calculation of harmonics Harmonic analysis is carried out using Fourier Transforms[4]. The Discrete Fourier Transform (DFT) of a finitelength sequence x [n] of length N is X [k] = N i=0 ω S θ* (8) (9) x [n] W kn N k =0,,...,N (0) Where W N = e j(2π/n) and X [k] 2/N gives magnitude of the k th harmonic. The use of FFT redues the number of multiplications required when compared to DFT. The Total Harmonic Distortion(THD) is given as The FFT algorithm is used to evaluate the harmonics and the THD in voltage and current signals. Since the voltage and currents fed to the processor, as signals the performance of the algorithm is similar for both the signals. A limited 32 point FFT has been used to keep the computation time acceptable. C. Magnitude and phase calculations Magnitude calculations are carried out by multiplying the utility voltages with unit sine and cosine and low pass-filtering, the mathematical equations of the utillity voltages are given in equations eq(), eq(2), eq(3). Multiplying V a by unit sin (θ ) and cos (θ ),whereθ = (ω t + θ0 ) we get V a = V a sin (ω t + θ0) (3) V a2 = V a cos (ω t + θ0 ) (4) solving the above equations we get V a = V m /2(sin(2ωt +(θ 0 θ 0)) + sin (θ 0 θ 0)) V a2 = V m /2(cos(2ωt +(θ 0 θ 0 )) + cos (θ 0 θ 0 )) By low pass filtering, the 00Hz and other harmonic components are eliminated, and the output become as given V s = V m /2sin(θ 0 θ0 ) (5) V c = V m /2cos(θ 0 θ0) (6) The magnitude and phase angle are given as V = 2 Vs 2 + V c 2 (7) θ = arctan(v s /V c ) (8) The other two phase voltages and currents can be calculated similarly. Equation eq(7) is implemented as a lookup table in the DSP. The mathematical expression (i.e.taylor s series expansion) for arctan is given as arctan (x) =x x3 3 + x5 5 x7... (9) 7 the above equation is implemented in DSP for calculation of theta. D. Real and Reactive Power Calculations The active and reactive powers are calculated using the fundamental quantities of the voltage and currents evaluated using equations eq(7), eq(8) and are given by The active power per phase P = V I cos (θ θ i ) (20) where θ,θ i are phase angles of R-phase voltage and current respectively. 08
similarly the other two phases are calculated. Total real power is the sum of the three -phase powers Reactive power per phase Total reactive power is P = P + P 2 + P 3 (2) Q = V I sin (θ θ i ) (22) (23) Q = Q + Q 2 + Q 3 (24) te that the real and reactive power is based on the fundamental component of the signals. This prevents any error introduced due to harmonics. E. Power Factor Calculation The power factor of a three phase system is calculated as. cos (θ) = P P 2 + Q 2 (25) F. Communication between DSP and PC Serial link RS-232 [5] is used to transfer the data form DSP to PC. The data acquired from the DSP is displayed on the PC using GUI built in VB environment. III. HARDWARE IMPLEMENTATION A. Voltage sensing card Voltage sensing card is used to scale down the voltages to a desired level of ±0V and to provide isolation between the grid and DSP board. The specifiactions of voltage sensing card used are ) Range of input voltage is ± 700V. 2) Range of output Voltage is ± 0V. 3) Bandwidth =20KHz. 4) Isolation between input and output. The block diagram of voltage sensing card is shown in Fig.4. B. Current sensing card The hall effect current sensor HTP50 is used for sensing currents, it measures current in the range ± 50A and gives an output voltage in the range ± 0V. The specifiactions of current sensing card used are ) power supply: +5V,0,-5V. 2) primary current amplitude: ±50 maximum. 3) output signal amplitude: ±0V maximum. 4) Bandwidth: 00KHz. 5) n-linearity: 0.2%. C. DSP Implementation The signals from the sensors (voltage and currents) are given to the ADC of DSP. The ADC takes the signals only in the range of ± 0V. The DSP samples these signals at a sampling rate of 0kHz (i.e00μs) which is generally used for controlling purpose, these sampled signals can be used to implement the controlling algorithms, with the remaining time the power quality quantities are calculated. The flow chart in Fig.5. illustrates the implementation of the algorithm. START Voltage and current signals from sensors ADC Sampling rate is 0kHz Implenetation of control algorithms is previous PQ compuation finished if counter =0 for down sampling low priority interrupt control Reset counter +5V LM 7805 Fly Back +5V Store the values in memory Converter if sufficient no of points are accquired +5V LM 7805 +5V Calculate power quality algorithms and send to PC Input Voltage Divider Differential Amplifier Output If the sampling time >=90usec HP 7800 Repeat High priority interupt control Fig. 4. Block diagram of Voltage sensing card Fig. 5. Flowchart for embedding the PQ algorithm with converter control 09
IV. EXPERIMENTAL RESULTS The PQ algorithms are tested with a wide range of signals. Fig.6. and Fig.7. shows the voltage signals that are scaled down and isolated from the grid by voltage sensing card. Fig. 9. Vd,Vq Transformation of Grid voltages (Scale X-axis 5ms/div and Y-axis 2V/div) Fig. 6. Scaled down voltages (Va and Vb) obtained from the grid (Scale X-axis 5ms/div and Y-axis 2V/div) The magnitude and phase angles of the above voltage signals are calculated and outputed for verification on the DAC of the DSP board. Fig.0. shows the magnitude of phase a and phase b and Fig.. shows the magnitude of phase a and phase c and the corresponding phase angles calculated are shown in Fig.2. and Fig.3. respectievely. Fig. 7. Scaled down voltages (Va and Vc) obtained from the grid (Scale X-axis 5ms/div and Y-axis 2V/div) Fig.8. is 3-phase to 2-phase transformation of the above voltage signals and Fig.9. shows the transformation from stationary frame of reference to synchronous frame of reference (i.e α, β to d, q transformation). Fig. 0. Magnitude of Va and Vb (Scale X-axis 5ms/div and Y-axis 2V/div) Fig. 8. 3-phase to 2-phase Transformation of Grid voltages (Scale X-axis 5ms/div and Y-axis 2V/div) Fig.. Magnitude of Va and Vc (Scale X-axis 5ms/div and Y-axis 2V/div) 0
Fig. 2. Phase angle of Va and Vb (Scale X-axis 5ms/div and Y-axis 2V/div) Fig. 5. Increase in a-phase and corresponding change in magnitude of the algorithm (Scale X-axis 00ms/div and Y-axis 5V/div) Fig. 3. Phase angle of Va and Vc (Scale X-axis 5ms/div and Y-axis 2V/div) The PQ algorithms are tested for different unbalanced conditions using a second DSP as a signal generator that can provide signal inputs with controllable magnitude, phase and frequency, the figure Fig.4. shows the unbalance in magnitude of a 3-phase system in which magnitude of phase a and phase b voltage waves stepped periodically where as the magnitude of phase c is constant, the corresponding change in the magnitudes of PQ algorithm are shown in Fig.5., Fig.6. and Fig.7. Fig. 6. Decrease in b-phase and corresponding change in magnitude of the algorithm (Scale X-axis 00ms/div and Y-axis 5V/div) Harmonic analysis is carried out using Fast Fourier Transform(FFT) algorithms, the harmonic spectrum of a sine wave and square which are input to voltage inputs of the DSP board are shown in Fig.8. and Fig.9. The table.i shows the computation time required for different subroutines. It shows that PQ algorithm can be implemented many times in a fundamental cycle. Fig. 4. Unbalance sine wave (Scale X-axis 00ms/div and Y-axis 0V/div) Fig. 7. C-phase voltage and corresponding magnitude of the algorithm (Scale X-axis 20ms/div and Y-axis 5V/div)
3 2.5 2.5 0.5 0 0 00 200 300 400 500 600 700 800 Fig. 8. Harmonic spectrum of a sine wave signal TABLE I COMPUTATION TIME FOR DIFFERENT SUBROUTINES S. Subroutine time in μsec Analog to digital conversion for 6 channels.300 2 PLL Program 8.000 3 Magnitude and Theta calculation for all 6 signals 40.000 4 Power calculation 4.000 5 FFT algorithm for one signal 96.000 6 3-phase to 2-phas.e transformation 0.740 7 Digital to Analog Conversion 2.20 8 Data transmission of 24 signals at 9600 baud rate 25000.000 4 3.5 3 2.5 2.5 0.5 0 0 00 200 300 400 500 600 700 800 Fig. 9. Harmonic spectrum of a square wave signal The Fig.20. shows the power quality monitoring system built in VB. This can be used as a user friendly interface which an operator can monitor the PQ status. sampling rate of DSP, it is possible to control and monitor the system using high and low priority interrupts. REFERENCES [] Albert So, rman Tse,W. L. Chan and L. L. Lai, A Low-Cost Power Quality Meter for Utility and Consumer Assements, International Conference on Electric Utility Deregulation and Restructuring and Power Technologies 2000, City University, London, 4-7 April 2000. [2] V. Kaura and V. Blasko, Operation of a phase locked loop system under distorted utility conditions, in IEEE Transactions on Industry Applications, Volume 33, Issue, Jan.-Feb. 997 Page(s):58-63. [3] Anirban Goshal and Vinod John, A Method To Improve PLL Performance Under Abnormal Grid Conditions, National Power Electronic Conference-2007, Bangalore. [4] V.T. Ranganathan Course notes on electrical drives, Dept of Electrical engg.,indian Institute of Science, Bangalore,India. [5] Alan V. Oppenheim and Ronald W. Schafer, Discrete Time Signal Processing, Prentice Hall signal processing series,989, New Jersey. [6] Jan Axelson, Serial Port Complete, Penaram International,998,Mumbai. Fig. 20. Power Quality monitoring system built in VB. V. CONCLUSION A wide range of power quality measurements have been made on an setup Experimental to verify the capability of the power quality meter. It has been seen that the algorithms work well even in the presence of harmonics. The DSP processor used is TMSLF2407 from Texas Instruments. The clock frequency of DSP is 40MHz, so it takes 25ns for execution of a single instruction cycle, though the table indicates the time required for implementing the PQ algorithms and transferring them to PC is more than the 2