Quad Low Offset, Low Power Operational Amplifier OP4 FEATURES Low input offset voltage 5 μv max Low offset voltage drift over 55 C to 25 C,.2 pv/ C max Low supply current (per amplifier) 725 μa max High open-loop gain 5 V/mV min Input bias current 3 na max Low noise voltage density nv/ Hz at khz Stable with large capacitive loads nf typ Pin compatible to LM48, HA474, RM456, and LT4 with improved performance Available in die form GENERAL DESCRIPTION The OP4 is the first monolithic quad operational amplifier that features OP77-type performance. Precision performance is not sacrificed with the OP4 to obtain the space and cost savings offered by quad amplifiers. The OP4 features an extremely low input offset voltage of less than 5 μv with a drift of under.2 μv/ C, guaranteed over the full military temperature range. Open-loop gain of the OP4 is over 5,, into a kω load, input bias current is under 3 na, CMR is above 2 db, and PSRR is below.8 μv/v. On-chip Zener zap trimming is used to achieve the low input offset voltage of the OP4 and eliminates the need for offset nulling. The OP4 conforms to the industry-standard quad pinout which does not have null terminals. OUT A IN A 2 IN A 3 V 4 IN B 5 IN B 6 OUT B 7 FUNCTIONAL BLOCK DIAGRAM - OP4 - - - 4 OUT D 3 IN D 2 IN D V IN C 9 IN C 8 OUT C Figure. 4-Pin Ceramic DIP (Y-Suffix) and 4-Pin Plastic DIP (P-Suffix) 34- - OUTA 6 OUT D IN A 2 5 IN D - IN A 3 4 IN D V 4 OP4 3 V IN B 5 2 IN C IN B 6 IN C OUT B 7 OUT C NC 8 9 NC - NC = NO CONNECT Figure 2. 6-Pin SOIC (S-Suffix) The OP4 features low power consumption, drawing less than 725 μa per amplifier. The total current drawn by this quad amplifier is less than that of a single OP7, yet the OP4 offers significant improvements over this industry-standard op amp. Voltage noise density of the OP4 is a low nv/ Hz at Hz, which is half that of most competitive devices. The OP4 is pin compatible with the LM48, HA474, RM456, and LT4 operational amplifiers and can be used to upgrade systems having these devices. The OP4 is an ideal choice for applications requiring multiple precision operational amplifiers and where low power consumption is critical. - 34-2 V BIAS VOLTAGE LIMITING NETWORK OUT IN IN V Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Figure 3. Simplified Schematic (One of Four Amplifiers Is Shown) One Technology Way, P.O. Box 96, Norwood, MA 262-96, U.S.A. Tel: 78.329.47 www.analog.com Fax: 78.46.33 26 Analog Devices, Inc. All rights reserved. 34-3
TABLE OF CONTENTS Features... Functional Block Diagram... General Description... Revision History... 2 Specifications... 3 Electrical Characteristics... 3 Absolute Maximum Ratings... 6 Thermal Resistance... 6 ESD Caution... 6 Typical Performance Characteristics...7 Applications... 2 Dual Low Power Instrumentation Amplifier... 2 Bipolar Current Transmitter... 3 Differential Output Instrumentation Amplifier... 3 Multiple Output Tracking Voltage Reference... 4 Outline Dimensions... 5 Ordering Guide... 6 SMD Parts and Equivalents... 6 REVISION HISTORY 3/6 Rev. C to Rev. D. Updated Format...Universal Deleted Wafer Test Limits Table... 4 New Package Drawing: R-4... 5 Updated Outline Dimensions... 5 Changes to Ordering Guide... 6 6/3 Rev. B to Rev. C. Edits to Specifications... 2 /2 Rev. A to Rev. B. Addition of Absolute Maximum Ratings... 5 Edits to Outline Dimensions... 2 4/2 Rev. to Rev. A. Edits to Features... Edits to Ordering Information... Edits to Pin Connections... Edits to General Descriptions..., 2 Edits to Package Type... 2 Rev. D Page 2 of 6
SPECIFICATIONS ELECTRICAL CHARACTERISTICS @ VS = ±5 V, TA = 25 C, unless otherwise noted. OP4 Table. /E OP4F OP4G/H Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS 4 5 6 23 8 3 μv Long-Term Input Voltage... μv/mo Stability Input Offset Current IOS VCM = V... 2.. 3.5 na Input Bias Current IB VCM = V.75 3..75 6..75 7. na Input Noise Voltage en p-p. Hz to Hz.5.5.5 μv p-p Input Resistance RIN MΩ Differential Mode Input Resistance Common RINCM 2 2 2 GΩ Mode Large Signal Voltage Gain AVO VO = ± V RL = kω 5 2, 3 7 3 7 V/mV RL = 2 kω 2 35 5 3 5 3 V/mV Input Voltage Range IVR ±2 ±3 ±2 ±3 ±2 ±3 V Common-Mode Rejection CMR VCM = 2 V 2 4 5 4 35 db Input Capacitance CIN 3.2 3.2 3.2 pf OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = kω ±2 ±2. 6 POWER SUPPLY Power Supply Rejection Ratio Supply Current Per Amplifier ±2 ±2. 6 ±2 ±2. 6 PSRR VS = 3 V to 8 V..8. 3.2.2 5.6 μv/v ISY No load 6 725 6 725 6 725 μa DYNAMIC PERFORMANCE Slew Rate SR..5..5..5 V/μs Gain Bandwidth Product GBWP AV = 5 5 5 khz Channel Separation CS VO = 2 V p-p fo = Hz 2 23 35 23 35 23 35 db Capacitive Load Stability AV = nf No oscillations NOISE PERFORMANCE Input Noise Voltage Density 3 en fo = Hz 3 22 36 22 36 22 nv/ Hz fo =, Hz 3 8 8 nv/ Hz Input Noise Current in p-p. Hz to Hz 5 5 5 pa p-p Input Noise Current Density in fo = Hz.6.6.6 pa/ Hz Guaranteed by CMR test. 2 Guaranteed but not % tested. 3 Sample tested. V Rev. D Page 3 of 6
@ VS = ±5 V, 55 C < TA = 25 C for, unless otherwise noted. Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS 7 27 μv Average Input Offset Voltage Drift TCVOS.3 2 μv/ C Input Offset Current IOS VCM = V 2.5 na Input Bias Current IB VCM = V.3 5. na Large Signal Voltage Gain AVO VO = ± V, RL = kω 3 9 V/mV RL = 2 kω 23 Input Voltage Range IVR ±2 ±2.5 V Common-Mode Rejection CMR VCM = ±2 V 5 3 db OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = kω ±2 ±2.4 POWER SUPPLY Power Supply Rejection Ratio PSRR VO = 3 V to 8 V.2 3.2 μv/v Supply Current Per Amplifier ISY No load 6 775 μa DYNAMIC PERFORMANCE Capacitive Load Stability AV = 8 nf No oscillations Guaranteed by CMR test. Rev. D Page 4 of 6
6 5 4 3 2 7 8 4 9 2 3 DIE SIZE.8.23 INCH, 22,263 SQ. MILTS (4.6 3.2 mm, 4.35 SQ. mm). OUT A 2. IN A 3. INA 4. V 5. IN B 6. IN B 7. OUT B. OUT C 2. IN C 3. IN C 4. V 5. IND 6. IN D 7. OUT D 34-34 Figure 4. Dice Characteristics @ VS = ±5 V, 25 C TA 85 C for OP4E/F, C TA 7 C for OP4G, 4 C TA 85 C for OP4H, unless otherwise noted. Table 3. /E OP4F OP4G/H Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS 6 22 8 35 4 μv Average Input Offset TCVOS 3.2.3 2..6 2.5 μv/ C Voltage Drift Input Offset Current IOS VCM = V E, F, G grades. 2.5. 3.5.2 6. na H grade.2 2. na Input Bias Current IB VCM = V E, F, G grades. 2.5. 3.5. 2. na H grade. 2. na Large-Signal Voltage Gain AVO VCM = V RL = kω 3, 2 5 2 5 V/mV RL = 2 kω 5 27 2 2 V/mV Input Voltage Range IVR ±2 ±2.5 ±2 ±2.5 ±2 ±2.5 V Common-Mode Rejection CMR VCM = ±2 V 5 35 35 5 3 db OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = kω ±2 ±2.4 ±2 ±2.4 ±2 ±2.6 V RL = 2 kω ± ±2 ± ±2 ± ±2.2 V POWER SUPPLY Power Supply Rejection PSRR VS = ±3 V to.5 3.2.5 5.6.3. μv/v Ratio ±8 V Supply Current Per ISY No load 6 775 6 775 6 775 μa Amplifier DYNAMIC PERFORMANCE Capacitive Load Stability No oscillations nf Guaranteed by CMR test. Rev. D Page 5 of 6
ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Rating Supply Voltage ±2 V Differential Input Voltage ±3 V Input Voltage Supply voltage Output Short-Circuit Duration Continuous Storage Temperature Range P, Y Packages 65 C to 5 C Lead Temperature (Soldering 6 sec) 3 C Junction Temperature (TJ) 65 C to 5 C Operating Temperature Range 55 C to 25 C OP4E, OP4F 25 C to 85 C OP4G C to 7 C OP4H 4 C to 85 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. THERMAL RESISTANCE θja is specified for worst-case mounting conditions, that is, θja is specified for device in socket for CERDIP and PDIP packages; θja is specified for device soldered to printed circuit board for SOIC package. Table 5. Thermal Resistance Package Type θja θjc Unit 4-pin ceramic DIP (Y) 94 C/W 4-pin plastic DIP (P) 76 33 C/W 6-pin SOIC (S) 88 23 C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. D Page 6 of 6
TYPICAL PERFORMANCE CHARACTERISTICS 3 2 OP4 CHANGE IN OFFSET VOLTAGE (μv) 2 2 3 4 5 TIME (Minutes) Figure 5. Warm-Up Drift 34-4 INPUT OFFSET CURRENT (pa) 9 8 75 5 25 25 5 75 25 TEMPERATURE ( C) Figure 8. Input Offset Current vs. Temperature 34-7 7. INPUT OFFSET VOLTAGE (μv) 6 5 4 3 2 INPUT BIAS CURRENT (na)..9.8.7 75 5 25 25 5 75 25 TEMPERATURE ( C) Figure 6. Input Offset Voltage vs. Temperature 34-5.6 5 5 5 5 COMMON-MODE VOLTAGE (V) Figure 9. Input Bias Current vs. Common-Mode Voltage 34-8 INPUT BIAS CURRENT (na) 2..6.2.8.4 75 5 25 25 5 75 25 TEMPERATURE ( C) Figure 7. Input Bias Current vs. Temperature 34-6 COMMON-MODE REJECTION (db) 4 2 8 6 4 2 k k k Figure. Common-Mode Rejection vs. Frequency T A =25 C 34-9 Rev. D Page 7 of 6
2.5 FOUR AMPLIFIERS NOISE VOLTAGE DENSITY (nv/ Hz) TOTAL SUPPLY CURRENT (ma) 2.4 2.3 2.2 k Figure. Noise Voltage Density vs. Frequency 34-2. ±2 ±4 ±6 ±8 ± ±2 ±4 ±6 ±8 ±2 SUPPLY VOLTAGE (V) Figure 4. Total Supply Current vs. Supply Voltage 34-3 k T A =25 C 2.5 FOUR AMPLIFIERS CURRENT NOISE DENSITY (fa/ Hz) 8 6 4 2 k Figure 2. Current Noise Density vs. Frequency 34- TOTAL SUPPLY CURRENT (ma) 2.4 2.3 2.2 2. 75 5 25 25 5 75 25 5 TEMPERATURE ( C) Figure 5. Total Supply Current vs. Temperature 34-4 4 2 4 6 8 TIME (Seconds) Figure 3.. Hz to Hz Noise 34-2 POWER SUPPLY REJECTION (db) 2 8 6 4 2 POSITIVE SUPPLY NEGATIVE SUPPLY. k k k Figure 6. Power Supply Rejection vs. Frequency 34-5 Rev. D Page 8 of 6
44 POWER SUPPLY REACTION (db) 42 4 38 36 GAIN (db) 8 6 4 2 A V = A V = A V = A V = 34 75 5 25 25 5 75 25 5 TEMPERATURE ( C) Figure 7. Power Supply Rejection vs. Temperature 34-6 k k k Figure 2. Closed-Loop Gain vs. Frequency 34-9 M OPEN-LOOP GAIN (V/mV) 5 R L =2kΩ 4 3 2 75 5 25 25 5 75 25 5 TEMPERATURE ( C) Figure 8. Open-Loop Gain vs. Temperature 34-7 OUTPUT SWING (V p-p AT % Distortion) 25 2 5 5 k k k Figure 2. Maximum Output Swing Frequency 34-2 OPEN-LOOP GAIN (db) 2 8 6 4 2 V S =±5V GAIN PHASE 45 9 35 PHASE SHIFT (Degrees) DISTORTION (%).. V OUT = V p-p R L = 2kΩ A V = A V = A V = 8 k k k M Figure 9. Open-Loop Gain and Phase Shift vs. Frequency 34-8. k k Figure 22. Total Harmonic Distortion vs. Frequency 34-2 Rev. D Page 9 of 6
5 45 4 35 A V = FALLING A V = OVERSHOOT (%) 3 25 2 5 RISING 5.5..5 2. 2.5 3. CAPACITIVE LOAD (nf) Figure 23. Overshoot vs. Capacitive Load 34-22 5V μs Figure 26. Large Signal Transient Response 34-25 SHORT-CIRCUIT CURRENT (ma) 34 32 3 SOURCING SINKING A V = 28 2 3 4 5 34-23 2mV 5μs 34-26 TIME (Minutes) Figure 24. Short Circuit vs. Time Figure 27. Small Signal Transient Response 4 CHANNEL SEPARATION (db) 3 2 V IN = 2V p-p A V = 9 k k k 34-24 2mV 5μs 34-27 Figure 25. Channel Separation vs. Frequency Figure 28. Small Signal Transient Response CLOAD = nf Rev. D Page of 6
Ω kω OP4 OP4 OP4 OP4 e OUT TO SPECTRUM ANALYZER nv e OUT 2 Hz e nv n Hz Figure 29. Noise Test Schematic 34-28 8V 4 3 2 9 8 V 4 3 V 2 3 4 5 6 7 2 GND 8V Figure 3. Burn-In Circuit 34-29 Rev. D Page of 6
APPLICATIONS The OP4 is inherently stable at all gains and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply decoupling is highly recommended. Proper supply decoupling reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP4. Total supply current can be reduced by connecting the inputs of an unused amplifier to V. This turns the amplifier off, lowering the total supply current. DUAL LOW POWER INSTRUMENTATION AMPLIFIER A dual instrumentation amplifier that consumes less than 33 mw of power per channel is shown in Figure 3. The linearity of the instrumentation amplifier exceeds 6 bits in gains of 5 to 2 and is better than 4 bits in gains from 2 to. CMRR is above 5 db (G = ). Offset voltage drift is typically.4 μv/ C over the military temperature range, which is comparable to the best monolithic instrumentation amplifiers. The bandwidth of the low power instrumentation amplifier is a function of gain and is shown in Table 6. The output signal is specified with respect to the reference input, which is normally connected to analog ground. The reference input can be used to offset the output from V to V if required. Table 6. Gain Bandwidth Gain Bandwidth 5 5 khz 67 khz 7.5 khz 5 Hz V IN REFERENCE V IN 2kΩ REFERENCE 2kΩ 5kΩ 5kΩ R G R G 5kΩ 5kΩ 2kΩ 2kΩ V OUT V OUT 4, = 5 V IN R G V OUT 34-3 Figure 3. Dual Low Power Instrumentation Amplifier Rev. D Page 2 of 6
BIPOLAR CURRENT TRANSMITTER In the circuit of Figure 32, which is an extension of the standard three op amp instrumentation amplifier, the output current is proportional to the differential input voltage. Maximum output current is ±5 ma with voltage compliance equal to ± V when using ±5 V supplies. Output impedance of the current transmitter exceeds 3 MΩ and linearity is better than 6 bits with gain set for a full-scale input of ± μv. DIFFERENTIAL OUTPUT INSTRUMENTATION AMPLIFIER The output voltage swing of a single-ended instrumentation amplifier is limited by the supplies, normally at ±5 V, to a maximum of 24 V p-p. The differential output instrumentation amplifier of Figure 33 can provide an output voltage swing of 48 V p-p when operated with ±5 V supplies. The extended output swing is due to the opposite polarity of the outputs. Both outputs swing 24 V p-p but with opposite polarity, for a total output voltage swing of 48 V p-p. The reference input can be used to set a common-mode output voltage over the range ± V. The PSRR of the amplifier is less than μv/v with CMRR (G = ) better than 5 db. Offset voltage drift is typically.4 μv/ C over the military temperature range. OP4E OP4E 2Ω V OUT I OUT 5mA V IN R G OP4E OP4E V I IN 5, OUT 2Ω R G 34-3 Figure 32. Bipolar Current Transmitter 22pF V IN R G 22pF 22pF 22pF V IN = V OUT 5k R G R G V OUT REFERENCE INPUT 34-32 Figure 33. Differential Output Instrumentation Amplifier Rev. D Page 3 of 6
MULTIPLE OUTPUT TRACKING VOLTAGE REFERENCE Figure 34 shows a circuit that provides outputs of V, 7.5 V, 5 V, and 2.5 V for use as a system voltage reference. Maximum output current from each reference is 5 ma with load regulation under 25 μv/ma. Line regulation is better than 5 μv/v and output voltage drift is under 2 μv/ C. Output voltage noise from. Hz to Hz is typically 75 μv p-p from the V output and proportionately less from the 7.5 V, 5 V, and 2.5 V outputs. 5V V 2 22kΩ N42 μf kω kω 7.5V REF 43 2.5V REFERENCE 4 6 kω kω 2μF kω kω 5V μf kω 2.5V Figure 34. Multiple Output Tracking Voltage Reference 34-33 Rev. D Page 4 of 6
OUTLINE DIMENSIONS.5 (.3) MIN.98 (2.49) MAX PIN 4.2 (5.8) MAX.2 (5.8).25 (3.8).23 (.58).4 (.36) 8 7. (2.54) BSC.785 (9.94) MAX.7 (.78).3 (.76).3 (7.87).22 (5.59).6 (.52).5 (.38).5 (3.8) MIN SEATING PLANE.32 (8.3).29 (7.37) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 5.5 (.38).8 (.2).3 (.8). (.39) COPLANARITY. 6 9 7.6 (.2992) 7.4 (.293).5 (.434). (.3976).27 (.5) BSC.5 (.2).3 (.22) 8 SEATING PLANE.65 (.493). (.3937) 2.65 (.43) 2.35 (.925) 8.33 (.3).2 (.79).75 (.295).25 (.98) 45.27 (.5).4 (.57) COMPLIANT TO JEDEC STANDARDS MS-3-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 35. 4-Lead Ceramic Dual In-Line Package [CERDIP] (Q-4) [Y-Suffix] Dimensions shown in inches and (millimeters) Figure 37. 6-Lead Standard Small Outline Package [SOIC] Wide Body (R-6) [S-Suffix] Dimensions shown in millimeters and (inches).5 (.3) MIN.98 (2.49) MAX 4 8 7.3 (7.87).22 (5.59) PIN.2 (5.8) MAX.2 (5.8).25 (3.8).23 (.58).4 (.36). (2.54) BSC.785 (9.94) MAX.7 (.78).3 (.76).6 (.52).5 (.38).5 (3.8) MIN SEATING PLANE.32 (8.3).29 (7.37) 5.5 (.38).8 (.2) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 36. 4-Lead Plastic Dual In-Line Package [PDIP] (N-4) [P-Suffix] Dimensions shown in inches and (millimeters) Rev. D Page 5 of 6
ORDERING GUIDE Model Temperature Range Package Description Package Option Y 55 C to 25 C 4-Lead CERDIP Y-Suffix (Q-4) OP4EY 25 C to 85 C 4-Lead CERDIP Y-Suffix (Q-4) OP4FY 25 C to 85 C 4-Lead CERDIP Y-Suffix (Q-4) OP4GP C to 7 C 4-Lead PDIP P-Suffix (N-4) OP4GPZ C to 7 C 4-Lead PDIP P-Suffix (N-4) OP4HP 4 C to 85 C 4-Lead PDIP P-Suffix (N-4) OP4HPZ 4 C to 85 C 4-Lead PDIP P-Suffix (N-4) OP4GS C to 7 C 6-Lead SOIC S-Suffix (R-6) OP4GS-REEL C to 7 C 6-Lead SOIC S-Suffix (R-6) OP4GSZ C to 7 C 6-Lead SOIC S-Suffix (R-6) OP4GSZ-REEL C to 7 C 6-Lead SOIC S-Suffix (R-6) OP4HS 4 C to 85 C 6-Lead SOIC S-Suffix (R-6) OP4HS-REEL 4 C to 85 C 6-Lead SOIC S-Suffix (R-6) OP4HSZ 4 C to 85 C 6-Lead SOIC S-Suffix (R-6) OP4HSZ-REEL 4 C to 85 C 6-Lead SOIC S-Suffix (R-6) OP4GBC Die Z = Pb-free part. SMD PARTS AND EQUIVALENTS SMD Part Number ADI Equivalent 5962-8777M3A TCMDA 5962-8777MCA YMDA For military processed devices, please refer to the standard microcircuit drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp. 26 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C343/6(D) Rev. D Page 6 of 6