LDK ma low quiescent current very low noise LDO. Applications. Description. Features

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LDK12 2 ma low quiescent current very low noise LDO Applications Datasheet - production data Mobile phones Personal digital assistants (PDAs) Cordless phones and similar battery-powered systems Digital still cameras Description Features Input voltage from 1.9 to 5.5 V Very low dropout voltage (1 mv typ. at 1 ma load) Low quiescent current (max. 1 µa, 1 µa in OFF mode) Very low noise Output voltage tolerance: ± 2.% @ 25 C 2 ma guaranteed output current Wide range of fixed output voltages available on request: from.8 V to 3.5 V with 1 mv step Adjustable version: from.8 V to V IN -V drop Logic-controlled electronic shutdown Compatible with ceramic capacitor C OUT = 1 µf Internal current and thermal limit Available in SOT23-5L, SOT323-5L and DFN6 (1.2 x 1.3 mm) packages Temperature range: -4 C to 125 C The LDK12 low drop voltage regulator provides 2 ma of maximum current from an input supply voltage in the range of 1.9 V to 5.5 V, with a typical dropout voltage of 1 mv. It is stabilized with a ceramic capacitor on the output. The very low drop voltage, low quiescent current and low noise features make it suitable for low power battery-powered applications. An enable logic control function puts the LDK12 in shutdown mode allowing a total current consumption lower than 1 µa. The device also includes a short-circuit constant current limiting and thermal protection. January 218 DocID23965 Rev 8 1/24 This is information on a product in full production. www.st.com 24

Contents LDK12 Contents 1 Diagram................................................... 3 2 Pin configuration............................................ 4 3 Typical application.......................................... 5 4 Maximum ratings............................................ 6 5 Electrical characteristics..................................... 7 6 Typical performance characteristics............................ 9 7 Package mechanical data.................................... 14 8 Packaging mechanical data.................................. 2 9 Order codes............................................... 22 1 Revision history........................................... 23 2/24 DocID23965 Rev 8

LDK12 Diagram 1 Diagram Figure 1. Block diagram DocID23965 Rev 8 3/24

Pin configuration LDK12 2 Pin configuration Figure 2. Pin connection (top view) SOT23-5L, SOT323-5L DFN6 (1.2 x 1.3) Table 1. Pin description (SOT23-5L, SOT323-5L) Pin Function Symbol SOT23/ DFN6 SOT323 Fixed Adjustable D version 1 6 IN Input voltage of the LDO 2 2 GND Common ground 3 4 EN Enable pin logic input: Low = shutdown, High = active BYP (1) /ADJ 4 3 Bypass capacitor Adjustable pin Internally not connected /NC 5 1 OUT Output voltage of the LDO - 5 N/C Not connected. This pin should be connected to GND 1. Bypass capacitor for noise reduction on fixed version is optional, if not used the relevant pin must be left floating with no routing on the board. 4/24 DocID23965 Rev 8

LDK12 Typical application 3 Typical application Figure 3. Typical application circuits for fixed version Figure 4. Typical application circuits for D version Figure 5. Typical application circuits for adjustable version V O =V ADJ (1+R 1 /R 2 ) DocID23965 Rev 8 5/24

Maximum ratings LDK12 4 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V IN DC input voltage -.3 to 7 V V OUT DC output voltage -.3 to V I +.3 V V EN Enable input voltage -.3 to V I +.3 V V BYP/ADJ ADJ/Bypass pin voltage 2 V I OUT Output current Internally limited ma P D Power dissipation Internally limited mw T STG Storage temperature range - 65 to 15 C T OP Operating junction temperature range - 4 to 125 C Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND. Table 3. Thermal data Symbol Parameter SOT23-5L SOT323-5L DFN-6L Unit R thja Thermal resistance junction-ambient 16 246 237 C/W R thjc Thermal resistance junction-case 68 134 14 C/W 6/24 DocID23965 Rev 8

LDK12 Electrical characteristics 5 Electrical characteristics T J = 25 C, V IN = V OUT(NOM) + 1 V, C IN = C OUT = 1 µf, I OUT = 1 ma, V EN = V IN, unless otherwise specified. Table 4. Electrical characteristics for LDK12 (fixed version) Symbol Parameter Test conditions Min. Typ. Max. Unit V IN Operating input voltage 1.9 5.5 V V OUT V OUT accuracy I OUT =1 ma, T J =25 C -2. 2. % I OUT =1 ma, -4 C<T J <125 C -3. 3. % V OUT Static line regulation V OUT +1 V V IN 5.5 V, I OUT =1 ma.5 %/V V OUT Static load regulation I OUT = 1 ma to 2 ma.6 %/ma I OUT = 1 ma, V OUT =2.5 V 1 V DROP Dropout voltage (1) I OUT = 2 ma, V OUT =2.5 V 15 3 4 C<T J <125 C e N e N (2) SVR Output noise voltage Output noise voltage Supply voltage rejection 1 Hz to 1 khz, I OUT =1 ma, V OUT =2.5 V, C BYP =1 nf 1 Hz to 1 khz, I OUT =1 ma, V OUT =2.5 V V IN =V OUTNOM +.5 V+/-V RIPPLE V RIPPLE =.1 V Freq.=12 Hz to 1 khz I OUT =1 ma mv 51 µv RMS 148 µv RMS 55 db I OUT = ma, -4 C<T J <125 C 3 6 I Q Quiescent current I OUT =2 ma, -4 C<T J <125 C 5 1 µa V IN input current in OFF mode: V EN =GND 1 I SC Short-circuit current R L = 4 ma Enable input logic low V IN =1.9 V to 5.5 V, -4 C<T J <125 C.4 V EN Enable input logic high V IN =1.9 V to 5.5 V, -4 C<T J <125 C 1.2 V I EN Enable pin input current V SHDN =V IN 1 na Thermal shutdown 16 T SHDN C Hysteresis 2 C OUT Output capacitor Capacitance (see Section 6: Typical performance characteristics) 1 22 µf 1. Dropout voltage is the input-to-output voltage difference at which the output voltage is 1 mv below its nominal value. 2. Valid for D version or standard version without C BYP. DocID23965 Rev 8 7/24

Electrical characteristics LDK12 T J = 25 C, V IN = V OUT(NOM) + 1 V, C IN = C OUT = 1 µf, I OUT = 1 ma, V EN = V IN, unless otherwise specified. Table 5. Electrical characteristics for LDK12 (adjustable version) Symbol Parameter Test conditions Min. Typ. Max. Unit V IN Operating input voltage 1.9 5.5 V V ADJ V ADJ accuracy I OUT =1 ma, T J =25 C 784 8 816 mv I OUT =1 ma, -4 C<T J <125 C -3. 3. % V OUT Static line regulation V OUT +1 V V IN 5.5 V, I OUT =1 ma.5 %/V V OUT Static load regulation I OUT =1 ma to 2 ma.6 %/ma I OUT =1 ma, V OUT =2.5 V 1 V DROP Dropout voltage (1) I OUT = 2 ma, V OUT =2.5 V 15 3 4 C<T J <125 C, e N Output noise voltage 1 Hz to 1 khz, I OUT =1 ma V OUT =V ADJ 115 µv RMS I ADJ Adjust pin current 1 µa SVR Supply voltage rejection V IN =V OUTNOM +.5 V+/-V RIPPLE V RIPPLE =.1 V Freq.=12 Hz to 1 khz I OUT =1 ma mv 55 db I OUT = ma, -4 C<T J <125 C 3 6 I Q Quiescent current I OUT =2 ma, -4 C<T J <125 C 5 1 µa V IN input current in OFF mode: V EN =GND 1 I SC Short-circuit current R L = 4 ma Enable input logic low V IN =1.9 V to 5.5 V, -4 C<T J <125 C.4 V EN Enable input logic high V IN =1.9 V to 5.5 V, -4 C<T J <125 C 1.2 V I EN Enable pin input current V SHDN =V IN 1 na Thermal shutdown 16 T SHDN C Hysteresis 2 C OUT Output capacitor Capacitance (see Section 6: Typical performance characteristics) 1 22 µf 1. Dropout voltage is the input-to-output voltage difference at which the output voltage is 1 mv below its nominal value. 8/24 DocID23965 Rev 8

LDK12 Typical performance characteristics 6 Typical performance characteristics C IN = C OUT = 1 µf, V EN to V IN, unless otherwise specified. Figure 6. Output voltage vs. temp. for adjustable (I O = 1 ma) Figure 7. Output voltage vs. temp. for adjustable version (I O = 2 ma) VADJ [ V ] AM128v1.85.84 V IN = 1.9 V, I OUT = 1 ma.83.82.81.8.79.78.77.76.75 V ADJ [V] AM16197v1.85 V IN = 1.9 V, I OUT = 2 ma.84.83.82.81.8.79.78.77.76.75 Figure 8. Output voltage vs. temp. for fixed version (I O = 1 ma) Figure 9. Output voltage vs. temp. for fixed version (I O = 2 ma) V OUT [V] AM16198v1 3.5 3.4 V IN = 4 V, I OUT = 1 ma 3.3 3.2 3.1 3. 2.9 2.8 2.7 2.6 2.5 V OUT [V] AM16199v1 3.5 3.4 V IN = 4 V, I OUT = 2 ma 3.3 3.2 3.1 3. 2.9 2.8 2.7 2.6 2.5 Figure 1. Line regulation vs. temp. for adjustable version Figure 11. Short-circuit current vs. temp. for adjustable version Line regulation [%/V].1.9 AM162v1 V IN from 1.9 V to 5.5 V, I OUT = 1 ma.8.7.6.5.4.3.2.1 I SHORT [ma] 6 AM1621v1 V IN = 1.9 V 55 5 45 4 35 3 25 2 DocID23965 Rev 8 9/24

Typical performance characteristics LDK12 Figure 12. Load regulation vs. temp. for adjustable version Figure 13. Load regulation vs. temp. for fixed version.1 V IN = 1.9 V, I OUT from 1 ma to 2 ma AM1622v1.1 V IN = 4 V, I OUT from 1 ma to 2 ma AM1623v1.8.8 Load regulation [%/ma].6.4.2 Load regulation [%/ma].6.4.2 Figure 14. Enable pin thresholds vs. temp. (V IN = 1.9 V) Figure 15. Enable pin thresholds vs. temp. V EN Thresholds [V] 1 V IN = 1.9 V, I OUT = 1 ma.9.8 AM1624v1 Low High.7.6.5.4.3.2 V EN Thresholds [V] 1.6 V IN = 5.5 V, I OUT = 1 ma AM1625v1 Low 1.4 High 1.2 1..8.6.4.2. Figure 16. Quiescent current vs. temp. for adjustable version (I O = ma) Figure 17. Quiescent current vs. temp. for adjustable version (I O = 2 ma) Quiescent current [µa] 1 9 AM1626v1 V IN = 1.9 V, I OUT = ma 8 7 6 5 4 3 2 1 Temperature [ C] Quiescent current [µa] 2 18 AM1627v1 V IN = 1.9 V, I OUT = 2 ma 16 14 12 1 8 6 4 2 1/24 DocID23965 Rev 8

LDK12 Typical performance characteristics Figure 18. Quiescent current vs. temp. for fixed version (I O = ma) Figure 19. Quiescent current vs. temp. for fixed version (I O = 2 ma) Quiescent current [µa] 1 9 AM1628v1 V IN = 4 V, I OUT = ma 8 7 6 5 4 3 2 1 Quiescent current [µa] 2 18 AM1629v1 V IN = 4 V, I OUT = 2 ma 16 14 12 1 8 6 4 2 Figure 2. Shutdown current vs. temperature Figure 21. SVR vs. frequency (V O = 2.5 V) Quiescent current [µa] 1.9 AM1621v1 V IN = 4 V, V EN = GND.8.7.6.5.4.3.2.1 SVR [db] 8 7 6 5 4 3 2 1 AM16211v1 Cbyp =1 nf No Cbyp V OUT = 2.5 V, V IN = V OUT +.5 V +/- 1 mv, I OUT = 1 ma 1 1 1 1 Frequency [Hz] Figure 22. SVR vs. frequency (V O = V ADJ ) Figure 23. Output noise vs. frequency (V O = 2.5 V) SVR [db] 8 AM16212v1 7 6 5 4 3 2 1 V OUT = V ADJ, V IN = V OUT +.5 V +/- 1 mv, I OUT = 1 ma 1 1 1 1 Frequency [Hz] DocID23965 Rev 8 11/24

Typical performance characteristics LDK12 Figure 24. Output noise vs. frequency (V O = V ADJ ) Figure 25. Stability region vs. C OUT (fixed) 1 AM16215v1 9 8 ESR @ 1 khz [Ω] 7 6 5 4 3 2 1 Stability area 1 2 3 4 5 6 7 8 9 1 11 12 13 14 15 16 17 18 19 2 21 22 23 C OUT [µf] (nominal value) V IN = V EN = 4 to 5.5 V, I OUT = 1 ma to.2 A, C IN = 1 µf, T A = 25 C Figure 26. Stability region vs C OUT (adjust.) Figure 27. Line transient (V OUT = V ADJ ) 1 AM16216v1 9 8 7 ESR @ 1 khz [Ω] 6 5 4 3 Stability area 2 1 1 2 3 4 5 6 7 8 9 1 11 12 13 14 15 16 17 18 19 2 21 22 23 C OUT [µf] (nominal value) V IN = V EN = 1.9 to 5.5 V, I OUT = 1 ma to.2 A, C IN = 1 µf, T A = 25 C V OUT = V ADJ, V IN = 3.5 V to 4 V, V EN = 2 V, I OUT = 1 ma, NO C IN, C OUT = 1 µf, t r = t f = 5 µs Figure 28. Line transient (V OUT = 3 V) Figure 29. Load transient (V OUT = 3 V) V OUT = 3 V, V IN = 4 V to 4.5 V, V EN = 2 V, I OUT = 1 ma, NO C IN, C OUT = 1 µf, t r = t f = 5 µs V OUT = 3 V, V IN = V EN = 3.5 V, I OUT = 1 ma to 2 ma, C OUT = 1 µf, t r = t f = 5 µs 12/24 DocID23965 Rev 8

LDK12 Typical performance characteristics Figure 3. Load transient (V OUT = V ADJ ) Figure 31. Startup transient V OUT = V ADJ, V IN = V EN = 3.5 V, I OUT = 1 ma to 2 ma, C OUT = 1 µf, t r = t f = 5 µs V OUT = 3 V, V IN = V EN = to 4.2 V, I OUT = 1 ma, C IN = C OUT = 1 µf, t r = t f = 5 µs Figure 32. Enable transient (V OUT = V ADJ ) Figure 33. Enable transient (V OUT = 3 V) V OUT @.8 V, V IN = 1.9, V EN = to V IN, I OUT = 2 ma, C OUT = 1 µf, t r = t f = 1 µs Figure 34. Dropout voltage vs. temperature (I OUT = 1 ma) V IN = 4 V, V EN = to V IN, I OUT = 2 ma, C IN = C OUT = 1 µf, t r = t f = 1 µs Figure 35. Dropout voltage vs. temperature (I OUT = 2 ma) 3 25 C IN = C OUT = 1 µf, I OUT = 1 ma, Fixed 3. V version AM16226v1 3 25 C IN = C OUT = 1 µf, I OUT = 2 ma, Fixed 3. V version AM16227v1 Dropout Voltage [mv] 2 15 1 5 Dropout Voltage [mv] 2 15 1 5 Temperature [ C] DocID23965 Rev 8 13/24

Package mechanical data LDK12 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 36. SOT23-5L mechanical drawing 14/24 DocID23965 Rev 8

LDK12 Package mechanical data Table 6. SOT23-5L mechanical data Dim. mm Min. Typ. Max. A.9 1.45 A1.15 A2.9 1.3 b.3.5 c.9.2 D 2.95 E 1.6 e.95 H 2.8 L.3.6 8 Figure 37. SOT23-5L footprint (dimensions in mm) DocID23965 Rev 8 15/24

Package mechanical data LDK12 Figure 38. DFN6L (1.2 x 1.3 mm) drawing 16/24 DocID23965 Rev 8

LDK12 Package mechanical data Table 7. DFN6L (1.2 x 1.3 mm) mechanical data Dim. mm Min. Typ. Max. A.41.45.5 A1..2.5 D - 1.2 - E - 1.3 - e -.4 - b.15.18.25 L.475.525.575 L3.375.425.475 aaa -.5 - Figure 39. DFN6L footprint (dimensions in mm) DocID23965 Rev 8 17/24

Package mechanical data LDK12 Figure 4. SOT323-5L drawing 18/24 DocID23965 Rev 8

LDK12 Package mechanical data Table 8. SOT323-5L mechanical data Dim. mm Min. Typ. Max. A.8 1.1 A1.1 A2.8.9 1 b.15.3 c.1.22 D 1.8 2 2.2 E 1.8 2.1 2.4 E1 1.15 1.25 1.35 e.65 e1 1.3 L.26.36.46 8 DocID23965 Rev 8 19/24

Packaging mechanical data LDK12 8 Packaging mechanical data Figure 41. SOT23-5L and SOT323-xL tape and reel drawing 2/24 DocID23965 Rev 8

LDK12 Packaging mechanical data Table 9. SOT23-5L tape and reel mechanical data Dim. mm Min. Typ. Max. A 18 C 12.8 13. 13.2 D 2.2 N 6 T 14.4 Ao 3.13 3.23 3.33 Bo 3.7 3.17 3.27 Ko 1.27 1.37 1.47 Po 3.9 4. 4.1 P 3.9 4. 4.1 Table 1. SOT323-xL tape and reel mechanical data Dim. mm Min. Typ. Max. A 175 18 185 C 12.8 13 13.2 D 2.2 N 59.5 6 6.5 T 14.4 Ao 2.25 Bo 3.17 Ko 1.2 Po 3.9 4. 4.1 P 3.9 4. 4.2 DocID23965 Rev 8 21/24

Order codes LDK12 9 Order codes Table 11. Order codes Package SOT323-5L SOT23-5L DFN6L Output voltage LDK12C-R LDK12M-R LDK12PU-R ADJ LDK12C8R LDK12M8R LDK12PU8R.8 V LDK12C1R LDK12M1R LDK12PU1R 1. V LDK12C11R LDK12M11R 1.1 V LDK12C12R LDK12M12R LDK12PU12R 1.2 V LDK12C15R LDK12M15R 1.5 V LDK12C18R LDK12M18R LDK12PU18R 1.8 V LDK12C25R LDK12M25R LDK12PU25R 2.5 V LDK12C28R LDK12M28R 2.8 V LDK12C29R LDK12M29R LDK12PU29R 2.9 V LDK12C3R LDK12M3R LDK12PU3R 3. V LDK12C31R LDK12M31R 3.1 V LDK12C32R LDK12M32R LDK12PU32R 3.2 V LDK12DM33R 3.3 V LDK12C33R LDK12M33R LDK12PU33R 3.3 V LDK12C35R 3.5 V Table 12. Marking Order codes Package Output voltage Marking LDK12DMxxR SOT23-5L xx V Dxx LDK12MxxR SOT23-5L xx V Kxx LDK12CxxR SOT323-5L xx V Kxx LDK12PUxxR DFN-6L xx V xx LDK12M-R SOT23-5L Adj KAD LDK12C-R SOT323-5L Adj KAD LDK12PU-R DFN-6L Adj AD 22/24 DocID23965 Rev 8

LDK12 Revision history 1 Revision history Table 13. Document revision history Date Revision Changes 26-Nov-212 1 Initial release 31-Jan-213 2 18-Oct-213 3 Added new part number LDK12PU32R Updated Table 11: Order codes RPN LDK12xx changed to LDK12. Updated the Features and the Description in cover page. Cancelled Table1: Device summary. Updated Section 7: Package mechanical data, Table 2: Absolute maximum ratings and Table 11: Order codes. Added Section 8: Packaging mechanical data.. Minor text changes. 1-Mar-214 4 Updated Table 11: Order codes. 29-Apr-214 5 29-Aug-214 6 7-Oct-214 7 19-Jan-218 8 Updated Table 1: Pin description (SOT23-5L, SOT323-5L), Table 4: Electrical characteristics for LDK12 (fixed version), Table 5: Electrical characteristics for LDK12 (adjustable version), Table 11: Order codes and Table 12: Marking. Added Figure 4: Typical application circuits for D version. Minor text changes. Updated Table 6: SOT23-5L mechanical data and Table 11: Order codes. Updated Table 11: Order codes. Minor text changes. Updated: Figure 23: Output noise vs. frequency (V O = 2.5 V) and Figure 24: Output noise vs. frequency (V O = V ADJ ). DocID23965 Rev 8 23/24

LDK12 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 218 STMicroelectronics All rights reserved 24/24 DocID23965 Rev 8