9-4666; Rev ; 7/9 EVALUATION KIT AVAILABLE DirectDrive Headphone Amplifier General Description The Windows Vista -compliant stereo headphone amplifier is designed for portable equipment where board space is at a premium. It features Maxim s DirectDrive architecture to produce a ground-referenced output from a single supply, eliminating the large output-coupling capacitors required by conventional single-supply headphone amplifiers. The features an undervoltage lockout that prevents over discharging of the battery during brownout conditions, click-and-pop suppression that eliminates audible transients on startup, a low-power shutdown mode, and thermal-overload and short-circuit protection. Additionally, the suppresses RF radiation received by input and supply traces acting as antennas and prevents the amplifier from demodulating the coupled noise. The is available in a -pin TDFN package (3mm x 3mm x.8mm) and specified over the -4 C to +85 C extended temperature range. Cell Phones MP3 Players Notebook PCs PDAs Applications Pin Configuration Features Clickless/Popless Operation High RF Noise Rejection Windows Vista Premium Mobile Compliant 2.7V to 5.5V Single-Supply Operation 95mW Output Power (32Ω, V DD = 5V) Low-Current Shutdown Mode, < µa Low 3mA (V DD = 3.3V) Quiescent Current Space-Saving, 3mm x 3mm, -Pin TDFN Package PART Ordering Information TEMP RANGE PIN- PACKAGE TOP MARK ETB+ -4 C to +85 C TDFN-EP* AUU +Denotes a lead(pb)-free/rohs-compliant package. *EP = Exposed pad. Simplified Block Diagram TOP VIEW CP CN 2 9 GND SHDN LEFT AUDIO INPUT DirectDrive OUTPUTS ELIMINATE DC-BLOCKING CAPACITORS V SS OUTL OUTR 3 8 V DD 4 7 INL *EP 5 6 INR SHDN *EXPOSED PAD. TDFN RIGHT AUDIO INPUT Windows Vista is a registered trademark of Microsoft Corp. DirectDrive is a registered trademark of Maxim Integrated Products, Inc. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at -888-629-4642, or visit Maxim s website at www.maxim-ic.com.
ABSOLUTE MAXIMUM RATINGS V DD to GND...-.3V to +6V CP to GND...-.3V to (V DD +.3V) CN to GND...(V SS -.3V) to +.3V V SS to GND...-6V to +.3V OUTR, OUTL to GND...±3V SHDN to GND...-.3V to +6V INR, INL to GND...-.3V to (V DD +.3V) OUTR, OUTL Short Circuit to GND, V DD...Continuous Short Circuit Between OUTL and OUTR...Continuous Continuous Input Current (Into All Other Pins)...±2mA Continuous Power Dissipation (T A = +7 C) -Pin TDFN Single-Layer PCB (derate 8.5mW/ C above +7 C)...48.5mW Junction-to-Case Thermal Resistance (θ JC ) (Note ) -Pin TDFN...8.5 C/W Junction-to-Ambient Thermal Resistance (θ JA ) (Note ) -Pin TDFN...4. C/W Continuous Power Dissipation (T A = +7 C) -Pin TDFN Multilayer PCB (derate 24.4mW/ C above +7 C)...95mW Junction-to-Case Thermal Resistance (θ JC ) (Note ) -Pin TDFN...9. C/W Junction-to-Ambient Thermal Resistance (θ JA ) (Note ) -Pin TDFN...4. C/W Operating Temperature Range...-4 C to +85 C Storage Temperature Range...-65 C to +5 C Junction Temperature...+5 C Lead Temperature (soldering, s)...+3 C Note : Package thermal resistances were obtained using the method described in JEDEC specification JESD5-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V DD = V SHDN = 5V, V GND = V, R IN = R FB = 4.2kΩ (gain = -V/V), C = C2 = µf, C3 = µf, R LOAD =, T A = -4 C to +85 C, unless otherwise noted. Typical values are at T A = +25 C, unless otherwise noted.) (Note 2) GENERAL PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage Range V DD Guaranteed by PSRR test 2.7 5.5 V Undervoltage Lockout UVLO 2.2 V V DD = 3.3V 3. 4.6 Quiescent Current I DD V DD = 5V 4. 6. Shutdown Current I SHDN V SHDN = V, T A = +25 C <. µa Output Signal Attenuation in Shutdown Output Impedance in Shutdown V SHDN = V, V IN = V RMS, R LOAD = kω - dbv V SHDN = V.6 kω Turn-On Time t ON.56 ms Output Offset Voltage V OS T A = +25 C (Note 3) ±. ±.5 mv ma Z LOAD = 32Ω + µh, peak voltage, A-weighted, 32 samples per second (Notes 3, 4) Click-and-Pop Level K CP Z LOAD = kω, peak voltage, A-weighted, 32 samples per second (Notes 3, 4) Into shutdown -79 Out of shutdown -77 Into shutdown -62 Out of shutdown -58 dbv 2
ELECTRICAL CHARACTERISTICS (continued) (V DD = V SHDN = 5V, V GND = V, R IN = R FB = 4.2kΩ (gain = -V/V), C = C2 = µf, C3 = µf, R LOAD =, T A = -4 C to +85 C, unless otherwise noted. Typical values are at T A = +25 C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Power-Supply Rejection Ratio PSRR V DD = 2.7V to 5.5V, T A = +25 C (Note 3) 75 9 f = khz, 2mV P-P (Note 3) 73 f = 2kHz, 2mV P-P (Note 3) 55 Z LOAD = 32Ω + µh, f = khz, V DD = 3.6V 45 THD+N = % V DD = 5.V 95 Output Power P OUT Z LOAD = 6Ω + µh, f = khz, V DD = 3.6V 32 THD+N = % V DD = 5.V 75 Total Harmonic Distortion Plus Noise THD+N Z LOAD = 6Ω + µh, f = khz, P OUT = 2mW.4 Z LOAD = 32Ω + µh, f = khz, P OUT = 2mW.5 Z LOAD = kω, f = khz, V OUT = V RMS. Signal-to-Noise Ratio SNR Z LOAD = 32Ω + µh, P OUT = 25mW, A-weighted 5 db Output Noise V NOISE A-weighted (Note 3) 9 µv Crosstalk L to R, R to L, BW = 2Hz to 5kHz Z LOAD = 32Ω + µh FS =.3V RMS, V OUT = 3mV RMS 73 Z LOAD = kω FS =.77V RMS, V OUT = 7.7mV RMS 73 Capacitive Load Drive C L No sustained oscillations 2 pf Oscillator Frequency f OSC T A = +25 C 3 5 8 khz Thermal Shutdown 45 C Thermal Shutdown Hysteresis 5 C DIGITAL INPUT (SHDN) Input Voltage High V INH.2 V Input Voltage Low V INL.3 V Input Leakage Current I LEAKAGE T A = +25 C ± µa db mw % db Note 2: All specifications are % tested at T A = +25 C; temperature limits are guaranteed by design. Note 3: The amplifier inputs are AC-coupled to GND. Note 4: Mode transitions are controlled by SHDN. 3
Typical Operating Characteristics (V DD = V SHDN = 5V, V GND = V, R IN = R FB = 4.2kΩ (gain = -V/V), C = C2 = µf, C3 = µf, R LOAD =. Typical values are at T A = +25 C, unless otherwise noted.). THD+N vs. OUTPUT POWER V DD = 5.V R LOAD = 6I L LOAD = FH f = Hz f = 6kHz toc. THD+N vs. OUTPUT POWER V DD = 5.V L LOAD = FH f = Hz f = 6kHz toc2. f = khz. f = khz..2.4.6.8..2.4 OUTPUT POWER (W)..2.4.6.8..2.4.6 OUTPUT POWER (W) THD+N vs. OUTPUT POWER V DD = 3.6V R LOAD = 6I L LOAD = FH toc3 THD+N vs. OUTPUT POWER V DD = 3.6V L LOAD = FH toc4. f = Hz f = 6kHz. f = Hz f = 6kHz. f = khz. f = khz...2.3.4.5.6 OUTPUT POWER (W)...2.3.4.5.6.7.8 OUTPUT POWER (W) THD+N vs. FREQUENCY V DD = 5.V R LOAD = 6I L LOAD = FH toc5 THD+N vs. FREQUENCY V DD = 5.V L LOAD = FH toc6. P OUT = 6mW. P OUT = 6mW.. P OUT = 2mW.,, P OUT = 2mW.,, 4
THD+N vs. FREQUENCY V DD = 3.6V R LOAD = 6I L LOAD = FH toc7 Typical Operating Characteristics (V DD = V SHDN = 5V, V GND = V, R IN = R FB = 4.2kΩ (gain = -V/V), C = C2 = µf, C3 = µf, R LOAD =. Typical values are at T A = +25 C, unless otherwise noted.) THD+N vs. FREQUENCY V DD = 3.6V L LOAD = FH toc8. P OUT = 2mW. P OUT = 3mW.. P OUT = mw.,, P OUT = mw.,, THD+N (dbfs) -2-4 -6-8 VISTA THD+N vs. FREQUENCY V DD = 5.V L LOAD = FH V OUT = -3dBFS FS = 3mV RMS toc9 THD+N (dbfs) -2-4 -6-8 VISTA THD+N vs. FREQUENCY V DD = 5.V R LOAD = ki L LOAD = µh V OUT = -3dBFS FS = 77mV RMS toc - FS = V RMS -2,, - FS = V RMS -2,, 8 5 OUTPUT POWER vs. SUPPLY VOLTAGE R LOAD = 6I L LOAD = µh toc 8 5 OUTPUT POWER vs. SUPPLY VOLTAGE L LOAD = µh toc2 POUT (mw) 2 9 THD+N = % POUT (mw) 2 9 THD+N = % 6 6 3 THD+N = % 3 THD+N = % 2.7 3. 3.5 3.9 4.3 4.7 5. 5.5 SUPPLY VOLTAGE (V) 2.7 3. 3.5 3.9 4.3 4.7 5. 5.5 SUPPLY VOLTAGE (V) 5
Typical Operating Characteristics (continued) (V DD = V SHDN = 5V, V GND = V, R IN = R FB = 4.2kΩ (gain = -V/V), C = C2 = µf, C3 = µf, R LOAD =. Typical values are at T A = +25 C, unless otherwise noted.) 5 2 OUTPUT POWER vs. LOAD RESISTANCE V DD = 5.V L LOAD = µh THD+N = % toc3 75 6 OUTPUT POWER vs. LOAD RESISTANCE V DD = 3.6V L LOAD = µh THD+N = % toc4 POUT (mw) 9 6 POUT (mw) 45 3 3 THD+N = % 5 THD+N = % LOAD RESISTANCE (I) LOAD RESISTANCE (I) POWER DISSIPATION (mw) 6 5 4 3 2 V DD = 5.V L LOAD = µh R LOAD = 6I POWER DISSIPATION vs. OUTPUT POWER toc5 POWER DISSIPATION (mw) 4 35 3 25 2 5 V DD = 3.6V L LOAD = µh R LOAD = 6I POWER DISSIPATION vs. OUTPUT POWER toc6 5 2 4 6 8 2 OUTPUT POWER PER CHANNEL (mw) 2 4 6 8 2 OUTPUT POWER PER CHANNEL (mw) -2 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY V RIPPLE = 2mV P-P toc7-2 POWER-SUPPLY REJECTION RATIO vs. SUPPLY VOLTAGE V RIPPLE = 2mV P-P f = khz toc8 PSRR (db) -4-6 -8 RIGHT CHANNEL PSRR (db) -4-6 LEFT CHANNEL - LEFT CHANNEL -8 RIGHT CHANNEL -2,, - 2.7 3. 3.5 3.9 4.3 4.7 5. 5.5 SUPPLY VOLTAGE (V) 6
Typical Operating Characteristics (continued) (V DD = V SHDN = 5V, V GND = V, R IN = R FB = 4.2kΩ (gain = -V/V), C = C2 = µf, C3 = µf, R LOAD =. Typical values are at T A = +25 C, unless otherwise noted.) CROSSTALK (db) -2-4 -6-8 - VISTA CROSSTALK vs. FREQUENCY L LOAD = µh FS = 3mV RMS V OUT = -2dBFS LEFT TO RIGHT RIGHT TO LEFT toc9 CROSSTALK (db) -2-4 -6-8 - -2 VISTA CROSSTALK vs. FREQUENCY R LOAD = ki L LOAD = µh FS = 77mV RMS V OUT = -2dBFS LEFT TO RIGHT RIGHT TO LEFT toc2 OUTPUT MAGNITUDE (dbv) -2-4 -6-8 - -2 f = khz L LOAD = µh OUTPUT SPECTRUM toc2-2,, -4,, -4 2 4 6 8 2 4 6 8 2 FREQUENCY (khz) SUPPLY CURRENT (ma) 4.5 4. 3.5 3. 2.5 2..5. QUIESCENT CURRENT vs. SUPPLY VOLTAGE toc22 SHUTDOWN CURRENT (na).45.4.35.3.25.2.5. SHUTDOWN CURRENT vs. SUPPLY VOLTAGE toc23.5 2.7 3. 3.5 3.9 4.3 4.7 5. 5.5 SUPPLY VOLTAGE (V).5 2.7 3. 3.5 3.9 4.3 4.7 5. 5.5 SUPPLY VOLTAGE (V) EXITING SHUTDOWN toc24 ENTERING SHUTDOWN toc25 SHDN 2V/div SHDN 2V/div OUT_ V/div OUT_ V/div Fs/div Fs/div 7
PIN NAME FUNCTION CP Flying Capacitor Positive Terminal. Connect a µf ceramic capacitor from CP to CN. 2 CN Flying Capacitor Negative Terminal. Connect a µf ceramic capacitor from CN to CP. 3 V SS Charge-Pump Output. Bypass with a µf capacitor to GND. 4 OUTL Left-Channel Output 5 OUTR Right-Channel Output 6 INR Right-Channel Input 7 INL Left-Channel Input 8 V DD Positive Power-Supply Input. Bypass with a µf capacitor to GND. 9 SHDN Active-Low Shutdown Input GND Signal Ground EP Pin Description Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal performance. Not intended as an electrical connection point. Detailed Description The 95mW stereo headphone amplifier features Maxim s DirectDrive architecture, eliminating the large output-coupling capacitors required by conventional single-supply headphone amplifiers. The device features low RF susceptibility, extensive click-and-pop suppression, undervoltage lockout (UVLO) and shutdown control. The also features thermal-overload and short-circuit protection. The is Windows Vista Premium Mobile compliant (Table ). DirectDrive Conventional single-supply headphone amplifiers have their outputs biased about a nominal DC voltage (typically half the supply) for maximum dynamic range. Large-coupling capacitors are needed to block this DC bias from the headphone. Without these capacitors, a significant amount of DC current flows to the headphone, resulting in unnecessary power dissipation and possible damage to both headphone and headphone amplifier. Maxim s DirectDrive architecture uses a charge pump to create an internal negative supply voltage, allowing the outputs to be biased at Table. Windows Vista Premium Mobile Specifications vs. Specifications DEVICE TYPE Analog Line Output Jack (R L = kω, FS =.77V RMS ) Analog Headphone Out Jack (R L = 32Ω, FS =.3V RMS ) REQUIREMENT WINDOWS VISTA PREMIUM MOBILE SPECIFICATIONS TYPICAL PERFORMANCE THD+N -65dB FS (Hz, 2kHz) -83dBFS (Hz, 2kHz) Dynamic range with signal present -8dBV, A-weighted (2Hz, 2kHz) -db A-weighted (2Hz, 2kHz) Line output crosstalk -5dB (2Hz, 5kHz) -73dB (2Hz, 5kHz) THD+N -45dB FS (Hz, 2kHz) -85dBFS (Hz, 2kHz) Dynamic range with signal present -6dBV, A-weighted (2Hz, 2kHz) -94dB A-weighted (2Hz, 2kHz) Headphone output crosstalk -5dB (2Hz, 5kHz) -73dB (2Hz, 5kHz) Note: THD+N, dynamic range, and crosstalk are measured in accordance with AES-7 audio measurements standards. 8
V OUT V DD V DD /2 GND CONVENTIONAL DRIVER OUTPUT WAVEFORMS V DD RF IMMUNITY (dbv) -2-4 -6-8 RF IMMUNITY vs. FREQUENCY LEFT CHANNEL fig2 V OUT V DD - RIGHT CHANNEL -2.8.35.9 2.45 3. FREQUENCY (GHz) Figure 2. RF Susceptibility GND -V DD OUTPUT WAVEFORMS 2V DD Figure. Conventional Driver Output Waveform vs. Output Waveform GND (Figure ). With no DC component, there is no need for the large DC-blocking capacitors. The charge pump requires two small ceramic capacitors, conserving board space, reducing cost, and improving the frequency response of the headphone amplifier. Charge Pump The features a low-noise charge pump. The 5kHz (typ) charge pump switching frequency is well beyond the audio range and does not interfere with audio signals. Click-and-Pop Suppression In conventional single-supply audio amplifiers, the output-coupling capacitor contributes significantly to audible clicks and pops. Upon startup, the amplifier charges the coupling capacitor to its bias voltage, typically half the supply. Likewise, on shutdown, the capacitor is discharged. This results in a DC shift across the capacitor, which appears as an audible transient at the speaker. Since DirectDrive biases the outputs at ground, this problem does not arise. Additionally, the features extensive click-and-pop suppression that eliminates any audible transient sources internal to the device. RF Susceptibility Modern audio systems are often subject to RF radiation from sources such as wireless and cellular phone networks. Although the RF radiation is out of the audio band, many signals, GSM signals in particular, contain bursts or modulation at audible frequencies. Most analog amplifiers demodulate the low-frequency envelope, adding noise to the audio signal. The architecture addresses the RF susceptibility problem by rejecting RF noise and preventing it from coupling into the audio band. 9
Shutdown The features a low-power shutdown mode that reduces quiescent current consumption to less than µa, extending battery life for portable applications. Drive SHDN low to disable the amplifiers and the charge pump. In shutdown mode, the amplifier output impedance is set to 6Ω R FB. The amplifiers and charge pump are enabled once SHDN is driven high. Applications Information Power Dissipation Under normal operating conditions, linear power amplifiers can dissipate a significant amount of power. The maximum power dissipation for each package is given in the Absolute Maximum Ratings section or can be calculated by the following equation: TJ( MAX) TA PDISSPKG( MAX) = θja where T J(MAX) is +5 C, T A is the ambient temperature, and θ JA is the reciprocal of the derating factor in C/W as specified in the Absolute Maximum Ratings section. The has two power dissipation sources: a charge pump and the two output amplifiers. If power dissipation for a given application exceeds the maximum allowed package power dissipation, reduce V DD, increase load impedance, decrease the ambient temperature, or add heatsinking to the device. Large output, supply, and ground traces decrease θ JA, allowing more heat to be transferred from the package to the surrounding air. Thermal-overload protection limits total power dissipation in the. When the junction temperature exceeds 45 C (typ), the thermal protection circuitry disables the amplifier output stage. The amplifiers are enabled once the junction temperature cools by approximately 5 C. Undervoltage Lockout (UVLO) The features a UVLO function that prevents the device from operating if the supply voltage falls below 2.2V (min). This feature ensures proper operation during brownout conditions and prevents deep battery discharge. Once the supply voltage reaches the minimum supply voltage range, the charge pump is turned on and the amplifiers are powered, provided that SHDN is high. Component Selection Input-Coupling Capacitor The input capacitor (C IN ), in conjunction with the input resistor (R IN ), forms a highpass filter that removes the DC bias from an incoming signal (see the Functional Diagram/Typical Operating Circuit). The AC-coupling capacitor allows the device to bias the signal to an optimum DC level. Assuming zero-source impedance, the -3dB point of the highpass filter is given by: f 3dB = 2πRINCIN Choose the C IN such that f -3dB is well below the lowest frequency of interest. Setting f -3dB too high affects the device s low-frequency response. Use capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, can result in increased distortion at low frequencies. Charge-Pump Capacitor Selection Use ceramic capacitors with a low ESR for optimum performance. For optimal performance over the extended temperature range, select capacitors with an X7R or X5R dielectric. Table 2 lists suggested manufacturers. Table 2. Suggested Capacitor Vendors SUPPLIER PHONE FAX WEBSITE Taiyo Yuden 8-348-2496 847-925-899 www.t-yuden.com TDK 847-83-6 847-39-445 www.component.tdk.com Murata 77-436-3 77-436-33 www.murata.com
Amplifier Gain The gain of the is set externally using input and feedback resistors (see the Functional Diagram/ Typical Operating Circuit). The gain is: R AV = FB ( VV / ) RIN Choose feedback resistor values in the tens of kω range. Layout and Grounding Proper layout and grounding are essential for optimum performance. Connect EP and GND together at a single point on the PCB. Ensure ground return resistance is minimized for optimum crosstalk performance. Place the power-supply bypass capacitor, the charge-pump hold capacitor, and the charge-pump flying capacitor as close as possible to the. Route all traces that carry switching transients away from the audio signal path. Functional Diagram/Typical Operating Circuit C IN.µF R IN 4.2kΩ R FB 4.2kΩ 7 INL OFF ON 9 SHDN UVLO/SHUTDOWN CONTROL TO V DD - OUTL 4 HEADPHONE JACK 2.7V TO 5.5V 8 V DD CLICK-AND-POP SUPPRESSION TO V SS C3 µf C.µF 2 CP CN CHARGE PUMP - TO V DD OUTR 5 GND V SS INR 3 C IN R IN 6 C2.µF 4.2kΩ.µF R FB 4.2kΩ PROCESS: BiCMOS Chip Information
Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. TDFN-EP T33+ 2-37 6, 8, &L, DFN THIN.EPS 2
Package Information (continued) For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. COMMON DIMENSIONS SYMBOL MIN. MAX. A.7.8 D 2.9 3. E 2.9 3. A..5 L.2.4 k.25 MIN. A2.2 REF. PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-] x e T633-2 6.5±. 2.3±..95 BSC MO229 / WEEA.4±.5.9 REF T833-2 8.5±. 2.3±..65 BSC MO229 / WEEC.3±.5.95 REF T833-3 8.5±. 2.3±..65 BSC MO229 / WEEC.3±.5.95 REF T33-.5±. 2.3±..5 BSC MO229 / WEED-3.25±.5 2. REF T33-2 T433-4.5±..7±. 2.3±. T433-2 4.7±. 2.3±. 2.3±..5 BSC MO229 / WEED-3.25±.5 2. REF.4 BSC - - - -.2±.5 2.4 REF.4 BSC - - - -.2±.5 2.4 REF Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA 9486 48-737-76 3 29 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.