HD74LS191FPEL. Synchronous Up / Down 4-bit Binary Counter (single clock line) Features. REJ03D Rev.2.00 Feb

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Synchronous Up / own 4-bit Binary Counter (single clock line) REJ030453 0200 Rev.2.00 Feb.18.2005 Synchronous operation is provided by having all flip-flops clocked simultaneously so that the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master-slave flip-flops are triggered on a low-to-high-level traition of the clock input if the enable input is high. The direction of the count is determined by the level of the down / up input. When low, the counter counts up and when high, it counts down. Level changes at the down / up input should be made only when the clock input is high. This counter is fully programmable; that is, the outputs may be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output will change to agree with the data inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-n dividers by simply modifying the count length with the preset inputs. The clock, down / up, and load inputs are buffered to lower the drive requirement which significantly reduces the number of clock drivers, etc., required for long parallel words. Two outputs have been made available to perform the cascading function; ripple clock and made available to perform the cascading function; ripple clock and maximum / minimum count. The latter output produces a high-level output pulse with a duration approximately equal to one complete cycles to the clock when the counter overflows or underflows. The ripple clock output produces a low-level output pulse equal in width to the low-level portion of the clock input when an overflow or underflow condition exists. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The maximum / minimum count output can be used to accomplish look-ahead for high-speed operation. Features Ordering Information Part Name H74LS191P H74LS191FPEL Package Type ILP-16 pin SOP-16 pin (JEIT) Package Code (Previous Code) PRP0016E-B (P-16FV) PRSP0016H-B (FP-16V) Note: Please coult the sales office for the above package availability. Package bbreviation P FP Taping bbreviation (Quantity) EL (2,000 pcs/reel) Rev.2.00, Feb.18.2005, page 1 of 10

Pin rrangement s ata B Input QB Q 1 2 3 QB Q B CK 16 15 14 V CC ata Inputs Inputs Enable G 4 5 G n/up Ripple Max/ Min 13 12 Ripple Max/Min s s QC Q 6 7 QC Q C 11 10 ata C Inputs GN 8 9 ata (Top view) Rev.2.00, Feb.18.2005, page 2 of 10

Block iagram ata Input Enable G K Q Clear Ripple Max/Min Preset J Q Q CK ata Input B Preset J QB QB CK K QB Clear ata Input C Preset J QC QC CK K QC Clear ata Input Preset J Q Q CK K Q Clear bsolute Maximum Ratings Item Symbol Ratings Unit Supply voltage V CC 7 V Input voltage V IN 7 V Power dissipation P T 400 mw Storage temperature Tstg 65 to +150 C Note: Voltage value, unless otherwise noted, are with respect to network ground terminal. Rev.2.00, Feb.18.2005, page 3 of 10

Recommended Operating Conditio Item Symbol Min Typ Max Unit Supply voltage V CC 4.75 5.00 5.25 V current I OH 400 µ I OL 8 m Operating temperature T opr 20 25 75 C frequency ƒ clock 0 20 MHz pulse width t w (CK) 25 pulse width t w () 35 Setup time t su 20 Hold time t h (data) 3 Enable time t enable 40 Electrical Characteristics Input voltage Item Symbol min. typ.* max. Unit Condition V IH 2.0 V V IL 0.8 V 2.7 V (Ta = 20 to +75 C) V CC = 4.75 V, V IH = 2 V, V IL = 0.8 V, I OH = 400 µα voltage 0.4 I OL = 4 m V 0.5 I OL = 8 m Enable 60 I IH µ V CC = 5.25 V, V I = 2.7 V Others 20 Input current Enable 1.2 Others I IL 0.4 Enable 0.3 Others Short-circuit output current I I 0.1 m m V CC = 5.25 V, V I = 0.4 V V CC = 5.25 V, V I = 7 V I OS 20 100 m V CC = 5.25 V Supply current** I CC 20 35 m V CC = 5.25 V V CC = 4.75 V, V IH = 2 V, V IL = 0.8 V Input clamp voltage V IK 1.5 V V CC = 4.75 V, I IN = 18 m Notes: * V CC = 5 V, Ta = 25 C ** I CC is measured with all outputs open and all inputs grounded. Rev.2.00, Feb.18.2005, page 4 of 10

Switching Characteristics (V CC = 5 V, Ta = 25 C) Item Symbol Inputs s min. typ. max. Unit Condition Maximum clock frequency Propagation delay time ƒ max Q, Q B, Q C, Q 20 25 MHz 22 33 Q, Q B, Q C, Q 33 50 ata, 20 32 Q, Q B, Q C, Q B, C, 27 40 13 20 Ripple 16 24 16 24 Q, Q B, Q C, Q 24 36 28 42 Max / Min 37 52 own / 30 45 Ripple Up 30 45 own / 21 33 Max / Min Up 22 33 21 33 Enable Ripple 22 33 C L = 15 pf, R L = 2 kω Rev.2.00, Feb.18.2005, page 5 of 10

Count Sequences B C Enable G Q Q B Q C Q Max/Min Ripple 13 14 15 0 Count Up 1 2 2 1 0 15 14 13 Inhibit Count own Illustrated below is the following sequence: 1. (preset) to binary thirteen. 2. Count up to fourteen, fifteen (maximum), zero, one and two. 3. Inhibit 4. Count down to one, zero (minimum), fifteen, fourteen, and thirteen. Rev.2.00, Feb.18.2005, page 6 of 10

Testing Method Test Circuit V CC 4.5V RL circuit 1 P.G. Zout = 50Ω Input See Testing Table Enable B C Ripple Q QB QC CL Max/Min Same as Circuit 1. Same as Circuit 1. Same as Circuit 1. Same as Circuit 1. Q Same as Circuit 1. Notes: 1. CL includes probe and jig capacitance. 2. ll diodes are 1S2074(H). Waveforms 1 ata Input Input t TLH t THL 90% 90% 10% 1. 1. 10% t su t su 1. 90% 1. 90% 10% 10% t TLH t TLH Note: Input pulse: t TLH, t THL 10, PRR = 1 MHz, duty cycle 50% Rev.2.00, Feb.18.2005, page 7 of 10

Waveforms 2 Q, ata Q 1. 1. ata ( to ) 1. 1. Q 1. 1. 1. 1. Note: Conditio on other inputs are irrelevant. Waveforms 3 G Ripple CK, CK Ripple CK, own / Up Ripple CK, own / Up Max / Min 1. 1. G 1. 1. Ripple/ 1. 1. 1. 1. Max/Min 1. 1. Rev.2.00, Feb.18.2005, page 8 of 10

Waveforms 4 Q ata ( to ) 1. 1. Q Enable = 1. 1. Waveforms 5 Max / Min Inputs B, C, 1. 1. 1. 1. Max/Min Enable = 1. 1. 1. 1. Rev.2.00, Feb.18.2005, page 9 of 10

1 H74LS191 Package imeio JEIT Package Code P-IP16-6.3x19.2-2.54 RENESS Code PRP0016E-B Previous Code P-16FV MSS[Typ.] 1.05g 16 9 E 1 8 0.89 b 3 Z L Reference Symbol e 1 E imeion in Millimeters Min Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 1 0.51 e b p θ c b p b 3 0.40 0.48 1.30 0.56 e 1 c θ 0.19 0.25 0.31 0 15 e 2.29 2.54 2.79 ( Ni/Pd/u plating ) Z L 2.54 1.12 JEIT Package Code P-SOP16-5.5x10.06-1.27 RENESS Code PRSP0016H-B Previous Code FP-16V MSS[Typ.] 0.24g *1 *2 E 16 9 F b p E H 1 Z Index mark 8 *3 b p x M Reference Symbol E 2 1 b p imeion in Millimeters Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 b 1 c 0.15 0.20 0.25 c 1 θ 0 8 H E 7.50 7.80 8.00 y c 1 NOTE) 1. IMENSIONS"*1 (Nom)"N"*2" O NOT INCLUE MOL FLSH. 2. IMENSION"*3"OES NOT INCLUE TRIM OFFSET. e Terminal cross section ( Ni/Pd/u plating ) L1 L θ e x 1.27 0.12 etail F y Z L 0.50 0.70 0.15 0.80 0.90 L 1 1.15 Rev.2.00, Feb.18.2005, page 10 of 10

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