General Purpose Clock Synthesizer

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1CY 290 7 fax id: 3521 CY2907 General Purpose Clock Synthesizer Features Highly configurable single PLL clock synthesizer provides all clocking requirements for numerous applications Compatible with all industry standard 9107 and 9108 pinouts. 1 MHz to 32 MHz input reference frequency (depending on option) Up to 16 user-selectable output frequencies in one configuration Output frequencies from 2 MHz to 120 MHz at 5.0V (2 MHz to 90 MHz at 3.3V) Secondary output clock available () as a function of or as a buffered reference clock EPROM programmability for Quick-turn custom versions much faster than metal mask design change Power-down function available ± 250ps absolute jitter Logic Block Diagram Available in 8-pin or 14-pin SOIC packages 3.3V or 5.0V operation Functional Description The CY2907 is a general-purpose Clock Synthesizer/Driver chip. The CY2907 generates multiple system clocks at different frequencies from a single reference frequency input. The CY2907 can be used in a wide variety of applications from graphics to PC motherboards to disk drives. Any application that requires more than one clock frequency can benefit from using the CY2907. The CY2907 is configured with an EPROM array, making it easily customizable for any application. Custom versions of the CY2907 with user-defined features and frequencies are available. Refer to the custom configuration form at the back of this document and contact your local Cypress representative for more details. The CY2907 is compatible with all industry standard 9107 and 9108 clock synthesizers. Pin Configurations [1] OEA OER PD XTALIN XTALOUT OSC. PLL Output Multiplexer and Dividers S1 S2 S3 V SS V SS PD XTALIN Top View SOIC 03/ 11 1 2 3 4 5 6 7 14 13 12 11 10 9 8 S0 OEA OER XTALOUT S0 S1 EPROM Table Configuration EPROM and Test Logic S0 V SS XTALIN XTALOUT SOIC 05/ 10 1 8 2 7 3 6 4 5 S1 S2 2907 1 2907 2 S3 Note: 1. Additional configurations available. Refer to the custom configuration form at the back of this document, and contact your local Cypress representative for more information. Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600 January 1996 Revised December 9, 1996

Pin Summary Option: 03, 11 05, 10 Name Pin Number Description S1 1 5 Frequency select () (Internal pull-up resistor to ) S2 2 Frequency select () (Internal pull-up resistor to ) S3 3 Frequency select () (Internal pull-up resistor to ) V SS 4 2 Ground V SS 5 Ground PD 6 Power Down (active LOW) (Internal pull-up resistor to ) XTALIN [2] 7 3 Reference crystal input XTALOUT [2,3] 8 4 Reference crystal feedback OER 9 Output enable (active HIGH) (Internal pull-up resistor to ) OEA 10 Output enable (active HIGH) (Internal pull-up resistor to ) 11 6 Clock output 12 7 Voltage supply 13 8 Reference clock output S0 14 1 Frequency select () (Internal pull-up resistor to ) Select Pin Definitions [1] Option 03 [4] 11 Option 05 10 Input Frequency (MHz) 14.318 14.318 Input Frequency (MHz) 14.318 14.318 Select Pins: Output Frequency (MHz): Select Pins: Output Frequency (MHz): S3 S2 S1 S0 S1 S0 0 0 0 0 16.00 16.00 0 0 40.01 25.057 0 0 0 1 39.99 33.39 0 1 50.11 33.289 0 0 1 0 50.11 50.11 1 0 66.61 40.006 0 0 1 1 80.01 80.01 1 1 80.01 50.113 0 1 0 0 66.58 66.58 0 1 0 1 100.23 100.23 0 1 1 0 8.02 60.00 0 1 1 1 4.01 4.01 1 0 0 0 8.02 8.02 1 0 0 1 20.00 20.05 1 0 1 0 25.06 25.06 1 0 1 1 40.01 39.99 1 1 0 0 33.29 33.25 1 1 0 1 50.11 50.11 1 1 1 0 4.01 30.00 1 1 1 1 2.05 4.01 Notes: 2. For best accuracy, use a parallel-resonant crystal, C LOAD 17 pf. 3. Float XTALOUT pin if XTALIN is driven by reference clock (as opposed to crystal). 4. CY2907-3 has smooth frequency transitions between any of the two groups of eight frequencies (S3 = 0 or S3 = 1), so that the device will switch glitch-free between 4-100 MHz and 2-50 MHz. 2

Maximum Ratings (Beyond which the useful life may be impaired. For user guidelines, not tested.) Supply Voltage... 0.5 to +7.0V Input Voltage... 0.5V to +0.5V Operating Conditions [5] CY2907 Storage Temperature (Non-Condensing)... 65 C to +150 C Max. Soldering Temperature (10 sec)... +260 C Junction Temperature... +150 C Static Discharge Voltage... >2000V (per MIL-STD-883, Method 3015) Parameter Description Min. Max. Unit Supply Voltage, 5V Operation 4.5 5.5 V Supply Voltage, 3.3V Operation 3.0 3.7 V T A Operating Temperature, Ambient 0 70 C C L Max. Capacitive Load 15 pf Electrical Characteristics at 5.0V = 4.5V to 5.5V, T A = 0 C to +70 C Parameter Description Test Conditions Min. Max. Unit V IH High-level Input Voltage Except Crystal Inputs 2.0 V V IL Low-level Input Voltage Except Crystal Inputs 0.8 V V OH V OL I OH I OL High-level Output Voltage = Min. I OH = 30 ma 2.4 V Low-level Output Voltage = Min. I OL = 10 ma 0.4 V Output High Current V OH = 2.0V 35 ma Output Low Current V OL = 0.8V 22 ma I IH Input High Current V IH = 2 2 µa I IL Input Low Current V IL = 0V 20 µa I DD [7] Power Supply Current PD HIGH, 50 MHz 42 ma I DD Power Supply Current PD LOW, Logic Inputs LOW 100 µa I DD Power Supply Current PD LOW, Logic Inputs HIGH 40 µa R PU Pull-up resistor V IN = 1.0 V 700 kω Electrical Characteristics at 3.3V = 3.0V to 3.7V, T A = 0 C to +70 C Parameter Description Test Conditions Min. Max. Unit V IH High-level Input Voltage Except Crystal Inputs 0.7* V V IL Low-level Input Voltage Except Crystal Inputs 0.2* V V OH V OL I OH I OL High-level Output Voltage, I OH = 5 ma 0.85* V Low-level Output Voltage, I OL = 6 ma 0.1* V Output High Current V OH = 0.7* 10 ma Output Low Current V OL = 0.2* 15 ma I IH Input High Current V IH = 2 2 µa I IL Input Low Current V IL = 0V 10 µa I DD [7] Power Supply Current PD HIGH, = 50 MHz 40 ma I DD Power Supply Current PD LOW, Logic Inputs LOW 40 µa I DD Power Supply Current PD LOW, Logic Inputs HIGH 12 µa R PU Pull-up resistor V IN = 0.5V 900 kω Notes: 5. Electrical parameters are guaranteed with these operating conditions. 6. Guaranteed by design, not 100% tested in production 7. Load = max. typical configuration, f REF = 14.318 MHz. Specific configurations may vary. A close approximation of I DD can be derived by the following formula: I DD (ma) = * (6.25 + (0.055*F REF ) + (0.0017*C LOAD *(F + ))). C LOAD is specified in pf and F is specified in MHz. 3

Switching Characteristics at 5.0V Parameter Output Description Test Conditions Min. Max. Unit t R Output Rise Time 0.8V to 2.0V 15 pf Load 1.40 ns t F Output Fall Time 2.0V to 0.8V 15 pf Load 1.00 ns t R Output Rise Time 20% to 80% 15 pf Load 3.5 ns t F Output Fall Time 80% to 20% 15 pf Load 2.5 ns t D Duty Cycle 15 pf Load at 1.4V 45.0 55.0 % F I XTALIN Input Frequency Crystal Oscillator 10 25 MHz F I XTALIN Input Frequency External Input Clock 1 32 MHz F O Output Frequency 2.0 120.0 MHz t JIS Jitter (One Sigma) 20 MHz to 100 MHz 150 ps t JIS Jitter (One Sigma) 14 MHz to 20 MHz 200 ps t JIS Jitter (One Sigma) Less than 14 MHz 1 % t JAB Jitter (Absolute) 20 MHz to 100 MHz 250 + 250 ps t JAB Jitter (Absolute) 14 MHz to 20 MHz 500 + 500 ps t JAB Jitter (Absolute) Less than 14 MHz 3 % t PU Power-up Time 18 ms t FT Transition Time 8 MHz to 66.6 MHz 13 ms Switching Characteristics at 3.3V Parameter Output Description Test Conditions Min. Max. Unit t R Output Rise Time 20% to 80% 15 pf Load 3.5 ns t F Output Fall Time 80% to 20% 15 pf Load 2.5 ns t D Duty Cycle 15 pf Load at 1.4V 40.0 53.0 % F I XTALIN Input Frequency Crystal Oscillator 10 25 MHz F I XTALIN Input Frequency External Input Clock [8] 1 32 MHz F O Output Frequency 2.0 90.0 MHz t JIS Jitter (One Sigma) 25 MHz to 85 MHz 150 ps t JIS Jitter (One Sigma) 14 MHz to 25 MHz 200 ps t JIS Jitter (One Sigma) Less than 14 MHz 1 % t JAB Jitter (Absolute) 25 MHz to 85 MHz 250 +250 ps t JAB Jitter (Absolute) 14 MHz to 25 MHz 500 +500 ps t JAB Jitter (Absolute) Less than 14 MHz 3 % t PU Power-up Time 18 ms t FT Transition Time 8 MHz to 66.6 MHz 13 ms Notes: 8. Please refer to the application note Crystal Oscillator Topics when using an external reference clock as an input frequency source. 4

Switching Waveforms Frequency Select Change (Transition Time) SELECT OLD SELECT NEW SELECT STABLE F old t FT F new 2907 4 2907 3 Duty Cycle Timing t D = t 2 t 1 t 1 t 2 1.4V 2907 5 All Outputs Rise/Fall Time 80% 20% t R t F 2907 6 Test Circuit 0.1 µf C LOAD OUTPUTS C LOAD Note: All capacitors should be placed as close to each pin as possible. Ordering Information Ordering Code Package Name Package Type Operating Range CY2907SC xxx S8, S14 8-pin or 14-pin SOIC Commercial Document #: 38 00505 A 5

CY2907 CUSTOM CONFIGURATION REQUEST FORM Company Engineer FAE/Sales Phone# Fax# Date The CY2907 is a factory EPROM-programmable single PLL clock synthesizer. The CY2907 can be configured to support the clocking needs of many types of applications. In addition to the standard configurations described in the datasheet, custom configurations with user-defined frequencies and features can be obtained. Follow the steps outlined in this form contact your local Cypress representative to request your custom configuration of the CY2907. 1. OPERATING VOLTAGE(Circle one) 3.3V 5.0V 2. DESIRED PACKAGE SIZE (Circle one) 8-pin Please note that all functions may not fit in the 8-pin package 3. PACKAGE TYPE (Circle one) DIP 4. INPUT REFERENCE FREQUENCY (Circle one) Crystal External Clock 14.318 MHz (Default) If a different reference is required, specify the frequency in the box to the right (must be between 10 MHz and 25 MHz for crystal, 1 MHz and 32 MHz for external clock): 5. PLL FREQUENCIES Complete the appropriate table for either 8-pin or 14-pin option. 14-pin Select (S3..S0) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Requested Actual Range:2 120MHzat5V;2 90MHzat3.3V 14-pin 6. OUTPUT CONFIGURATION Use the table below to select up to two outputs. Write in the number of the output in the boxes provided. Actual output frequencies must fall within the range of Output Frequency, F O, described in the datasheet. Output Options Table 1.PLL 2. PLL/2 3. PLL/3 4. PLL/4 5. PLL/5 6. PLL/8 7. Ref 8. Ref/2 9. Off OUTPUT 8-pin Select (S1..S0) 00 01 10 11 OUTPUT SOIC Requested Actual Range: 2 120MHz at 5V; 2 90 MHz at 3.3V This form can be configured using CyClocks TM software which is available from the Cypress Website (http://www.cypress.com), or your local Cypress representative. FOR CYPRESS USE ONLY (Shaded areas above and below) Customer Configuration Marking Date Quantity 6

Package Diagram 8-Lead (150-Mil) SOIC S8 14-Lead SOIC S14 Cypress Semiconductor Corporation, 1996. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.