Exercise 3-2. Digital Modulation EXERCISE OBJECTIVE DISCUSSION OUTLINE DISCUSSION. PSK digital modulation

Exercise 3-2 Digital Modulation EXERCISE OBJECTIVE When you have completed this exercise, you will be familiar with PSK digital modulation and with a typical QPSK modulator and demodulator. DISCUSSION OUTLINE The Discussion of this exercise covers the following points: PSK digital modulation The M-ary PSK waveform QPSK constellations A typical QPSK modulator Symbol rate and bandwidth Demodulation and detection QPSK demodulation Detection and conversion of the raw data signals Carrier recovery DISCUSSION PSK digital modulation PSK uses multiple phases as modulation symbols. As already mentioned, all forms of M-ary PSK have a constant envelope, making them less sensitive to fading and nonlinearity. As the number of bits per symbol increases, the spectral efficiency increases but so does the error rate in the presence of noise. QPSK, which transmits two bits par symbol, offers a good compromise in many systems. Since all forms of PSK suffer from phase ambiguity (see Phase ambiguity in Exercise 3-3), differential encoding is often used. This eliminates the phase ambiguity at the cost of a slightly greater error rate for the same transmitted power. This can be compensated for, however, by a small increase in transmitter power. a Although the Satellite Communication System uses DQPSK (differential quadrature phase-shift keying), it is important to understand QPSK and the operation of a QPSK modulator and demodulator. Differential encoding is presented in Exercise 3-3. Festo Didactic 86311-00 213

Ex. 3-2 Digital Modulation Discussion The M-ary PSK waveform * Filters are usually used near the output of a PSK modulator in order to restrict the bandwidth. This and other circuit particularities may result in amplitude variations in the PSK signal. Such amplitude variations, however, do not convey information. Only the phase of the waveform conveys information. With all forms of PSK, a sinusoidal waveform is varied in phase while keeping the amplitude * and frequency constant. Equation (3-5) shows the general expression for an M-ary PSK waveform. where (3-5) is the PSK signal waveform for phase is time is the peak amplitude is the carrier frequency in radians/s ( ) is the reference phase angle is phase is an integer ranging from 1 to The phase of the PSK waveform has discrete values equal to, where is the size of the symbol alphabet and takes on the values {1, 2, }. With quadrature PSK (QPSK), for example, there are four possible phases so. QPSK constellations The ideal PSK constellation has equidistant phase states and constant amplitude, resulting in a circular symmetry. With QPSK, the phases are separated by 90, as shown in Figure 3-48. Q A B C D B A I C D a) QPSK ( ) B Q A B C D A C I D b) QPSK ( ) Figure 3-48. QPSK constellation and waveforms. 214 Festo Didactic 86311-00

Ex. 3-2 Digital Modulation Discussion Figure 3-48 shows two common representations of the QPSK constellation. The constellation points are arbitrarily labeled A, B, C and D, each of which represents one of the four possible dibits 00, 01, 10, and 11. The mapping between the dibits and the constellation points depends on the modulator circuit. Beside each constellation in Figure 3-48 is a plot showing all four phases (modulation symbols) as sinusoids. In each of these representations, the four phases are spaced 90 ( radians) apart. The only difference between these representations is the choice of the reference phase angle ( 0 in Equation (3-5)). A typical QPSK modulator A QPSK signal can be generated by independently modulating two carriers in phase quadrature ( and ) and summing the result, as shown in Figure 3-49. I/Q Modulator Binary Data (baseband) Serial to Parallel Converter Level Converter I Channel Q Channel Low-Pass Filter QPSK Signal (IF) Level Converter Low-Pass Filter QPSK Symbol Generator QPSK Signal Generator Figure 3-49. Simplified block diagram of a QPSK modulator (with no encoder). The Serial to Parallel Converter acts as a symbol generator, grouping the incoming data bits into symbols called dibits (groups of two consecutive bits). Each time two bits have been clocked serially into its buffer, the Serial to Parallel Converter outputs one dibit in parallel at its two outputs. The grouping into dibits is arbitrary and can start at any bit. For this reason, it is not possible to predict the dibits that will be generated from a given series of binary data bits. However, regardless of how the data bits are grouped into dibits at the transmitter, the demodulator in the receiver will correctly reconstruct the original data. One bit of each dibit is sent to the I channel of the QPSK signal generator; the other bit is sent to the Q channel. Each channel works independently to processes the stream of bits it receives. The Level Converter in each channel converts the data into a baseband bipolar pulse stream that can be applied to one input of the mixer. To restrict the bandwidth of the QPSK signal, a Low-Pass Filter is usually used before the mixer in each channel of the modulator in order to provide the desired spectral shaping. Since the modulator multiplies the baseband carriers by the baseband signal, this is equivalent to low-pass filtering the IF modulated signal. Festo Didactic 86311-00 215

Ex. 3-2 Digital Modulation Discussion Filtering the signal in the baseband avoids using more a expensive filter that operates at the intermediate frequency. Nonetheless, an IF band-pass filter (not shown in Figure 3-49) is used in some cases to filter the QPSK signal before upconversion. The I/Q modulator consists of two product mixers as well as a local oscillator which generates the sinusoidal carriers and. Each mixer performs modulation by multiplying a carrier by a bipolar pulse stream. Theoretically, the carriers have no dc offset. When the bipolar pulse is positive, the carrier is passed unchanged. When the bipolar pulse is negative, the mixer inverts the phase of the carrier. In this way, each mixer generates a BPSK signal. a Ideal product mixers act as signal multipliers, producing an output signal equal to the product of the two input signals. In practice, high-frequency components have characteristics that deviate from theoretical ideals. For example, the mixers used in the Earth Station Transmitter I/Q Modulator require an input signal with a dc offset of roughly 0.5 V rather than 0 V. Orthogonal signals can be summed, transmitted in a channel and (theoretically) perfectly separated in the demodulator without any mutual interference. If the levels of the bipolar pulses,, etc. are +1 and -1, the peak amplitude of the waveform that is represented by Equation (3-6) is. The factor could be included in this equation to normalize the amplitude to unity. The two BPSK signals are summed to produce the QPSK signal which occupies a bandwidth centered on the frequency of the carrier. Because these two BPSK signals are generated using two carriers in quadrature, the BPSK signals are orthogonal, and the QPSK demodulator will be able to demodulate them separately. The output signal of the modulator is a sinusoidal carrier with four possible phases, each of which represents a two-bit symbol. This signal can be represented by Equation (3-6). (3-6) where is the QPSK signal waveform is the I-channel bipolar pulse stream,, is the Q-channel bipolar pulse stream,, is the angular frequency Figure 3-50 shows an example of the theoretical waveforms present in a modulator with no filtering. The bipolar I-channel and Q-channel pulses have levels of +1 and -1. The QPSK signal shown in Figure 3-50 has discontinuities which increase the bandwidth of the signal. The Low-Pass Filters shown in Figure 3-49 smooth the discontinuities and decrease the effective bandwidth. a Figure 3-50 shows all waveforms synchronized in time. In a real system, processing delays will cause successive signals to be slightly offset in time. 216 Festo Didactic 86311-00

Ex. 3-2 Digital Modulation Discussion Figure 3-50 shows the dibit 11 mapped to the constellation point in the first quadrant. Other mappings are possible. Such mappings usually use a Gray code to ensure that only one bit changes between adjacent symbols. As a result, QPSK modulators map the dibits 00 and 11 to opposite quadrants. Data Bit Stream,, 1 I-Channel Pulses,, (even bits) Q-Channel Pulses,, (odd bits) I-Channel BPSK Signal 0 1 0-1 1 0-1 Q-Channel BPSK Signal QPSK Signal Constellation Points and Dibits This is an example, other mappings are possible. The I-channel may represent the MSB or the LSB of each symbol. 11 01 11 10 00 Figure 3-50. QPSK signal generation from two BPSK signals (no differential encoding). Symbol rate and bandwidth Because each symbol represents two bits, the rate that the symbols occur in the QPSK signal (the symbol rate) is one half the bit rate. Table 3-5 compares the symbol rates and bandwidths for BPSK and QPSK. Table 3-5. Symbol rate and bandwidth for BPSK and QPSK. Modulation Bits per symbol Symbol rate vs. Bit rate Main-lobe bandwidth BPSK 1 QPSK 2 The bandwidth of a modulated signal depends on the rate of change in the signal (i.e. the symbol rate) and not on the magnitude of each change. For this reason, using QPSK rather than BPSK will reduce by one-half the bandwidth required for a given bit rate. Alternatively, using QPSK can double the bit rate for a given Festo Didactic 86311-00 217

Ex. 3-2 Digital Modulation Discussion signal bandwidth. This is illustrated by the unfiltered amplitude spectra in Figure 3-51, where fc is the carrier frequency. Main-lobe bandwidth BPSK Amplitude f c-2r b f c-r b f c f c+r b f c+2r b Main-lobe bandwidth QPSK Amplitude f c-4r s f c-3r s f c-2r s f c-r s f c f c+r s f c+2r s f c+3r s f c+4r s Figure 3-51. BPSK and QPSK amplitude spectra (for equal bit rates). The modulated signal is called a double-sideband suppressed-carrier signal, since the spectrum is symmetric about the carrier frequency and there is no isolated signal at the carrier frequency. Figure 3-51 shows that the main-lobe bandwidth of a BPSK signal is and that of a QPSK signal with the same bit rate is. Therefore, the theoretical spectral efficiency of QPSK is twice that of BPSK. Most of the power in the signal spectrum is spread over the main lobe, which is centered on the carrier frequency; the lobes diminish in importance with their distance from the carrier frequency. In theory, there is no limit to the bandwidth but, as with FM signals, the contribution of frequencies far from the carrier is negligible. For this reason, there is no universal definition of bandwidth for digital signals. Some common definitions are given below. Main-lobe bandwidth, or null-to-null bandwidth: the width of the main spectral lobe of the power spectral density bounded by spectral nulls if they exist. The majority of the signal power for many digital modulation methods is contained between the first two nulls of the spectrum. Fractional power containment bandwidth: the amount of spectrum width needed to contain a certain percentage of the signal s power. The most common percentage used is 99%. Nyquist bandwidth: the minimum theoretical bandwidth necessary to propagate a signal. The Nyquist bandwidth is equal to the symbol rate. 218 Festo Didactic 86311-00

Ex. 3-2 Digital Modulation Discussion The International Telecommunication Union (ITU) and the National Telecommunications and Information Administration (NTIA) in the U.S.A. use the following definitions to qualify the bandwidth. Necessary bandwidth: For a given class of emission, the width of the frequency band which is just sufficient to ensure the transmission of information at the rate and with the quality required under specified conditions. For M-ary modulation, the necessary bandwidth is defined by: (3-7) where is the necessary bandwidth is the bit rate is the size of the symbol alphabet is a design factor that depends on the implementation When the design factor, the necessary bandwidth equals the null-to-null bandwidth. The Nyquist bandwidth corresponds to. Depending on the system design and the performance required, the design factor may range roughly from 0.6 to 1.5. Occupied bandwidth: The width of a frequency band such that, below the lower and above the upper frequency limits, the mean powers emitted are each equal to a specified percentage of the total mean power of a given emission. Unless otherwise specified for the appropriate class of emission, the value of should be taken as 0.5%. This is the same as the fractional power containment bandwidth with a specified percentage of 99%. Authorized bandwidth: The NTIA defines this as the necessary bandwidth (bandwidth required for transmission and reception of intelligence) and does not include allowance for transmitter drift or Doppler shift. Demodulation and detection With analog modulation, the demodulator attempts to recover the original analog waveform as accurately as possible from the noisy and distorted signal at the demodulator input. With digital modulation however, accurate recovery of the original waveform is unnecessary. Instead the demodulator only tries to determine, once per symbol interval, which symbol is being transmitted from among all of the available symbols. The QPSK signal has four possible waveforms, or signal states (phases), each representing one dibit of data. The role of the demodulator is therefore to determine which of the four phases was sent during each symbol interval and to map this phase back to the dibit it represents. Since the modulator shifted the spectrum of the baseband data pulses up to the carrier frequency, the first step required to recover the data is to shift the Festo Didactic 86311-00 219

Ex. 3-2 Digital Modulation Discussion spectrum of the received signal back down to the baseband. The term demodulation is often used to specifically refer to this operation, although this term is also used to refer to the entire process of recovering the original data from the modulated signal. The second step is to decide what data each of the pulses in the demodulated signal represents. This is called detection. During transmission through the channel, the signal is usually corrupted by noise. This can be represented in the constellation diagram as a displacement of the constellation points. Figure 3-52 shows the constellation points for a large number of symbols in a noisy QPSK signal. In this figure, the horizontal and vertical axes divide the signal space into four regions. The axes also represent the decision boundaries for deciding which symbol is being received. Each constellation point corresponds to the head of a phasor. The distance of the point from the origin shows the amplitude of the corresponding waveform and the angle from the I-axis shows the phase of the waveform. Figure 3-52. Constellation of received QPSK signal with Gaussian noise. Although the noise affects both the amplitude (distance from the origin) and the phase (angle from the axis) of each received symbol waveform, only the phase is considered by the demodulator. As long as noise displaces a constellation point within the same region of the signal space, the demodulator can correctly recover the data. When the noise changes the phase of a symbol waveform so much that the constellation point crosses a decision boundary and moves into a different region, an error occurs and the recovered data is incorrect. 220 Festo Didactic 86311-00

Ex. 3-2 Digital Modulation Discussion QPSK demodulation The QPSK demodulation process is performed using two mixers and two carrier signals in phase quadrature, as shown in Figure 3-53. The carriers are generated by a carrier recovery circuit such as a Costas loop. The demodulator is able to separately demodulate the I- and Q-channel BPSK signals that were combined in the modulator because these two BPSK signals are orthogonal (they were generated using two carriers in phase quadrature). I Channel Level Converter Sample & Hold Decision Circuit QPSK Input Clock Recovery Recovered Clock Parallel to Serial Converter Data Output Q Channel Level Converter Sample & Hold Decision Circuit Carrier Recovery Figure 3-53. Simplified QPSK demodulator circuit. An idealized QPSK waveform can be represented by Equation (3-8). (3-8) where is the QPSK signal waveform is the I-channel bipolar pulse stream,, is the Q-channel bipolar pulse stream,, is the angular frequency Festo Didactic 86311-00 221

Ex. 3-2 Digital Modulation Discussion In order to demodulate the I-channel portion of this waveform, it is multiplied by the in-phase carrier as shown in Equation (3-9). (3-9) where is the output waveform of the I-channel mixer is the I-channel bipolar pulse stream is the Q-channel bipolar pulse stream is the angular frequency The output of the I-channel mixer consists of an analog signal containing bipolar data pulses and high-frequency components and. Similarly, the output of the Q-channel mixer contains the bipolar data pulses and high frequency components. These signals are shown in Figure 3-54. QPSK signal I-Channel Mixer Output Q-Channel Mixer Output Figure 3-54. Unfiltered QPSK demodulator mixer outputs. 222 Festo Didactic 86311-00

Ex. 3-2 Digital Modulation Discussion Detection and conversion of the raw data signals The integrator in each channel of the demodulator removes the high-frequency components leaving only the raw data pulses. In a practical system, two low-pass filters perform the integration. Since the integrated signal in each channel is a time-varying analog signal, these two signals must be converted onto digital signals that represent the dibits. This is called detection and is accomplished in each channel by a sample and hold circuit followed by a decision circuit. The sample and hold circuits are triggered by a clock signal that is recovered from the received signal. The decision circuit makes a decision as to which binary state each sample represents. This circuit determines the decision boundaries (the axes in Figure 3-52). The output of the each decision circuit is a stream of fixed-amplitude data pulses each of which represents one bit of a dibit. In this way, one dibit, consisting of one bit from each channel, is generated per symbol interval. The Parallel to Serial Converter combines the dibits into bits in order to recover the original data stream. Carrier recovery The type of demodulator shown in Figure 3-53 uses two reference signals: and. These signals are recovered copies of the phase-quadrature carrier signals used in the modulator. This type of receiver is termed coherent. The I-channel carrier is produced by a local oscillator which is made to lock on to one of the phases in the QPSK signal. The Q-channel carrier is generated from the I-channel carrier using a 90 phase shift circuit. One type of circuit used for carrier recovery and demodulation is the Costas loop. This circuit uses a voltage-controlled oscillator (VCO) to generate a carrier. A feedback loop containing an integrator produces a control voltage that is applied to the VCO in order to keep it a constant frequency and phase. Like all circuits used in carrier recovery, the Costas loop is affected by phase ambiguity. Festo Didactic 86311-00 223

Outline PROCEDURE OUTLINE The Procedure is divided into the following sections: System startup Symbol generation Differential encoding Level converters and low-pass filters Identifying the QPSK constellation points Digital demodulation Signal spectrum and bandwidth PROCEDURE System startup 1. If not already done, set up the system and align the antennas visually as shown in Appendix B. 2. Make sure that no hardware faults have been activated in the Earth Station Transmitter or the Earth Station Receiver. b Faults in these modules are activated for troubleshooting exercises using DIP switches located behind a removable panel on the back of these modules. For normal operation, all fault DIP switches should be in the O position. 3. Turn on each module that has a front panel Power switch (push the switch into the I position). After a few seconds, the Power LED should light. 4. If you are using the optional Telemetry and Instrumentation Add-On: Make sure there is a USB connection between the Data Generation/Acquisition Interface, the Virtual Instrument, and the host computer, as described in Appendix B. Turn on the Virtual Instrument using the rear panel power switch. b If the TiePieSCOPE drivers need to be installed, this will be done automatically in Windows 7 and 8. In Windows XP, the Found New Hardware Wizard will appear (it may appear twice). In this case, do not connect to Windows Update (select No, not this time and click Next). Then select Install the software automatically and click Next. Start the Telemetry and Instrumentation application. In the Application Selector, do not select Work in stand-alone mode. b If the Telemetry and Instrumentation application is already running, exit and restart it. This will ensure that no faults are active in the Satellite Repeater. 224 Festo Didactic 86311-00

Symbol generation In this section, you will observe how the Serial to Parallel Converter generates symbols (dibits) from the bits in the input data stream. 5. Make the connections shown in Figure 3-55. BIT CLOCK BIT CLOCK OUTPUT Earth Station Transmitter Binary Sequence Generator (BSG) DATA DATA INPUT 5 Digital Modulator I Q I Q IF 1 OUTPUT Up Converter 1 Up Converter 2 RF OUTPUT Satellite Repeater RF OUTPUT Earth Station Receiver Down Converter 2 IF 2 OUTPUT Down Converter 1 Digital Demodulator I Q I Q Figure 3-55. Connections for unmultiplexed digital transmission. 6. On the Earth Station Transmitter, make the following adjustments: Data Source... Sampler Scrambler... Off Clock & Frame encoder... Off Configure the binary sequence generator to produce the sequence 00 1111 0001 at a bit rate of 20 Mbit/s. Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter TP4 Serial to Parallel Converter input Ch 2 BSG1 Sync. Sequence generator sync. signal Festo Didactic 86311-00 225

Using the Telemetry and Instrumentation Add-On In the Telemetry and Instrumentation application, your could make the following settings and connections: Digital Output Settings Digital Output 1 Source... BSG1 Signal... Data Digital Output 3 Source... BSG1 Signal... Sync. Generator Settings Binary Sequence Generator (BSG) 1 Generation Mode... User Entry Binary Sequence... 00 1111 0001 Bit Rate... 20 000 000 BIT CLOCK Data Generation/ Acquisition Interface DIGITAL OUTPUT 1 (BSG1 Data) DIGITAL OUTPUT 3 (BSG1 Sync.) DATA INPUT 5 CH1 IN CH2 IN EXT TRIG TP4 Digital Modulator I Q BIT CLOCK OUTPUT I Q Virtual Instrument Figure 3-56 shows an example of the signals. Oscilloscope Settings: Channel 1 Scale *... 200 mv/div Channel 2 Scale... 5 V/div Time Base... 0.1 s/div Trigger Source... Ch 2 Trigger Level... 2.0 V Trigger Slope... Rising * with x10 probe Serial to Parallel Converter input (TP4) BSG1 Sync. signal Figure 3-56. Serial to Parallel Converter input and BSG1 Sync. signal. 226 Festo Didactic 86311-00

Observe the sequence displayed on the oscilloscope and make sure the sequence of bits and the bit rate correspond to the settings on the generator. Note that the sync. signal contains a pulse approximately aligned with the beginning of each repetition of the configured binary sequence. a The bit pattern at TP4 is delayed roughly 0.04 s with respect to the sync. signal because of cable lengths and processing delays in the transmitter. 7. Before observing the signals at the output of the Serial to Parallel Converter, read the following information, then use Table 3-6 below to predict the Serial to Parallel Converter output. The Serial to Parallel Converter As mentioned in the Discussion, the Serial to Parallel Converter converts the incoming data bits into two-bit symbols called dibits. In normal use, the signals at all DATA INPUTs on the Earth Station Transmitter are sampled either by the Sampler or the Clock & Frame Encoder, and perhaps the Scrambler. As these circuits are clocked by the Bit Clock, the channel bit rate at the input of the Serial to Parallel Converter is 20 Mbit/s, regardless of the bit rate at any of the DATA INPUTs. For example, if the data at DATA INPUT 5 consists of alternating 1s and 0s (101010 ) at a bit rate of 5 Mbit/s, the data at the input of the Serial to Parallel Converter is interpreted as 111100001111000011110000 at 20 Mbit/s, that is, four channel bits for each bit at DATA INPUT 5. If the bit rate at DATA INPUT 5 is 20 Mbit/s, there is one channel bit at the input of the Serial to Parallel Converter for each bit at DATA INPUT 5 The Serial to Parallel Converter groups the 20 Mbit/s data bits into dibits and outputs one bit of each dibit into the I-channel (TP6) and the other bit into the Q-channel (TP7). The grouping into dibits is arbitrary and can start at any bit. When the data at the input of the Serial to Parallel Converter consists of a repeating sequence with an even number of bits, there are two possible conditions: A) the grouping starts with the first bit of the sequence or B) the grouping starts with the second bit of the sequence. For example, the repeating bit sequence 1100 can produce the repeating dibits 11 00 or 10 01. (If the grouping starts with any other bit, the result is equivalent to condition A or B, since the sequence repeats indefinitely.) A repeating bit sequence with an odd number of bits is equivalent to a bit sequence which is twice as long and with an even number of bits. For example, the repeating bit sequence 110 is equivalent to the repeating bit sequence 110110. This bit sequence always produces the dibit sequence 11 01 10 (since 10 11 01 is equivalent to 11 01 10 ). Festo Didactic 86311-00 227

The first row of Table 3-6 shows the data bits from the configured Binary Sequence. After 10 bits, the sequence begins to repeat. A and B in the table represent the two conditions (the two ways the data bits can be grouped into dibits). Fill in the two Dibit rows of this table, grouping the data bits into dibits, starting with 00 for condition A and 01 for condition B. Table 3-6. Serial to Parallel Converter input and outputs. Condition A Condition B Data Bits 0 0 1 1 1 1 0 0 0 1 0 Dibit Value Dibit Value A dibit is a two-digit binary number. According to the normal writing convention, the first (leftmost) bit is the most significant bit (MSB) and the second is the least significant bit (LSB). In Table 3-6, represent each of the dibits as a decimal value equal to 2 MSB + LSB. This will help you to see the order of the dibits. 8. Use the oscilloscope to observe the following signals: Channel Connect to Signal Memory Ch 1 Transmitter TP6 Serial to Parallel Converter I-output Memory Ch 2 Transmitter TP7 Serial to Parallel Converter Q-output Ch 1 Transmitter TP4 Serial to Parallel Converter input Ch 2 Transmitter TP5 Symbol Clock EXT TRIG BSG1 Sync. Sequence generator sync. signal a The upper output (TP6) of the Serial to Parallel Converter is referred to as the I-output and the lower output (TP7) as the Q-output. Figure 3-57 shows an example of what you should observe (the colors have been altered so as to have a white background). The memory traces have been positioned toward the bottom of the graticule. 228 Festo Didactic 86311-00

Data bits (TP4) Symbol Clock (TP5) Dibits: SB (I-TP6) SB (Q-TP7) Value Figure 3-57. Serial to Parallel Converter signals. The upper trace in Figure 3-57 shows data bits at the input of the Serial to Parallel Converter; is the bit interval. The second trace shows the symbol clock; is the symbol interval. The third and fourth trace show the I- and Q-outputs of the Serial to Parallel Converter. Together, these two signals represent the dibits, or symbols. Figure 3-57 shows one of the conditions (A or B) shown in Table 3-6. The Serial to Parallel Converter signals In the Earth Station Transmitter, data bits are clocked into the Serial to Parallel Converter one at a time by the symbol clock. The first bit of a dibit is clocked in as the symbol clock goes high; the second bit is clocked in as the symbol clock goes low. The Serial to Parallel Converter outputs the dibit at the next falling edge of the symbol clock. Therefore, a new dibit is generated at each falling edge of the symbol clock. Each dibit generated by the Serial to Parallel Converter is represented electrically by two pulse signals which are accessible at TP6 (I-channel) and TP7 (Q-channel). Each of these signals has two states: high (roughly 3 V) representing 1 and low (roughly 0 V) representing 0. When the system was designed, one of these signals was arbitrarily chosen to represents the MSB of each dibit and the other to represent the LSB. Group the data bits in this figure into dibits referring to the symbol clock. Then compare these grouped data bits with the generated dibits. Determine which channel I (TP6) or Q (TP7) represents the MSB of each dibit and which represents the LSB, according to the usual writing convention. Identify the LSB and the MSB trace in the figure. Then, under several dibits, write the decimal values of the dibits. b You may find it helpful to draw directly on Figure 3-57, drawing arrows between 5 consecutive pairs of data bits and the 5 corresponding dibits. Festo Didactic 86311-00 229

Does the sequence of dibits shown in Figure 3-57 represent Condition A or B in Table 3-6? Give the bit interval, the bit rate, the symbol interval and the symbol rate. Explain the difference between the bit rate and the symbol rate. 9. Connect the probes to TP6 and TP7 of the transmitter. Restart the binary sequence generator several times while comparing the current dibits (TP6 and TP7) with those stored in memory. b If you are using the Telemetry and Instrumentation Add-On, use the Restart BSGs button on the Instrumentation tab. Does the Serial to Parallel Converter always produce the same series of dibits? Explain. Since the data consists of a repeating series of data bits, the Serial to Parallel Converter generates a repeating series of symbols. This series can contain a maximum of four different symbols: 00, 01, 10, and 11. How many different symbols are generated with Condition A? How many different symbols are generated with Condition B? What are the different symbols generated in each condition? 10. Use the oscilloscope to observe the following signals: Channel Connect to Signal Memory Ch 1 Transmitter TP5 Symbol Clock Ch 2 BSG1 Sync. Sequence generator sync. signal Ch 1 Transmitter TP4 Serial to Parallel Converter input Figure 3-58 shows the two conditions you may observe. b To show a different condition, connect TP5 to Channel 1 of the oscilloscope and restart the binary sequence generator several times until the condition changes, then memorize the TP5 signal and display the TP4 signal in Channel 1. 230 Festo Didactic 86311-00

Symbol Clock BSG Sync. signal Data bits 0 0 11 11 0 0 01 Dibits 0 1 11 10 0 0 10 (a) Condition (b) Condition Figure 3-58. BSG sync. signal, symbol clock, data bits, and dibits. Figure 3-58 shows the timing of the various signals involved and the dibits that are generated. The BSG Sync. signal contains a pulse approximately aligned with the first bit in the data sequence. The Serial to Parallel Converter receives the first data bit when the symbol clock goes high and the second when it goes low, and generates the dibit at the next falling edge of the symbol clock. Each half cycle of the symbol clock corresponds to one channel bit interval (0.05 s). Although the binary sequence generator receives its clock signal from the Earth Station Transmitter, there is no synchronization between the beginning of a repeating data sequence and the state of the symbol clock. The symbol clock can be either low or high as the data sequence begins. This is why the same repeating sequence can generate two different repeating series of symbols. With the present settings, these two different series of symbols are referred o as conditions A and B. Identify the two conditions in Figure 3-58. Festo Didactic 86311-00 231

Differential encoding In this section, you will simply observe the Differential Encoder input and output signals. Differential encoding is covered in detail in Exercise 3-3. 11. Connect the probes to TP6 and TP7. Obtain the same condition (A or B) shown in Figure 3-57 (if necessary, restart the binary sequence generator several times to obtain this condition). Then observe the following signals on the oscilloscope: Channel Connect to Signal Memory Ch 1 Transmitter TP6 Differential Encoder I-input Memory Ch 2 Transmitter TP7 Differential Encoder Q-input Ch 1 Transmitter TP8 Differential Encoder I-output Ch 2 Transmitter TP9 Differential Encoder Q-output EXT TRIG BSG1 Sync. Sequence generator sync. signal Figure 3-59 shows an example. Input TP6 TP7 Output TP8 TP9 Figure 3-59. Differential Encoder signals. Does the Differential encoder alter the symbols it receives from the Serial to Parallel Converter? 232 Festo Didactic 86311-00

Level converters and low-pass filters 12. Compare the signals at the input and the output of one of the Level Converters. Figure 3-60 shows an example of the signals at the input and output of the Q-channel Level Converter. a For technical reasons, the Level Converters invert the applied input. The signals are again inverted by the low-pass filters. TP9 Q OUTPUT Figure 3-60. Q-channel level converter input and output signals. According to theory, why is it necessary to convert the I- and Q-channel digital signals from the Differential Encoder into bipolar pulse signals? 13. Observe the signals at the output of the Low-Pass Filters. Figure 3-61 shows the relationship between the output signals of the Serial to Parallel Converter, the Level Converters, and the low-pass filters. a For technical reasons, the low-pass filters add a dc offset to the signals. This is necessary because of the characteristics of the mixers used in the I/Q Modulator. As already mentioned, the low-pass filters invert the signals already inverted by the Level Converters. Festo Didactic 86311-00 233

Level Converter inputs Level Converter outputs Low-Pass Filter outputs Figure 3-61. DQPSK Modulator signals. What is the purpose of the low-pass filters? Identifying the QPSK constellation points In this section, you will observe the QPSK signal constellation at the output of the Serial to Parallel Converter and determine which dibit corresponds to each constellation point. 14. Connect the oscilloscope probes as follows: Channel Connect to Signal Ch 1 (X) Transmitter TP6 Serial to Parallel Converter I-output Ch 2 (Y) Transmitter TP7 Serial to Parallel Converter Q-output EXT TRIG BSG1 Sync. Sequence generator sync. signal Turn the Scrambler on. On the oscilloscope, set the Trigger Source to EXT. Adjust the Channel 1 (X) and Channel 2 (Y) scale to 100 mv/div. Set the Display Format to X-Y. Adjust the trace position controls in order to approximately center the pattern displayed on the oscilloscope, as shown in Figure 3-62. a a In the Telemetry and Instrumentation application, using a more sensitive scale setting under the present conditions will result in an over scale condition. On some oscilloscopes, the EXT TRIG input is disabled when using the X-Y display format. In this case, the EXT TRIG connection is unnecessary. 234 Festo Didactic 86311-00

b If you have a second oscilloscope, use one to display the signals in the normal format and the other to display them in the X-Y format. Oscilloscope Settings: Channel 1 (X) Scale... 100 mv/div Channel 2 (Y) Scale... 100 mv/div Format... X - Y Mode... Normal Sampling Window... 10 s Trigger Source... EXT Trigger Level... 2 V Trigger Slope... Rising Figure 3-62. Positioning the X-Y trace on the oscilloscope. Turn the Scrambler and the Clock & Frame Encoder off. Once again, configure binary sequence generator BSG1 to produce the sequence 00 1111 0001 at a bit rate of 20 Mbit/s. Set the Display Mode of the oscilloscope to Dots. The oscilloscope now displays the QPSK signal constellation as shown in either Figure 3-63a or b. This figure shows the observed constellations as well as a representation of the ideal constellations. b b If you are using the Telemetry and Instrumentation Add-On, set the Sampling window to 100 s. If you are using a conventional oscilloscope, you may find that adjusting the contrast improves the appearance of the constellation. The oscilloscope displays the constellation points one after the other. On some oscilloscopes, if you freeze the display (using Single Refresh or Stop, depending on the model), or if you capture the screen, you will likely see only the constellation point displayed at that instant. If necessary, turn persistence on to simultaneously display all of the constellation points that are currently being visited. Festo Didactic 86311-00 235

(a) Condition (b) Condition Figure 3-63. Observed (above) and ideal (below) QPSK constellations for conditions A and B. When displaying a constellation using the X-Y display format, the oscilloscope continually samples the X- and Y-channel signals. It displays one point for each sample taken. Each of these points represents a signal state that is visited. The position of the point depends on the instantaneous values of the two signals. If the signals used to display the constellation are almost perfectly rectangular pulses of uniform amplitude (see Figure 3-64a), only one point appears in each quadrant that is visited. On the other hand, when the pulses have imperfections such as tilt, overshoot, ringing, and noise (see Figure 3-64b), successive samples taken by the oscilloscope have slightly different values. As a result the points in the constellation, as displayed on an oscilloscope, are constantly being displaced. Instead of one point in each of the quadrants that is visited, multiple points may be displayed. Since only four significant signal states are possible for a QPSK signal, however, it is only important to note which quadrants are visited. (a) Nearly ideal pulses (b) Non-ideal pulses Figure 3-64. Pulses. 236 Festo Didactic 86311-00

Restart the binary sequence generator several times until you have observed both conditions shown in Figure 3-63. Refer to Table 3-6 and identify the two conditions (A and B) shown in Figure 3-63. 15. Set the Binary Sequence to 00. This results in a repeating series of 00 dibits at the output of the Serial to Parallel Converter. Observe the resulting constellation point. Then set the Binary Sequence to 11. Write in the boxes in Figure 3-65 the dibits that corresponds to the two constellation points you observed. a The mapping of dibits to constellation points depends on the system design and how the signals are displayed on the oscilloscope. A number of different mappings are possible. The current connections and configuration correspond to one of the possible mappings. Figure 3-65. Dibits in the QPSK constellation. Set the Binary Sequence to 01 or 10. This produces a data stream consisting of alternating 1s and 0s. Interrupt and restart the binary sequence generator several times and note that the oscilloscope does not always display the same constellation point. Because the Serial to Parallel Converter divides the input data into dibits starting at an arbitrary point, a sequence of alternating 1s and 0s at the input can produce two different dibit sequences at the output: 1) 10 10 10 or 2) 01 01 01 Note which constellation point is currently displayed. Set the oscilloscope to the Normal Display Mode and Normal Display Format (not X-Y). Note which output of the Serial to Parallel Converter is high (1) and which is low (0). Refer to your answer to Step 8 to determine which output channel represents the MSB and which represents the LSB of each dibit. This will allow you to identify the repeating dibit at the output of the Serial to Parallel Converter. In Figure 3-65, identify the displayed dibit as well as the last remaining dibit. Festo Didactic 86311-00 237

16. Adjust the binary sequence generator to produce a 3-bit pseudo-random sequence at 2 Mbit/s. In the Telemetry and Instrumentation application, make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Generation Mode... Pseudo-Random n... 2 Bit Rate... 20 000 000 Display the constellation on the oscilloscope. How many constellation points are present? Explain. Generate a pseudo-random sequence of 7 bits (a pseudo-random sequence with n = 3). How many constellation points are present? Digital demodulation 17. Once again, configure binary sequence generator BSG1 to produce the sequence 00 1111 0001 at a bit rate of 20 Mbit/s. On the Earth Station Receiver, lock the Costas loop, as shown in the procedure of Exercise 1-1. Then make the following adjustments: On the Earth Station Transmitter: Data Source... Sampler Scrambler... Off Clock & Frame encoder... Off On the Earth Station Receiver: Descrambler... Off Use the oscilloscope to observe the following signals: Channel Connect to Signal Memory Ch 1 Receiver I OUTPUT Costas loop I-output Memory Ch 2 Receiver Q OUTPUT Costas loop Q-output Ch 1 Receiver TP2 I Level Converter output Ch 2 Receiver TP3 Q Level Converter output 238 Festo Didactic 86311-00

I OUTPUT Q OUTPUT TP2 TP3 Figure 3-66. Costas loop and Level Converter output signals. Figure 3-66 shows an example. Describe the operation of the Level Converters. 18. Use the oscilloscope to observe the following signals: Channel Connect to Signal Memory Ch 1 Receiver TP2 I Level Converter output Memory Ch 2 Receiver TP3 Q Level Converter output Ch 1 Receiver TP4 I DATA Ch 2 Receiver TP5 Q DATA Figure 3-67 show an example. Does the Sampler/Differential Decoder alter the symbols it receives? Festo Didactic 86311-00 239

TP2 TP3 TP4 TP5 Figure 3-67. Sampler/Differential Encoder signals. 19. Store the decoded symbols at the receiver in the oscilloscope memory. Then compare the decoded symbols at the receiver with the unencoded symbols at the transmitter, ignoring the delay. Are they identical? 20. Configure the binary sequence generator to produce a 32-bit sequence with several 1s at the beginning, followed by 0s, at a bit rate of 20 Mbit/s. For example, in the Telemetry and Instrumentation application, make the following settings: Generator Settings Binary Sequence Generator (BSG) 1 Generation Mode... User Entry Binary Sequence... 1010 1110 0100 0000 0000 0000 0000 0000 Bit Rate... 20 000 000 Use the oscilloscope to observe the following signals: Channel Connect to Signal Ch 1 Transmitter DATA INPUT 5 Transmitted Data Memory Ch 1 Transmitter TP4 Serial to Parallel Converter input Memory Ch 2 Receiver TP6 Parallel to Serial Converter output Ch 2 Receiver DATA OUTPUT 5 Received Data 240 Festo Didactic 86311-00

Figure 3-68 shows an example. DATA INPUT 5 TP4 TP6 DATA OUTPUT 5 Figure 3-68. Transmitted and received data. Is the transmitted data correctly recovered by the receiver? Festo Didactic 86311-00 241

Signal spectrum and bandwidth In this section, you will observe the spectrum of the modulated DQPSK signal and compare it with the spectrum of the baseband modulating signal. You will determine the bandwidth of these signals. 21. Configure a binary sequence generator to produce a long pseudo-random sequence at 20 Mbit/s. Observe the baseband binary sequence on the oscilloscope and then on the spectrum analyzer. Using the Telemetry and Instrumentation Add-On For example, in the Telemetry and Instrumentation application, make the following settings: Digital Output Settings Digital Output 1 Source... BSG1 Signal... Data Digital Output 3 Source... BSG1 Signal... Sync. Generator Settings Binary Sequence Generator (BSG) 1 Generation Mode... Pseudo-Random n... 16 Bit Rate... 20 000 000 The present connections will display the binary sequence on the oscilloscope. Use the following connections to observe the spectrum of the baseband binary sequence: BIT CLOCK OUTPUT Digital Modulator Earth Station Transmitter I Q I Q BIT CLOCK Spectrum Analyzer Interface Binary Sequence Generator (BSG) DATA Probe Buffer Frequency Converter CH1 or 2 IN Virtual Instrument Data Generation/Acquisition Interface 242 Festo Didactic 86311-00

Oscilloscope Settings: Channel 1 Scale... 5 V/div Time Base... 0.5 s/div Trigger Source... EXT Trigger Level... 2.0 V Trigger Slope... Falling triggered on BSG1 Sync. signal Figure 3-69 and Figure 3-70 show examples of the time and frequency domain representations of a baseband pseudo-random binary sequence. Spectrum Analyzer Settings: Maximum Input... -10 dbm Scale... 10 db/div Averaging... 4 Time Window... Rectangular Frequency Range... DC 360 MHz? Frequency Span... 5 MHz/div Center Frequency... 25 000 000 Hz Figure 3-69. PRBS on the oscilloscope (, ). a Figure 3-70. PRBS spectrum (, ). In the PRBS spectrum, the peaks at multiples of the bit rate are due to imperfections in the waveform of the data signal and should be ignored. Describe the spectrum of a random data signal. Festo Didactic 86311-00 243

What is the main-lobe bandwidth of a baseband random data signal? Spectrum Analyzer Settings: Maximum Input... -10 dbm Scale... 10 db/div Averaging... 4 Time Window... Rectangular Frequency Range... DC 360 MHz? Frequency Span... 5 MHz/div Center Frequency... 25 000 000 Hz 22. Connect the output of the binary sequence generator to DATA INPUT 5 of the Earth Station Transmitter. On the Earth Station Transmitter, make the following adjustments: Data Source... Sampler Scrambler... Off Clock & Frame Encoder... Off Observe the spectrum at the I OUTPUT of the DQPSK Modulator. Figure 3-71 shows an example. Figure 3-71. I OUTPUT spectrum. Compare this spectrum with that of the baseband PRBS and explain the differences. 244 Festo Didactic 86311-00

Spectrum Analyzer Settings: Maximum Input... -10 dbm Scale... 10 db/div Averaging... 4 Time Window... Rectangular Frequency Range... DC 360 MHz Frequency Span... 5 MHz/div Center Frequency... 335 000 000 Hz External attenuator... 20 db 23. Reconnect the I OUTPUT to the I INPUT. Then observe the spectrum of the IF 1 OUTPUT signal from the DQPSK Modulator. Figure 3-72 shows an example. Figure 3-72. IF 1 OUTPUT spectrum. Compare this spectrum with that of the baseband PRBS and explain the differences (general shape, bandwidth, center frequency). The cut-off frequency of the I- and Q-channel low-pass filters is 10 MHz. explain why this is an appropriate cut-off frequency for these filters. 24. Configure the binary sequence generator to transmit only 0s (alternatively, disconnect the BNC cable at DATA INPUT 5 of the Earth Station Transmitter). Use the oscilloscope to observe the signals at the inputs to the I/Q Modulator (TP10 and TP11). Are these signals changing or are they each at a constant level? Festo Didactic 86311-00 245

Explain what has happened to the spectrum. 25. Reconfigure the binary sequence generator to transmit a long pseudorandom sequence (alternatively, reconnect the BNC cable at DATA INPUT 5 of the Earth Station Transmitter). Then disconnect the BNC cables at the I INPUT and Q INPUT of the DQPSK Modulator. Explain what happens to the spectrum. 26. Reconnect the BNC cables at the I INPUT and Q INPUT of the DQPSK Modulator. Observe the spectrum at the RF OUTPUT. Compare this spectrum with that of the IF 1 OUTPUT signal. Spectrum Analyzer Settings: Maximum Input... -31 dbm Scale... 5 db/div Averaging... 8 Time Window... Rectangular Frequency Range... 10.5 11.26 GHz Frequency Span... 5 MHz/div Center Frequency.. 11 000 000 000 Hz External attenuator... 20 db Figure 3-73. RF OUTPUT spectrum. 246 Festo Didactic 86311-00

Ex. 3-2 Digital Modulation Conclusion 27. When you have finished using the system, exit any software being used and turn off the equipment. CONCLUSION In this exercise, you observed how digital QPSK modulation and demodulation works. You saw that the incoming data bits are converted into dibits by the Serial to Parallel Converter, which acts as a symbol generator, and that the dibits are level converted and filtered before being multiplied with two carrier signals in phase quadrature. You observed the QPSK constellation and identified the constellation points. You also observed the spectrum and bandwidth of the filtered QPSK signal. REVIEW QUESTIONS 1. What is the purpose of the symbol generator in a QPSK modulator? 2. Why are the baseband I- and Q-channel signals in the modulator often lowpass filtered before I/Q modulation? 3. The QPSK modulator generates the QPSK signal by generating two independently modulated BPSK signals and combining them. What property allows these two BPSK signals to be demodulated separately in the QPSK demodulator? 4. Explain how two mixers and two carriers in phase quadrature are used to demodulate a QPSK signal. Festo Didactic 86311-00 247

Ex. 3-2 Digital Modulation Review Questions 5. Why is it necessary to regenerate a carrier in the QPSK demodulator? 248 Festo Didactic 86311-00