AOTF49 PChannel Enhancement Mode Field Effect Transistor General Description The AOTF49/L uses advanced trench technology to provide excellent R DS(ON), low gate charge and low gate resistance. With the excellent thermal resistance of the TOFL package, this device is well suited for high current load applications.aotf49 and AOTF49L are electrically identical. Features V DS (V) =6V I D = 4A R DS(ON) < 4mΩ R DS(ON) < 4mΩ (V GS = V) (V GS = V) (V GS = 4.V) RoHS Compliant % UIS Tested! AOTF49L Halogen Free TOFL D G D S G S Absolute Maximum Ratings T A = C unless otherwise noted Parameter DrainSource Voltage GateSource Voltage Symbol V DS V GS Maximum 6 ± Units V V Continuous Drain T C = C 4 Current G I D T C = C 7 A Pulsed Drain Current C I DM 6 Continuous Drain T A = C.4 I DSM Current T A =7 C 4.3 A Avalanche Current C Repetitive avalanche energy L=.mH C I AR E AR 37 68 A mj T C = C 43 Power Dissipation B P D T C = C W T A = C.6 Power Dissipation A P DSM T A =7 C.38 W Junction and Storage Temperature Range T J, T STG to 7 C Thermal Characteristics Parameter Symbol Typ Max Units Maximum JunctiontoAmbient A t s C/W R θja Maximum JunctiontoAmbient A D SteadyState 48. 8 C/W Maximum JunctiontoCase SteadyState R θjc.9 3. C/W
AOTF49 Electrical Characteristics (T J = C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS DrainSource Breakdown Voltage I D =µa, V GS =V 6 V I DSS Zero Gate Voltage Drain Current V DS =6V, V GS =V T J = C µa I GSS GateBody leakage current V DS =V, V GS =±V ± na V GS(th) Gate Threshold Voltage V DS =V GS I D =µa...4 V I D(ON) On state drain current V GS =V, V DS =V 6 A R DS(ON) Static DrainSource OnResistance V GS =V, I D =A V GS =4.V, I D =A 33 4 mω T J = C.4 63 43 4 mω g FS Forward Transconductance V DS =V, I D =A 33 S V SD Diode Forward Voltage I S =A,V GS =V.73 V I S Maximum BodyDiode Continuous Current 3 A DYNAMIC PARAMETERS C iss Input Capacitance 969 46 93 pf C oss Output Capacitance V GS =V, V DS =3V, f=mhz 78 3 pf C rss Reverse Transfer Capacitance 7 68 pf R g Gate resistance V GS =V, V DS =V, f=mhz 4. Ω SWITCHING PARAMETERS Q g (V) Total Gate Charge (V) 34 43 nc Q g (4.V) Total Gate Charge (4.V) 6 9.7 4 nc V GS =V, V DS =3V, I D =A Q gs Gate Source Charge 8. nc Q gd Gate Drain Charge 8.9. nc t D(on) TurnOn DelayTime ns t r TurnOn Rise Time V GS =V, V DS =3V, R L =.Ω, 4. ns t D(off) TurnOff DelayTime R GEN =3Ω 38 ns t f TurnOff Fall Time ns t rr Body Diode Reverse Recovery Time I F =A, di/dt=a/µs 8.68 33 ns Q rr Body Diode Reverse Recovery Charge I F =A, di/dt=a/µs 7 67. 7 nc A: The value of R θja is measured with the device mounted on in FR4 board with oz. Copper, in a still air environment with T A = C. The Power dissipation P DSM is based on R θja and the maximum allowed junction temperature of C. The value in any given application depends on the user's specific board design, and the maximum temperature of 7 C may be used if the PCB allows it. B. The power dissipation P D is based on T J(MAX) =7 C, using junctiontocase thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature T J(MAX) =7 C. Ratings are based on low frequency and duty cycles to keep initial T J = C. D. The R θja is the sum of the thermal impedence from junction to case R θjc and case to ambient. E. The static characteristics in Figures to 6 are obtained using <3 µs pulses, duty cycle.% max. F. These curves are based on the junctiontocase thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX) =7 C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by bondwires. H. These tests are performed with the device mounted on in FR4 board with oz. Copper, in a still air environment with T A = C. Rev : Aug8 COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
AOTF49 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 6 V 6V V 3 V DS =V 4 4.V 4V I D (A) 3 I D (A) V GS =3.V V GS =3V 3 4 V DS (Volts) Fig : OnRegion Characteristics (Note E) C C 3 4 V GS (Volts) Figure : Transfer Characteristics (Note E) R DS(ON) (mω) 4 4 3 3 V GS =4.V V GS =V Normalized OnResistance.8.6.4. V GS =V I D =A 7 V GS =4.V I D =A I D (A) Figure 3: OnResistance vs. Drain Current and Gate Voltage (Note E).8 7 7 Temperature ( C) Figure 4: OnResistance vs. Junction Temperature 8 (Note E) R DS(ON) (mω) 9 8 7 6 4 3 C C I D =A 4 6 8 V GS (Volts) Figure : OnResistance vs. GateSource Voltage (Note E) I S (A).E.E 4.E.E.E3.E4 C C.E...4.6.8.. V SD (Volts) Figure 6: BodyDiode Characteristics (Note E)
AOTF49 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 3 V GS (Volts) 8 6 4 V DS =3V I D =A Capacitance (pf) 3 C oss C iss 3 4 Q g (nc) Figure 7: GateCharge Characteristics C rss 3 4 6 V DS (Volts) Figure 8: Capacitance Characteristics. µs I D (Amps)... R DS(ON) limited T J(Max) =7 C T C = C DC µs µs ms ms Power (W) 6 8 4 T J(Max) =7 C T C = C 7... V DS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) E4... Pulse Width (s) Figure : Single Pulse Power Rating Junctionto 8 Case (Note F) Z θjc Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T C P DM.Z θjc.r θjc R θjc =3. C/W In descending order D=.,.3,.,.,.,., single pulse. T on T Single Pulse....... Pulse Width (s) Figure : Normalized Maximum Transient Thermal Impedance (Note F) 4 P D
AOTF49 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS I AR (A) Peak Avalanche Current 8 6 4 T A = C T A = C T A = C T A = C.... Time in avalanche, t A (s) Figure : Single Pulse Avalanche capability (Note C) Power Dissipation (W) 4 3 7 7 T CASE ( C) Figure 3: Power Derating (Note F) 3 Current rating ID(A) Power (W) T A = C 7 7 7 T CASE ( C) Figure 4: Current Derating (Note F).. Pulse Width (s) 8 Figure : Single Pulse Power Rating Junctionto Ambient (Note H) Z θja Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T A P DM.Z θja.r θja R θja =8 C/W Single Pulse In descending order D=.,.3,.,.,.,., single pulse T..... Pulse Width (s) Figure 6: Normalized Maximum Transient Thermal Impedance (Note H) 4 P D T on
AOTF49 Gate Charge Test Circuit & Waveform Qg V Qgs Qgd Ig Charge RL Resistive Switching Test Circuit & Waveforms ton toff td(on) t r td(off) t f Rg 9% % Id L Unclamped Inductive Switching (UIS) Test Circuit & Waveforms E = / LI AR AR Rg Id BV DSS I AR Diode Recovery Test Circuit & Waveforms Q = Idt rr Ig Isd L Isd I F di/dt I RM t rr