PD-9778A IRHLG77 RADIATION HARDENED LOGIC LEVEL POWER MOSFET THRU-HOLE (MO-36AB) V, N-CHANNEL TECHNOLOGY Product Summary Part Number Radiation Level RDS(on) I D IRHLG77 krads(si).285.8a IRHLG73 3 krads(si).285.8a Description IR HiRel R7 Logic Level Power MOSFETs provide simple solution to interfacing CMOS and TTL control circuits to power devices in space and other radiation environments. The threshold voltage remains within acceptable operating limits over the full operating temperature and post radiation. This is achieved while maintaining single event gate rupture and single event burnout immunity. The device is ideal when used to interface directly with most logic gates, linear IC s, micro-controllers, and other device types that operate from a 3.3-5V source. It may also be used to increase the output current of a PWM, voltage comparator or an operational amplifier where the logic level drive signal is available. MO-36AB Features 5V CMOS and TTL Compatible Fast Switching Single Event Effect (SEE) Hardened Low Total Gate Charge Simple Drive Requirements Ease of Paralleling Hermetically Sealed Light Weight ESD Rating: Class A per MIL-STD-75, Method 2 Absolute Maximum Ratings (Per Die) Parameter Units I D @ V GS = 4.5V, T C = 25 C Continuous Drain Current.8 I D @ V GS = 4.5V, T C = C Continuous Drain Current. A I DM Pulsed Drain Current 7.2 P D @T C = 25 C Maximum Power Dissipation.4 W Linear Derating Factor. W/ C V GS Gate-to-Source Voltage ± V E AS Single Pulse Avalanche Energy 97 mj I AR Avalanche Current.8 A E AR Repetitive Avalanche Energy 4 mj dv/dt Peak Diode Recovery dv/dt V/ns T J Operating Junction and -55 to + 5 T STG For Footnotes, refer to the page 2. Storage Temperature Range C Lead Temperature 3 (.63 in. /.6 mm from case for s) Weight.3 (Typical) g 26-5-23
IRHLG77 Electrical Characteristics For Each N-Channel Device @ Tj = 25 C(Unless Otherwise Specified) Parameter Min. Typ. Max. Units Test Conditions BV DSS Drain-to-Source Breakdown Voltage V V GS = V, I D = 25µA BV DSS / T J Breakdown Voltage Temp. Coefficient V/ C Reference to 25 C, I D =.ma R DS(on) Static Drain-to-Source On-Resistance.285 V GS = 4.5V, I D =.A V GS(th) Gate Threshold Voltage. 2. V V GS(th) / T J Gate Threshold Voltage Coefficient -4.4 mv/ C V DS = V GS, I D = 25µA Gfs Forward Transconductance 5. S V DS = 5V, I D =.A I DSS. V DS = 8V, V GS = V Zero Gate Voltage Drain Current µa V DS = 8V,V GS = V,T J =25 C I GSS Gate-to-Source Leakage Forward V GS = V na Gate-to-Source Leakage Reverse - V GS = -V Q G Total Gate Charge I D =.8A Q GS Gate-to-Source Charge 4. nc V DS = 5V Q GD Gate-to-Drain ( Miller ) Charge 6. V GS = 4.5V t d(on) Turn-On Delay Time 2 V DD = 5V tr Rise Time 35 I D =.8A ns t d(off) Turn-Off Delay Time 65 R G = 7.5 t f Fall Time 2 V GS = 5.V Ls +L D Total Inductance nh Measured from Drain lead (6mm /.25 in from package) to Source lead (6mm/.25 in from package) with Source wire internally bonded from Source pin to Drain pin C iss Input Capacitance 653 V GS = V C oss Output Capacitance 9 pf V DS = 25V C rss Reverse Transfer Capacitance 2.7 ƒ =.MHz R G Gate Resistance ƒ =.MHz, open drain Source-Drain Diode Ratings and Characteristics (Per Die) Parameter Min. Typ. Max. Units Test Conditions I S Continuous Source Current (Body Diode).8 I SM Pulsed Source Current (Body Diode) 7.2 A V SD Diode Forward Voltage.2 V T J = 25 C,I S =.8A, V GS = V t rr Reverse Recovery Time ns T J = 25 C, I F =.8A, V DD 25V Q rr Reverse Recovery Charge 223 nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Thermal Resistance (Per Die) Parameter Min. Typ. Max. Units R JA Junction-to-Case (Typical socket mount) 9 C/W Footnotes: Repetitive Rating; Pulse width limited by maximum junction temperature. V DD = 5V, starting T J = 25 C, L = 6mH, Peak I L =.8A, V GS = V I SD.8A, di/dt 497A/µs, V DD V, T J 5 C Pulse width 3 µs; Duty Cycle 2% Total Dose Irradiation with V GS Bias. volt V GS applied and V DS = during irradiation per MIL-STD-75, Method 9, condition A. Total Dose Irradiation with V DS Bias. 8 volt V DS applied and V GS = during irradiation per MlL-STD-75, Method 9, condition A. 2 26-5-23
IRHLG77 IR HiRel Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at IR HiRel is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics @ Tj = 25 C, Post Total Dose Irradiation (Per Die) Up to 3 krads (Si) Parameter Min. Max. Units Test Conditions BV DSS Drain-to-Source Breakdown Voltage V V GS = V, I D = 25µA V GS(th) Gate Threshold Voltage. 2. V V DS = V GS, I D = 25µA I GSS Gate-to-Source Leakage Forward na V GS = V I GSS Gate-to-Source Leakage Reverse - na V GS = -V I DSS Zero Gate Voltage Drain Current. µa V DS = 8V, V GS = V R DS(on) Static Drain-to-Source On-State Resistance (TO-3).24 V GS = 4.5V, I D =.A R DS(on) Static Drain-to-Source On-State Resistance (MO-36AB).285 V GS = 4.5V, I D =.A V SD Diode Forward Voltage.2 V V GS = V, I D =.8A. Part numbers IRHLG77 and IRHLG73 IR HiRel radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area VDS (V) LET (MeV/(mg/cm 2 )) Energy (MeV) Range (µm) V -2V -4V -5V -6V -7V 38 ± 5% 3 ± 7.5% 38 ± 7.5% 62 ± 5% 355 ± 7.5% 33 ± 7.5% 85 ± 5% 38 ± 7.5% 29 ± 7.5% VDS 2 8 6 4 2 LET=38 ± 5% LET=62 ± 5% LET=85 ± 5% - -2-3 -4-5 -6-7 VGS For Footnotes, refer to the page 2. Fig a. Typical Single Event Effect, Safe Operating Area 3 26-5-23
R DS(on), Drain-to -Source On Resistance ) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRHLG77 VGS TOP V 5.V 4.5V 3.V 2.75V 2.5V 2.25V BOTTOM 2.V 2.V VGS TOP V 5.V 4.5V 3.V 2.75V 2.5V 2.25V BOTTOM 2.V 2.V 6 s PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 6 s PULSE WIDTH Tj = 5 C V DS, Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics T J = 5 C 2.5 I D =.8A 2. T J = 25 C.5. V DS = 5V 6 s PULSE WIDTH 2 2.2 2.4 2.6 2.8 3 V GS, Gate-to-Source Voltage (V).5 V GS = 4.5V. -6-4 -2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature.5 R DS (on), Drain-to -Source On Resistance ( ).4.45.4.35.3 I D =.8A T J = 5 C.35.3.25 T J = 5 C.25.2 5 T J = 25 C 2 3 4 5 6 7 8 9 V GS, Gate -to -Source Voltage (V).2 T J = 25 C 5 Vgs = 4.5V.5.5 2.5 3.5 4.5 5.5 6.5 7.5 I D, Drain Current (A) Fig 5. Typical On-Resistance Vs Gate Voltage Fig 6. Typical On-Resistance Vs Drain Current 4 26-5-23
I SD, Reverse Drain Current (A) I D, Drain Current (A) C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) V (BR)DSS, Drain-to-Source Breakdown Voltage (V) V GS(th) Gate threshold Voltage (V) IRHLG77 3 I D =.ma 2.5 2. 2.5..5 I D = 5µA I D = 25µA I D =.ma I D = 5mA -6-4 -2 2 4 6 8 2 4 6 6 4 2 T J, Temperature ( C ) Fig 7. Typical Drain-to-Source Breakdown Voltage Vs Temperature V GS = V, f = MHz C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd. -6-4 -2 2 4 6 8 2 4 6 2 8 T J, Temperature ( C ) Fig 8. Typical Threshold Voltage Vs Temperature I D =.8A V DS = 8V V DS = 5V V DS = 2V 8 C iss 6 6 C oss 4 4 2 C rss V DS, Drain-to-Source Voltage (V) 2 FOR TEST CIRCUIT SEE FIGURE 7 4 8 2 6 2 24 Q G, Total Gate Charge (nc) Fig 9. Typical Capacitance Vs. Drain-to-Source Voltage Fig. Typical Gate Charge Vs. Gate-to-Source Voltage 2.5 T J = 5 C T J = 25 C.5 V GS = V..2.4.6.8..2.4.6 25 5 75 25 5 V SD, Source-to-Drain Voltage (V) T C, Case Temperature ( C) Fig. Typical Source-Drain Diode Forward Voltage Fig 2. Maximum Drain Current Vs. Case Temperature 5 26-5-23
I D, Drain-to-Source Current (A) E AS, Single Pulse Avalanche Energy (mj) IRHLG77 24 OPERATION IN THIS AREA LIMITED BY R DS (on) 2 6 I D TOP.8A.A BOTTOM.8A ms 2 ms Tc = 25 C Tj = 5 C Single Pulse DC. V DS, Drain-to-Source Voltage (V) 8 4 25 5 75 25 5 Starting T J, Junction Temperature ( C) Fig 3. Maximum Safe Operating Area Fig 4. Maximum Avalanche Energy Vs. Drain Current Thermal Response ( Z thja ) D =.5.2.5 PDM.2. t SINGLE PULSE t2 ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc. E-5... t, Rectangular Pulse Duration (sec) Fig 5. Maximum Effective Transient Thermal Impedance, Junction-to-Case 6 26-5-23
IRHLG77 5V tp V (BR)DSS V DS L DRIVER R G 2V tp D.U.T I AS. + - V DD A I AS Fig 6a. Unclamped Inductive Test Circuit Fig 6b. Unclamped Inductive Waveforms Fig 7a. Gate Charge Waveform Fig 7b. Gate Charge Test Circuit Fig 8a. Switching Time Test Circuit Fig 8b. Switching Time Waveforms 7 26-5-23
IRHLG77 Case Outline and Dimensions - MO-36AB IR HiRel Headquarters: N. Sepulveda Blvd., El Segundo, California 9245, USA Tel: (3) 252-75 IR HiRel Leominster: 25 Crawford St., Leominster, Massachusetts 453, USA Tel: (978) 534-5776 IR HiRel San Jose: 252 Junction Avenue, San Jose, California 9534, USA Tel: (48) 434-5 Data and specifications subject to change without notice. 8 26-5-23
IRHLG77 IMPORTANT NOTICE The information given in this document shall be in no event regarded as guarantee of conditions or characteristic. The data contained herein is a characterization of the component based on internal standards and is intended to demonstrate and provide guidance for typical part performance. It will require further evaluation, qualification and analysis to determine suitability in the application environment to confirm compliance to your system requirements. With respect to any example hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind including without limitation warranties on non- infringement of intellectual property rights and any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s product and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of any customer s technical departments to evaluate the suitability of the product for the intended applications and the completeness of the product information given in this document with respect to applications. For further information on the product, technology, delivery terms and conditions and prices, please contact your local sales representative or go to (www.infineon.com/hirel). WARNING Due to technical requirements products may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies office. 9 26-5-23