PD - 9729A IRFR8EPbF IRFU8EPbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dv/dt and di/dt Capability G D S V DSS HEXFET Power MOSFET R DS(on) typ. max. I D (Silicon Limited) I D (Package Limited) 6V 7.m: 8.4m: 79A c 56A D-Pak IRFR8EPbF I-Pak IRFU8EPbF G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 79c I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 56c I D @ T C = 25 C Continuous Drain Current, V GS @ V (Wire Bond Limited) 56 A I DM Pulsed Drain Current d 35 P D @T C = 25 C Maximum Power Dissipation W Linear Derating Factor.76 W/ C V GS Gate-to-Source Voltage ± 2 V dv/dt Peak Diode Recovery f 2 V/ns T J Operating Junction and -55 to 75 C T STG Storage Temperature Range Soldering Temperature, for seconds (.6mm from case) 3 Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy e 88 mj I AR Avalanche Current d 47 A E AR Repetitive Avalanche Energy g mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc Junction-to-Case k.32 R θja Junction-to-Ambient (PCB Mount) jk 5 R θja Junction-to-Ambient k Notes through are on page 2 www.irf.com C/W 4/2/9
IRFR/U8EPbF Static @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 6 V V GS = V, I D = 25μA ΔV (BR)DSS /ΔT J Breakdown Voltage Temp. Coefficient.73 V/ C Reference to 25 C, I D = 5mAd R DS(on) Static Drain-to-Source On-Resistance 7. 8.4 mω V GS = V, I D = 47A g V GS(th) Gate Threshold Voltage 2. 4. V V DS = V GS, I D = μa I DSS Drain-to-Source Leakage Current 2 μa V DS = 6V, V GS = V 25 V DS = 48V, V GS = V, I GSS Gate-to-Source Forward Leakage na V GS = 2V Gate-to-Source Reverse Leakage - V GS = -2V Dynamic @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units gfs Forward Transconductance S Q g Total Gate Charge 46 69 nc Q gs Gate-to-Source Charge Q gd Gate-to-Drain ("Miller") Charge 2 Q sync Total Gate Charge Sync. (Q g - Q gd ) 34 R G(int) Internal Gate Resistance.73 Ω t d(on) Turn-On Delay Time 3 ns t r Rise Time 35 t d(off) Turn-Off Delay Time 55 t f Fall Time 46 C iss Input Capacitance 229 C oss Output Capacitance 27 C rss Reverse Transfer Capacitance 3 pf C oss eff. (ER) Effective Output Capacitance (Energy Related)h 39 C oss eff. (TR) Effective Output Capacitance (Time Related)g 63 Diode Characteristics Symbol Parameter Min. Typ. Max. Units I S Continuous Source Current 79c A Conditions V DS = 5V, I D = 47A I D = 47A V DS = 3V V GS = V g I D = 47A, V DS =V, V GS = V V DD = 39V I D = 47A R G = Ω V GS = V g V GS = V V DS = 5V ƒ =.MHz V GS = V, V DS = V to 6V i V GS = V, V DS = V to 6V h Conditions MOSFET symbol (Body Diode) showing the I SM Pulsed Source Current 35 integral reverse G (Body Diode)d p-n junction diode. S V SD Diode Forward Voltage.3 V, I S = 47A, V GS = V g t rr Reverse Recovery Time 26 39 ns V R = 5V, 3 47 I F = 47A Q rr Reverse Recovery Charge 24 36 nc di/dt = A/μs g 35 53 I RRM Reverse Recovery Current.8 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) D Notes: Calculated continuous current based on maximum allowable junction Pulse width 4μs; duty cycle 2%. temperature. Bond wire current limit is 56A. Note that current C oss eff. (TR) is a fixed capacitance that gives the same charging time limitations arising from heating of the device leads may occur with as C oss while V DS is rising from to 8% V DSS. some lead mounting arrangements. C oss eff. (ER) is a fixed capacitance that gives the same energy as Repetitive rating; pulse width limited by max. junction C oss while V DS is rising from to 8% V DSS. temperature. ˆ When mounted on " square PCB (FR-4 or G- Material). For recom ƒ Limited by T Jmax, starting, L =.8mH mended footprint and soldering techniques refer to application note #AN-994. R G = 25Ω, I AS = 47A, V GS =V. Part not recommended for R θ is measured at T J approximately 9 C. use above this value. I SD 47A, di/dt 668A/μs, V DD V (BR)DSS, T J 75 C. 2 www.irf.com
C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFR/U8EPbF VGS TOP 5V V 8.V 6.V 5.5V 5.V 4.8V BOTTOM 4.5V VGS TOP 5V V 8.V 6.V 5.5V 5.V 4.8V BOTTOM 4.5V 4.5V 4.5V 6μs PULSE WIDTH Tj = 25 C. V DS, Drain-to-Source Voltage (V) 6μs PULSE WIDTH Tj = 75 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 2.5 I D = 47A V GS = V T J = 75 C 2..5 V DS = 25V 6μs PULSE WIDTH. 2 3 4 5 6 7 8 9 V GS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics..5-6 -4-2 2 4 6 8 2468 T J, Junction Temperature ( C) Fig 4. Normalized On-Resistance vs. Temperature 4 V GS = V, f = MHZ C iss = C gs C gd, C ds SHORTED 6 I D = 47A 3 C rss = C gd C oss = C ds C gd C iss 2 V DS = 48V V DS = 3V V DS = 2V 2 8 C oss 4 C rss 2 3 4 5 6 V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com 3
Energy (μj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) IRFR/U8EPbF OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C V GS = V...5..5 2. V SD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage msec LIMITED BY PACKAGE μsec msec Tc = 25 C Tj = 75 C Single Pulse DC.. V DS, Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area 8 LIMITED BY PACKAGE 8 Id = 5mA 6 75 4 7 2 65 25 5 75 25 5 75 T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature 6-6 -4-2 2 4 6 8 2468 T J, Temperature ( C ) Fig. Drain-to-Source Breakdown Voltage.8 4.6 35 3 I D TOP 5.3A A BOTTOM 47A 25.4 2 5.2 5. 2 3 4 5 6 25 5 75 25 5 75 V DS, Drain-to-Source Voltage (V) Starting T J, Junction Temperature ( C) Fig. Typical C OSS Stored Energy Fig 2. Maximum Avalanche Energy vs. DrainCurrent 4 www.irf.com
E AR, Avalanche Energy (mj) Avalanche Current (A) Thermal Response ( Z thjc ) IRFR/U8EPbF D =.5...2..5.2. SINGLE PULSE ( THERMAL RESPONSE ). E-6 E-5.... t, Rectangular Pulse Duration (sec) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case τj τj τ τ Ci= τi/ri Ci i/ri R R 2 R 3 R R 2 R 3 τ 2 τ 3 τ 2 τ 3 R4 R4 τ4 τ4 τc τ Ri ( C/W) τι (sec).2674.7.2878.9.66685.843.4628.5884 Duty Cycle = Single Pulse..5. Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 5 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25 C and Tstart = 5 C. 8 6 4 2..E-6.E-5.E-4.E-3.E-2.E- TOP Single Pulse BOTTOM % Duty Cycle I D = 47A 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature tav (sec) Fig 4. Typical Avalanche Current vs.pulsewidth Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 6a, 6b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 4, 5). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see Figures 3) P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc I av = 2DT/ [.3 BV Z th ] E AS (AR) = P D (ave) t av www.irf.com 5
Q RR (A) I RR (A) Q RR (A) V GS (th) Gate threshold Voltage (V) I RR (A) IRFR/U8EPbF 4.5 4. 3.5 I D =.A I D =.ma I D = 25μA I D = μa 4 2 I F = 32A V R = 5V 3. 8 2.5 6 2. 4.5 2. -75-5 -25 25 5 75 25 5 75 T J, Temperature ( C ) 2 4 6 8 di F /dt (A/μs) Fig 6. Threshold Voltage vs. Temperature Fig. 7 - Typical Recovery Current vs. di f /dt 4 2 8 6 I F = 47A V R = 5V 32 28 24 2 6 2 I F = 32A V R = 5V 4 8 2 4 2 4 6 8 2 4 6 8 di F /dt (A/μs) di F /dt (A/μs) Fig. 8 - Typical Recovery Current vs. di f /dt Fig. 9 - Typical Stored Charge vs. di f /dt 32 28 24 2 6 I F = 47A V R = 5V 2 8 4 2 4 6 8 di F /dt (A/μs) Fig. 2 - Typical Stored Charge vs. di f /dt 6 www.irf.com
IRFR/U8EPbF - R G D.U.T * ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD ** - Reverse Recovery Current Re-Applied Voltage Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Forward Drop D = P.W. Period *** V GS =V V DD Ripple 5% I SD * Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel *** V GS = 5V for Logic Level Devices Fig 2. Diode Reverse Recovery Test Circuit for HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 2V V GS tp D.U.T IAS.Ω - V DD A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms R G V GS V DS R D D.U.T. V DS 9% % V V GS Pulse Width µs Duty Factor. % - V DD t d(on) t r t d(off) t f Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Id Vds 2K K DUT L VCC Vgs Vgs(th) Qgodr Qgd Qgs2 Qgs Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform www.irf.com 7
IRFR/U8EPbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR2 WITH ASSEMBLY LOT CODE 234 ASSEMBLED ON WW 6, 2 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "Lead-Free" "P" in assembly line position indicates "Lead-Free" qualification to the consumer-level INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFR2 6A 2 34 PART NUMBER DATE CODE YEAR = 2 WEEK 6 LINE A OR INTERNATIONAL RECTIFIER LOGO AS S E MB L Y LOT CODE IRFR2 2 34 PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) P = DESIGNATES LEAD-FREE PRODUCT QUALIFIED TO T HE CONSUMER LEVEL (OPTIONAL) YEAR = 2 WEEK 6 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ 8 www.irf.com
IRFR/U8EPbF I-Pak (TO-25AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-25AA) Part Marking Information EXAMPLE: THIS IS AN IRFU2 WITH ASSEMBLY LOT CODE 5678 ASSEMBLED ON WW 9, 2 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates Lead-Free" OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFU2 9A 56 78 PART NUMBER DATE CODE YEAR = 2 WEEK 9 LINE A INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFU2 56 78 PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR = 2 WEEK 9 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ www.irf.com 9
IRFR/U8EPbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA-54. 3 INCH NOTES :. OUTLINE CONFORMS TO EIA-48. 6 mm Data and specifications subject to change without notice. This product has been designed for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245, USA Tel: (3) 252-75 TAC Fax: (3) 252-793 Visit us at www.irf.com for sales contact information.4/9 www.irf.com