MCB Hex Level Shifter for TTL to CMOS or CMOS to CMOS The MCB is a hex noninverting level shifter using CMOS technology. The level shifter will shift a TTL signal to CMOS logic levels for any CMOS supply voltage between and volts. A control input also allows interface from CMOS to CMOS at one logic level to another logic level: Either up or down level translating is accomplished by selection of power supply levels DD and CC. The CC level sets the input signal levels while DD selects the output voltage levels. Features UP Translates from a Low to a High oltage or DOWN Translates from a High to a Low oltage Input Threshold Can Be Shifted for TTL Compatibility No Sequencing Required on Power Supplies or Inputs for Power Up or Power Down to 8 dc Operation for DD and CC Diode Protected Inputs to SS Capable of Driving Two LowPower TTL Loads or One LowPower Schottky TTL Load Over the Rated Temperature Range PbFree Packages are Available* MAXIMUM RATINS oltages Referenced to SS ) Symbol Parameter alue Unit CC DC Supply oltage Range. to +8. DD DC Supply oltage Range. to +8. in out I in, I out P D Input oltage Range (DC or Transient) Output oltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note ). to +8.. to DD +. ± ma mw T A Ambient Temperature Range to + C T stg Storage Temperature Range to + C T L Lead Temperature (8Second Soldering) C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Temperature Derating: Plastic P and D/DW Packages:. mw/ C From C To C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, in and out should be constrained to the range SS in or out ) DD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either SS or DD ). Unused outputs must be left open. A WL, L YY, Y WW, W PDIP P SUFFIX CASE 8 SOIC D SUFFIX CASE B TSSOP DT SUFFIX CASE 98F SOEIAJ F SUFFIX CASE 9 MARKIN DIARAMS MCBCP AWLYYWW B AWLYWW B ALYW MCB ALYW = Assembly Location = Wafer Lot = Year = Work Week = PbFree Indicator ORDERIN INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, Publication Order Number: MCB/D
MCB PIN ASSINMENT LOIC DIARAM CC DD A out F out CC DD A in F in B out B in MODE E out INPUT LEEL SHIFTER OUTPUT C out E in C in SS 8 9 D out D in MODE TTL/CMOS MODE SELECT Mode Select Input Logic Levels Output Logic Levels CC ) TTL CMOS SS ) CMOS CMOS / of package shown. ORDERIN INFORMATION Device Package Shipping MCBCP PDIP Units / Rail MCBCP PDIP (PbFree) Units / Rail MCBD SOIC 8 Units / Rail MCBD SOIC (PbFree) 8 Units / Rail MCBDR SOIC Units / Tape & Reel MCBDR SOIC (PbFree) Units / Tape & Reel MCBDT TSSOP* 9 Units / Rail MCBDTR TSSOP* Units / Tape & Reel MCBF SOEIAJ Units / Rail MCBFEL SOEIAJ Units / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. *This package is inherently PbFree.
MCB ELECTRICAL CHARACTERISTICS oltages Referenced to SS ) Characteristic Î Symbol CC dc C C Î C DD dc Min Max Min Î Typ Max Min Max Unit (Note ) Output oltage Level in = Î OL... dc. Î.. Î. Î.. Level in = CC Î OH..9.9Î..9 dc 9.9 9.9 9.9 Î.9.9Î.9 Input oltage Level Î IL dc OL =. dc) TTLCMOS..8..8.8 OL =. dc) TTLCMOS..8..8.8 OL =. dc) CMOSCMOS.. Î... OL =. dc) CMOSCMOS..... OL =. dc) CMOSCMOS. Î...9 Input oltage Level Î IH dc OH = 9. dc) TTLCMOS... Î.. OH =. dc) TTLCMOS..... OH = 9. dc) CMOSCMOS... Î.. OH =. dc) CMOSCMOS..... OH =. dc) CMOSCMOS.. Î.. Output Drive Current I OH OH =. dc) Source...Î.. OH =. dc)....88. OH = 9. dc)..î..9 OH =. dc)..î 8.8. OL =. dc) Sink Î I OL...Î.88. OL =. dc)....9 OL =. dc).. Î 8.8. Input Current Î I in ±. Î ±. ±. ±. Adc Input Capacitance in = ) Î C in Î.. pf Quiescent Current Î I DD or (Per Package) I CC... Î.... Î.. Adc CMOSCMOS Mode.... Quiescent Current I DD. (Per Package)...... Î...8. Adc TTLCMOS Mode.... Quiescent Current I (Per Package) Î CC...... Î... TTLCMOS Mode.. Î.... Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance.
MCB SWITCHIN CHARACTERISTICS (C L = pf, T A = C) Î Characteristic Symbol Shifting Mode Î Î CC DD Limits Min Typ Max dcî Unit (Note ) Î Propagation Delay, High to Low t PHL TTL CMOS.Î Î 8 ns DD > CC. 8 CMOS CMOS Î DD > CC..Î Î CMOS CMOS. 8 Î CC > DD Î. Î 8 Î Î Propagation Delay, Low to High t PLH TTL CMOS DD > CC.Î ns Î Î CMOS CMOS.Î Î Î DD > CC. Î CMOS CMOS Î CC > DD Î.. Î 9 Î Output Rise and Fall Time t TLH, t THL ALL. Î Î ns. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 8 Sp, INPUT SWITCHPOINT OLTAE dc) CC = CC = Sp, INPUT SWITCHPOINT OLTAE dc) CC = DD, SUPPLY OLTAE dc) Figure. Input Switchpoint CMOS to CMOS Mode DD, SUPPLY OLTAE dc) Figure. Input Switchpoint TTL to CMOS Mode DD, SUPPLY OLTAE dc) DD, SUPPLY OLTAE dc) CC, SUPPLY OLTAE dc) Figure. Operating Boundary CMOS to CMOS Mode CC, SUPPLY OLTAE dc) Figure. Operating Boundary TTL to CMOS Mode
MCB PACKAE DIMENSIONS PDIP P SUFFIX PLASTIC DIP PACKAE CASE 88 ISSUE T A 8 9 B NOTES:. DIMENSIONIN AND TOLERANCIN PER ANSI Y.M, 98.. CONTROLLIN DIMENSION: INCH.. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.. DIMENSION B DOES NOT INCLUDE MOLD FLASH.. ROUNDED CORNERS OPTIONAL. H F S C K T SEATIN PLANE D PL. (.) M T A M J L M INCHES MILLIMETERS DIM MIN MAX MIN MAX A.. 8.8 9. B....8 C...9. D...9. F..... BSC. BSC H. BSC. BSC J.8...8 K...8. L.9... M S.... SOIC D SUFFIX PLASTIC SOIC PACKAE CASE B ISSUE J A 9 8 B P 8 PL. (.) M B S NOTES:. DIMENSIONIN AND TOLERANCIN PER ANSI Y.M, 98.. CONTROLLIN DIMENSION: MILLIMETER.. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. (.) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE. (.) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. T SEATIN PLANE K C D PL. (.) M T B S A S M R X J F MILLIMETERS INCHES DIM MIN MAX MIN MAX A 9.8..8.9 B.8... C....8 D..9..9 F....9. BSC. BSC J.9..8.9 K....9 M P.8..9. R....9