Progress Towards Computer-Aided Design For Complex Photonic Integrated Circuits

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Department of Electrical and Computer Engineering Progress Towards Computer-Aided Design For Complex Photonic Integrated Circuits Wei-Ping Huang Department of Electrical and Computer Engineering McMaster University Hamilton, Canada 1

Outline Photonic CAD Status Photonic Integrated Circuits (PICs) Photonic CAD Methodology Bottom-Up Approach Top-Down Approach Bridging the Gaps The Cell Library Circuit and Device Models 2

In Innocence, We See the Beginning. In Passion, We See the End. Lao Tse, Chinese Philosopher 3

A Promise Called Photon: If JDSU were to become the Intel of P ICs, then WHO would be the Cadence of P CAD? 4

Electronics and P: From Two Different Galaxies Electronics P Underlying Physics Enabling Technologies Manufacturing Test, Assembly and Packaging Computer Aided Design 5

Electronics and P Industry Desegregation Outsourcing Merchant Captive?? years P in 90s Electronics in 70s P in?? Electronics in 90s 20 years Discrete PCB IC Technology Convergence 6

Electronics and P CAD 1000M Microelectronics CAD Market Size 100M Microwave & RF CAD 10M P CAD 70s 80s 90s Year 00s 7

P CAD Tools Design Optimization Model Calibration Artwork Creation Performance Simulation Product Capability Material Device Circuit System Product Scope 8

P Computer-Aided Design P CAD industry is small Fragmented, private, and under-capitalized P CAD tools abound, but lack in capabilities and features Stand-alone simulation tools Lack design automation P CAD development faces challenges Diversified and evolving materials and technologies Complicated and inter-related physical mechanisms Lack of standards, capabilities, and features Limited market 9

..Listen to the technology, try to understand what it tells you. Carver Mead 10

Photonic Technologies Passive Devices Systems Modules Functional Devices Active Devices Bulk-Optic Fiber-Optic Planar-Optic Optical Materials & Processes InP GaAs Silicon Silica LibNO3 Polymer 11

Drivers for Photonic Integration Performance Performance Size Performance Size Cost Box Level Board Level Chip Level Pre-packaged devices connected by fibers Chips and subcomponents assembled on metal carrier and/or silicon bench Chips connected with each other by hybrid or monolithic integration 12

Integrated Optics S. E. Miller, Integrated optics: an introduction, Bell Syst. Tech. J., 48, 2059-2069, 1969. P. K. Tien, 1978:Research in integrated optics has two goals: One is to apply thin-film technology to the formation of optical devices and circuits. The other is the integration of a large number of optical devices on a small substrate, so forming an optical circuit reminiscent of the integrated circuit in microelectronics. H.A.Haus,2002: Integrated Optics has a long history. Yet, practical applications of integrated optics are still only few. Optical components in current use are large compared with a wavelength. This puts a fundamental limit on the density of the integrated components. By using structures with a large index contrast one may, at best, reduce the structure size to the order of one wavelength. In this limit, the structures resemble microwave components that are of the order of a single wavelength in size. M. Smit, 2004: The power of micro-electronic integration technology is that a broad class of electronic functionalities can be synthesized from a small set of elementary components such as transistors, resistors and capacitors. A technology that supports integration of these elementary components can, therefore, be used for a broad class of applications, and investments made in its development are paid back by a large market. 13

Evolution of Photonic Integration M.Smit,et.al., IPRA, 2005 14

Active PICs Up to 50 photonic devices integrated on InP 15

Passive PICs Over 200 40-ch AWG circuits can be integrated onto a single 6-inch wafer Optical ASIC Reticle (40 functions, 7 mm x 9 mm) 16

Towards VLSI Photonic Circuits Strong optical confinement for small feature size Standard component library as building blocks Scalable circuit topologies and system architecture Performance and functionality improvement with complexity Yield assurance through redundancy Are We Close to Getting There? 17

High-Density PIC Based on High-Index Contrast Kimerling, MIT Little Optics (Infinera) 18

Basic Building Blocks for PICs Optical Sources Passive Optical Waveguides for Interconnection Optical Phase Shifters Optical Amplitude Manipulators Optical Detectors 19

2D Horizontal (Planar) Architecture 20

3D Vertical Architecture T. Yoshimura, et.al., J. LIGHTWAVE TECHNOL., VOL. 24, NO. 11, 2006 21

Model Hierarchy and Definition Top-Down Approach Circuit Device Waveguide Material Bottom-Up Approach 22

Modeling and Simulation of Lattice Filter Silicon Lattice filter Circuit Silicon Silica Silicon Material Ring coupler Ring Connector Device Channel Waveguide 23

Simulation by the Hierarchical Method Koji Yamada, at el, Optics Lett., vol. 28, No. 18, pp. 1663-1664, 2003. Silicon 24

Modeling and Simulation of Triplexer Filter 1310nm Monitor-PD 1490nm PD 1550nm PD SMF 1310nm DFB-LD MMI separates upstream signal at 1310nm channel from downstream signals at 1490nm and 1550nm channels (Coarse Wavelength Demultiplexing) AWG further separates downstream data signal at 1490nm channel from downstream analog signal at 1550nm channel (Fine Wavelength Demultiplexing) C. Xu, X. Hong, and W.-P. Huang, OSA Optics Express, Vol. 14, pp. 4675-4686, 2006. 25

Waveguide Design Modeling and Simulation Single-Mode Condition Bending Radius 26

Circuit Design Modeling and Simulation 0 Insertion Loss (db) 0-10 -20-30 Insertion Loss (db) -10-20 -30-40 1.2 1.3 1.4 1.5 1.6 1.7 Wavelength (µm) -40 1.2 1.3 1.4 1.5 1.6 1.7 Wavelength (µm) 1310nm DFB-LD 1490nm/1550nm downstream signals 1310nm upstream signal 1490nm PD 1550nm PD SMF Insertion Loss (db) 0-10 -20-30 Insertion Loss (db) 0-10 -20-30 -40 1.2 1.3 1.4 1.5 1.6 1.7 Wavelength (µm) -40 1.2 1.3 1.4 1.5 1.6 1.7 Wavelength (µm) 27

Time-Domain Hybrid Method 2D Scattering 1D Propagation N.Feng, et.al. 28

Output Field Distribution at One Branch N.Feng, et.al. 29

Output Field Distribution at Drop Port N.Feng, et.al. 30

Trend in Computational P Reduction in Device Feature Size 1000λ 100λ 10λ λ 0.1λ 1980 2000 1990 CMT Device Size BPM DRAM Density FDTD CPU Speed 1000 100 10 1 Improvement in Computing Power 31

Top-Down Approach for P CAD Generic System Responses Symbolic Circuit Description Behavioral Circuit Model Cell Library Physical Circuit Layout Circuit Simulation Device Simulation 32

Circuit Solvers The Cell Concept Circuit Simulation Circuit Optimization Device Solvers Behavioral Model Device Simulation Device Optimization Device Ports Cell Device Parameters Physical Structure 33

Example of A Cell Behavioral Model: [Sij] Port1 Port2 Cell List of Parameters: W1,L1,S,W2,ϕ2,R(ϕ) s w 1 L ϕ 1 R ϕ 2 w 2 34

Cell Characteristics Basic elements for technology-specific design optimization Bearer of design concepts and know-how Building-blocks for complex photonic ICs Generator for behavioral models for circuit simulation Linkage with mixed device solvers and optimizers 35

Behavioral Circuit Model Behavioral Model Control Layer O C Passive Optical Component Control Component Optical Layer C O Active Optical Component Optical Link Non-Optical Link C O C C O O C O O O C C C O O O C O 36

Circuit Models of Microring Resonator Filters V. Van, JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 24, NO. 7, JULY 2006 37

Synthesis of Synthesis of 5th-Order Transitional Chebyshev Bessel Filter V. Van, JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 24, NO. 7, 2006 38

Device Optimization and Artwork Generation for Top-Down Approach Target System Responses Chosen Circuit Topology Synthesis Optimization Optimized Circuit Parameters Automatic Circuit Layout Cell Library The Missing Links Optimized Device Parameters 39

Device/Circuit/System Design Optimizer Initialization to decide the variable and the fixed parameters Device/Circuit/System Simulators Performance Sensitivity Tolerance Yield Parameter Scan Design Optimization 40

Future Photonic CAD System Graphic User Interface Performance Simulation Design Optimization Circuit Layout Planar Optic Elements Cell Library Fiber Optic Elements Bulk Optic Elements Engine Library Device Simulators Circuit Simulators Optimizers Data Library Measurements Parameter Extraction Database 41

P Design Automation Front-End Design Concept Design Simulation Optimization Layout Device Primitives FAB Device Finals Production Back-End Design Characterization Parameter Extraction Design Verification 42

Let s SPICE the photonic Circuit! You don t get any credit for doing 95 percent of the job! The release of the Simulation Program with Integrated Circuit Emphasis (SPICE) in 1972, still the industry standard tool for integrated circuit design 43