4V Drive Pch+Pch MOSFET

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Transcription:

4V Drive Pch+Pch MOSFET SH8J62 Structure Silicon P-channel MOSFET Dimensions (Unit : mm) SOP8 Features ) Low On-resistance. 2) Built-in G-S Protection Diode. 3) Small Surface Mount Package (SOP8). pplication Switching Each lead has same dimensions Packaging specifications Inner circuit Type SH8J62 Package Code Basic ordering unit (pieces) Taping TB 25 2 (8) (7) 2 (6) (5) () (2) ESD PROTECTION DIODE 2 BODY DIODE (3) (4) () Tr Source (2) Tr Gate (3) Tr2 Source (4) Tr2 Gate (5) Tr2 Drain (6) Tr2 Drain (7) Tr Drain (8) Tr Drain bsolute maximum ratings (Ta=25 C) <It is the same ratings for the Tr and Tr2.> Parameter Drain-source voltage Gate-source voltage Drain current Source current (Body diode) Total power dissipation Channel temperature Range of Storage temperature Pw μs, Duty cycle % 2 Mounted on a ceramic board Continuous Continuous Symbol Limits VDSS 3 S ±2 ID ±4.5 IDP IS ±8.6 ISP 8 PD 2 2..4 Tch 5 Tstg 55 to +5 Unit V V W / TOTL W / ELEMENT C C c 2 ROHM Co., Ltd. ll rights reserved. /5 2. - Rev.

Electrical characteristics (Ta=25 C) <It is the same characteristics for the Tr and Tr2.> Parameter Symbol Min. Typ. Max. Unit Conditions Gate-source leakage IGSS ± μ =±2V, VDS=V Drain-source breakdown voltage V(BR) DSS 3 V ID= m, =V Zero gate voltage drain current IDSS μ VDS= 3V, =V Gate threshold voltage (th). 2.5 V VDS= V, ID= m 4 56 mω ID= 4.5, = V Static drain-source on-state RDS (on) 55 77 mω ID= 2.5, = 4.5V resistance 6 84 mω ID= 2.5, = 4.V Forward transfer admittance Yfs 3.5 S VDS= V, ID= 4.5 Input capacitance Ciss 8 pf VDS= V Output capacitance Coss 2 pf =V Reverse transfer capacitance Crss pf f=mhz Turn-on delay time td (on) 7 ns ID= 2.5 Rise time VDD tr 5 ns 5V Turn-off delay time = V td (off) 7 ns RL=6.Ω Fall time tf 5 ns RG=Ω Total gate charge Qg 8. nc VDD 5V ID= 4.5 Gate-source charge Qgs 2.5 nc = 5V Gate-drain charge Qgd 3. nc RL=3.3Ω / RG=Ω Body diode characteristics (Source-Drain) (Ta=25 C) <It is the same characteristics for the Tr and Tr2.> Parameter Symbol Min. Typ. Max. Unit Conditions Forward voltage VSD.2 V IS= 4.5, =V c 2 ROHM Co., Ltd. ll rights reserved. 2/5 2. - Rev.

Electrical characteristic curves DRIN CURRENT : -I D [] 2 5 5 V GS = -V V GS = -3.5V V GS = -3.V DRIN CURRENT : -I D [] 2 8 6 4 2 8 6 4 2 V GS = -V V GS = -3.8V V GS = -3.2V DRIN CURRENT : -I D []. V DS = -V Ta= 25 C Ta= 75 C Ta= 25 C Ta= - 25 C..2.4.6.8. 2 4 6 8...5 2. 2.5 3. GTE-SOURCE VOLTGE : -V GS [V] Fig. Typical output characteristics( ) Fig.2 Typical output characteristics( ) Fig.3 Typical Transfer Characteristics V GS = -V. V GS = -V Ta=25 C. Ta=25 C. Fig.4 Static Drain-Source On-State Fig.5 Static Drain-Source On-State Fig.6 Static Drain-Source On-State Ta=25 C. FORWRD TRNSFER DMITTNCE : Yfs [S] V DS = -V Ta=25 C... REVERSE DRIN CURRENT : -Is []. V GS =V Ta=25 C Ta=-25 C...5..5 SOURCE-DRIN VOLTGE : -V SD [V] Fig.7 Static Drain-Source On-State Fig.8 Forward Transfer dmittance vs. Drain Current Fig.9 Reverse Drain Current vs. Sourse-Drain Voltage c 2 ROHM Co., Ltd. ll rights reserved. 3/5 2. - Rev.

2 5 5 I D = -4.5 I D = -2.5 5 5 Switching Time : t [ns] t r t d(off) t d(on).. t f V DD = -5V V GS =-V R G =Ω GTE-SOURCE VOLTGE : -V GS [V] 8 6 4 2 V DD = -5V I D = -4.5 R G =Ω 5 5 GTE-SOURCE VOLTGE : -V GS [V] TOTL GTE CHRGE : Qg [nc] Fig. Static Drain-Source On-State Resistance vs. Gate Source Voltage Fig. Switching Characteristics Fig.2 Dynamic Input Characteristics CPCITNCE : C [pf] f=mhz V GS =V Coss Crss Ciss.. Fig.3 Typical Capacitance vs. Drain-Source Voltage DRIN CURRENT : -I D () Operation in this area is limited by RDS(on) (=-V) DC operation PW = ms PW=ms PW=us. Ta = 25 C Single Pulse MOUNTED ON CERMIC BORD.. Fig.4 Maximum Safe Operating rea NORMRIZED TRNSIENT THERML RESISTNCE : r (t)... Ta = 25 C Single Pulse : Unit Rth(ch-a)(t) = r(t) Rth(ch-a) Rth(ch-a) = 89.3 C/W <Mounted on a CERMIC board>... PULSE WIDTH : Pw(s) Fig.5 Normalized Transient Thermal Resistance vs. Pulse Width c 2 ROHM Co., Ltd. ll rights reserved. 4/5 2. - Rev.

Measurement circuits Pulse Width ID RL VDS % 5% 9% 5% RG D.U.T. % % VDD VDS td(on) 9% 9% tr td(off) tf ton toff Fig.- Switching Time Test Circuit Fig.-2 Switching Time Waveforms VG ID VDS Qg IG(Const.) RG D.U.T. RL Qgs Qgd VDD Charge Fig.2- Gate Charge Test Circuit Fig.2-2 Gate Charge Waveform c 2 ROHM Co., Ltd. ll rights reserved. 5/5 2. - Rev.

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