Experiment 5: Basic Digital Logic Circuits

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ELEC 2010 Laboratory Manual Experiment 5 In-Lab Procedure Page 1 of 5 Experiment 5: Basic Digital Logic Circuits In-Lab Procedure and Report (30 points) Before starting the procedure, record the table # you are working at in your Lab Report. Also record the EE Inventory # of any equipment that you use. This experiment is divided into two major sections: In parts 1-8, you will learn to use the Bit Bucket digital breadboard system. In parts 9-11, you will learn to build digital logic circuits. (1) Familiarize yourself with the equipment. You will use the following: Bit Bucket digital logic breadboard system Digital Multimeter (DMM) Oscilloscope* The usual assortment of 16 banana-plug cables, and a tub of hookup wires. If any of these are missing or non-functional, let your lab instructor know. *You can initialize the oscilloscope as soon as you arrive in lab. (2) Your instructor will explain and demonstrate the basic connection scheme for the Bit Bucket. The main points are listed below: The left-hand vertical strip provides +5 V (next to the red line) and ground (next to the blue line) when the main power is turned on. The horizontal power strips (marked with red and blue lines) are not internally connected to the vertical power strips- you must connect them with hookup wire if you want to use them. Each row in a horizontal power strip is interrupted by a break in the middle (where the red and blue lines are broken). In the three main breadboard areas, the rows are labeled A through J, and the columns are numbered 1 through 64. In each area, the tie points A-E and F-J are connected vertically. Between E and F there is a channel for mounting dual-in-line integrated circuit packages (DIP IC's). (3) Measure the voltage on the +5 V power strip. (a) Measure this as precisely as possible using the DMM. (b) Measure this using the oscilloscope (make sure to set it to display DC). (4) Investigate the operation of the pushbutton switches PB1 and PB2 (a) Connect a wire from the Q-output of PB1 (PB1-Q) to the LOGIC PROBE. Push the button, then release it. Record your observation. Now move the connection to the Q-bar output of PB1 and repeat. What is the logical relation between Q and Q-bar? (Ans.: Q-bar is the complement of Q.) Which one is normally HIGH and which one is normally LOW? ( Normal means when the button is not being pushed.) (b) Connect PB1-Q to the LOGIC PROBE. Also connect the DMM and the oscilloscope to PB1-Q (you can use the extra tie points at the LOGIC PROBE, as well as the banana-jack connectors). Now push and release PB1 several times while you observe the DMM and the oscilloscope. Record your observations. (c) Repeat part (b) for PB2 to verify that it is operating correctly. (5) Investigate the operation of the toggle switches SW1 through SW8.

ELEC 2010 Laboratory Manual Experiment 5 In-Lab Procedure Page 2 of 5 (a) Connect the Q-output of SW1 (SW1-Q) to the LOGIC PROBE. Toggle the switch and record your observation. Connect to the Q-bar output to the logic probe and record your observation. What is the logical relation between Q and Q-bar? (b) For each of the other toggle switches SW2 - SW8, verify that the Q and Q-bar outputs work correctly. Report any non-functional switches to your instructor. (6) Investigate the operation of the clock. (a) Connect the clock output (Clk Out) to the logic probe, and also to the oscilloscope. Set the toggle switch labeled "Fixed/ADJ" to the "Fixed" position., and set the "Clock" selector knob to the "1 Hz" position. Record what you observe on the LOGIC PROBE and on the oscilloscope. (The LOGIC PROBE should alternate between "1" and "0" with a period of 1 second. You should see the oscilloscope trace alternate between 0 to 5V.) (b) Vary the selector knob to 10 Hz, 100 Hz, 1 khz, and 10 khz and record what you observe on the LOGIC PROBE and on the oscilloscope. (c) Set the selector knob to 10 Hz, and flip the toggle switch to the "ADJ" position. Verify that the "Freq Adj" knob is a ten-turn potentiometer by first turning it fully CCW (minimum position), then turning it CW and counting the number of turns until it stops at the maximum position (fully CW). What is the minimum frequency? What is the maximum frequency? (Determine these values by using the oscilloscope.) NOTE: The Freq Adj knob is a ten-turn potentiometer. It might seem that the knob is loose or non-functional, but in fact it is supposed to turn 10 times to go from its minimum to maximum value. (7) Investigate the HEX displays. There are two 4-bit HEX displays (labeled HEX to 7-segment decoder) on the lower right of the Bit Bucket. These are designed to display hexadecimal (base 16) digits. Hexadecimal (hex) encoding is shown in the table below: Binary Bits Decimal D C B A Hex 0 0 0 0 0 0 1 0 0 0 1 1 2 0 0 1 0 2 3 0 0 1 1 3 4 0 1 0 0 4 5 0 1 0 1 5 6 0 1 1 0 6 7 0 1 1 1 7 8 1 0 0 0 8 9 1 0 0 1 9 10 1 0 1 0 A 11 1 0 1 1 B 12 1 1 0 0 C 13 1 1 0 1 D 14 1 1 1 0 E 15 1 1 1 1 F (a) Connect four toggle switches to the A-B-C-D inputs of the left-hand display. Choose any 4 decimal numbers from the table, and verify the encoding by setting the toggle switches to "1" or "0" as listed in the table. Record your results. (If any segments do not light, or if there are any other problems with the display, inform your instructor.) (b) Repeat part (a) for the right-hand display. (8) Investigate the 7-segment display driver

ELEC 2010 Laboratory Manual Experiment 5 In-Lab Procedure Page 3 of 5 The seven-segment driver lets you generate your own characters by individually turning on each segment of the display. (a) Figure out which input a-g, dp turns on which segment of the display. Draw the display in your report and label each segment with the corresponding letter. (b) Choose any two characters (letters or numbers) and display them. In your report, list the segments you turned on and draw the character. (9) Connect a 7400 quad NAND gate and verify the truth table. Your lab instructor will show you how to insert DIP IC chips into the breadboard, and also how to remove (extract) chips from the breadboard. Each time you obtain a chip, inspect it to make sure it is the right part number (see the next paragraph), and to make sure all the pins are intact. Very often, people put chips back in the wrong bin. It is also common for pins to break off due to careless handling. If a pin breaks, inform your instructor and discard the chip. The standard part number for the TTL NAND gate is 7400. However, most manufacturers have their own designation which includes these numbers, but adds some extra characters. The following are examples of valid part numbers you might find on a "7400" chip: SN7400N, MM74C00N, SN74LS00N, SN74H00N, etc. In addition to these, there will often be another part code stamped on the chip by the manufacturer, and there might be a code stamped underneath the chip as well. In general, as long as you can find the digits 7400 somewhere on the chip, you have the right one. Below is a top view of a 7400, which is a quad NAND chip. The term quad means there are four separate NAND gates on a single chip (they all share the same power supply, but their inputs and outputs are independent). Note the pin numbering. The chip has an indentation at one end to distinguish the ends. For this chip to operate, you must connect 5V to pin 14 (labeled VCC), and ground to pin 7 (GND). For this chip, the pin assignment is that all the "Y's" are outputs, and the A's and B's are inputs. The logic diagram looks like this:

ELEC 2010 Laboratory Manual Experiment 5 In-Lab Procedure Page 4 of 5 (a) Connect two toggle switches to the inputs of one of the NAND gates, and connect the output to the Logic Probe. Verify the truth table for this gate by stepping through each of the four possible combinations of switch settings. Draw the circuit, labeling which pin numbers you use for each column of the truth table, following the example below. The pin numbers are in parentheses. 1A (1) 1B (2) 1Y (3) 1/4-7400 Record your truth table following the example below, and verify that this gate implements the NAND function. NAND gate truth table (7400) INPUTS 1A (pin 1) 1B (pin 2) = SW1-Q =SW2-Q 0 0 0 1 1 0 1 1 OUTPUT 1Y (pin 3) - Logic Probe (b) Repeat part (a) for each of the other three NAND gates on the chip (the main purpose of this is to help you learn how to count pins). (10) Connect an inverter to the output of the NAND gate. (a) Connect the circuit shown below. The pin-out diagram for the 7404 hex inverter is attached. Connect switches to each of the inputs x and y, and connect the output of each gate to a separate LED. (For example, you can use the D and C inputs of one of the HEX displays). This will allow you to monitor both outputs simultaneously. Redraw the circuit in your report, labeling each pin and showing where they are connected. D C x y z 1/4-7400 1/6-7404 (b) Measure and record the truth table for this combination gate. Verify that the inverter works as expected. What is the Boolean function for the combined gate? (11) OR gate (a) Connect a 7432 quad OR gate chip. The pin-out diagram is attached. (b) Measure and record the truth table for one of the gates on the chip. Draw the circuit diagram, label the inputs and output, and show the pin numbers. Also show the Boolean expression for the gate.

ELEC 2010 Laboratory Manual Experiment 5 In-Lab Procedure Page 5 of 5 (12) Cleanup (a) Turn off the power to the Bit Bucket. (b) Turn off the DMM and the oscilloscope (c) Disassemble your circuit and place all wires back in the wire tub. (d) Put the chips back in the proper bins (e) Clean up your workstation and discard any trash. Review and Report Completion Finish writing your lab report, following the outline given in the Course Information. Submit your lab report to your instructor before leaving the lab. PIN-OUT AND LOGIC DIAGRAMS 7404 Hex Inverter 7432 Quad OR